Search results for "speedup"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
15	Raphael A. Finkel, John P. Fishburn	Improved Speedup Bounds for Parallel Alpha-Beta Search.	IEEE Trans. Pattern Anal. Mach. Intell.	1983	DBLP DOI BibTeX RDF
15	Ruknet Cezzar, David Klappholz	Process Management Overhead in a Speedup-Oriented MIMD System.	ICPP	1983	DBLP BibTeX RDF
15	Jacques Cohen, Timothy J. Hickey, Joel Katcoff	Upper Bounds for Speedup in Parallel Parsing.	J. ACM	1982	DBLP DOI BibTeX RDF
15	Barry E. Jacobs	α-naming and α-speedup theorems.	Notre Dame J. Formal Log.	1979	DBLP DOI BibTeX RDF
15	James M. Lemme, John R. Rice	Speedup in Parallel Algorithms for Adaptive Quadrature.	J. ACM	1979	DBLP DOI BibTeX RDF
15	Leonard Berman	On the Structure of Complete Sets: Almost Everywhere Complexity and Infinitely Often Speedup	FOCS	1976	DBLP DOI BibTeX RDF
15	Shyh-Ching Chen	Speedup of Iterative Programs in Multiprocessing Systems		1975	RDF
15	Richard E. Strebendt	Program Speedup Through Concurrent Record Processing		1974	RDF
15	Jerry D. Burchfiel	Speedup of Host-IMP interface.	RFC	1973	DBLP DOI BibTeX RDF
15	David J. Kuck, Yoichi Muraoka, Shyh-Ching Chen	On the Number of Operations Simultaneously Executable in Fortran-Like Programs and Their Resulting Speedup.	IEEE Trans. Computers	1972	DBLP DOI BibTeX RDF
15	M. M. Lehman	A Comparative Study of Propagation Speedup Circuits in Binary Arithmetic Units.	IFIP Congress	1962	DBLP BibTeX RDF
15	Yifeng Chen, Xiang Cui, Hong Mei 0001	Large-scale FFT on GPU clusters.	ICS	2010	DBLP DOI BibTeX RDF	GPU clusters, array dimensions, FFT
15	Matt Staats, Corina S. Pasareanu	Parallel symbolic execution for structural test generation.	ISSTA	2010	DBLP DOI BibTeX RDF	parallel, symbolic execution, java pathfinder
15	Yi Guo, Yisheng Zhao, Vincent Cavé, Vivek Sarkar	SLAW: a scalable locality-aware adaptive work-stealing scheduler for multi-core systems.	PPoPP	2010	DBLP DOI BibTeX RDF	help-first, work-first, work-stealing
15	Farhana Aleen, Monirul Sharif, Santosh Pande	Input-driven dynamic execution prediction of streaming applications.	PPoPP	2010	DBLP DOI BibTeX RDF	parallelization, software pipeline, dynamic execution
15	Amotz Bar-Noy, Mordecai J. Golin, Yan Zhang 0021	Online Dynamic Programming Speedups.	Theory Comput. Syst.	2009	DBLP DOI BibTeX RDF	Dynamic programming, Monge property
15	Zhong-Yi Jin, Rajesh K. Gupta 0001	Improving the speed and scalability of distributed simulations of sensor networks.	IPSN	2009	DBLP DOI BibTeX RDF
15	Christophe Dubach, Timothy M. Jones 0001, Edwin V. Bonilla, Grigori Fursin, Michael F. P. O'Boyle	Portable compiler optimisation across embedded programs and microarchitectures using machine learning.	MICRO	2009	DBLP DOI BibTeX RDF	architecture/compiler co-design, machine learning, design-space exploration
15	Kanupriya Gulati, John F. Croix, Sunil P. Khatri, Rahm Shastry	Fast circuit simulation on graphics processing units.	ASP-DAC	2009	DBLP DOI BibTeX RDF
15	John Paul Walters, Vidyananth Balu, Suryaprakash Kompalli, Vipin Chaudhary	Evaluating the use of GPUs in liver image segmentation and HMMER database searches.	IPDPS	2009	DBLP DOI BibTeX RDF
15	Christopher Moretti, Michael Olson, Scott J. Emrich, Douglas Thain	Highly scalable genome assembly on campus grids.	SC-MTAGS	2009	DBLP DOI BibTeX RDF
15	Peter Bui, Jay B. Brockman	Performance analysis of accelerated image registration using GPGPU.	GPGPU	2009	DBLP DOI BibTeX RDF	performance analysis, image registration, GPGPU, CUDA
15	Miroslav N. Velev, Ping Gao 0002	Efficient SAT Techniques for Relative Encoding of Permutations with Constraints.	Australasian Conference on Artificial Intelligence	2009	DBLP DOI BibTeX RDF
15	Justin L. Tripp, Maya B. Gokhale, Anders A. Hansson	A Case Study of Hardware/Software Partitioning of Traffic Simulation on the Cray XD1.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
15	Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown	Scalable Synthesis and Clustering Techniques Using Decision Diagrams.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
15	Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane	Fast exploration of bus-based communication architectures at the CCATB abstraction.	ACM Trans. Embed. Comput. Syst.	2008	DBLP DOI BibTeX RDF	performance exploration, System-on-chip, transaction-level modeling, communication architecture, on-chip bus
15	Arif Mahmood, Sohaib Khan	Exploiting local auto-correlation function for fast video to reference image alignment.	ICIP	2008	DBLP DOI BibTeX RDF
15	Maryam Moazeni, Alireza Vahdatpour, Karthik Gururaj, Majid Sarrafzadeh	Communication bottleneck in hardware-software partitioning.	FPGA	2008	DBLP DOI BibTeX RDF	FPGA, communication, hardware-software codesign
15	Miroslav N. Velev, Ping Gao 0002	Comparison of Boolean Satisfiability Encodings on FPGA Detailed Routing Problems.	DATE	2008	DBLP DOI BibTeX RDF
15	Derek L. Schuff, Yung Ryn Choe, Vijay S. Pai	Conservative vs. Optimistic Parallelization of Stateful Network Intrusion Detection.	ISPASS	2008	DBLP DOI BibTeX RDF
15	Sang-Min Park, Marty Humphrey	Data throttling for data-intensive workflows.	IPDPS	2008	DBLP DOI BibTeX RDF
15	Deng Pan, Yuanyuan Yang 0001	Providing flow based performance guarantees for buffered crossbar switches.	IPDPS	2008	DBLP DOI BibTeX RDF
15	Virat Agarwal, Lurng-Kuo Liu, David A. Bader	Financial modeling on the cell broadband engine.	IPDPS	2008	DBLP DOI BibTeX RDF
15	Minsik Cho, David Z. Pan	BoxRouter: A New Global Router Based on Box Expansion and Progressive ILP.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
15	Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis	The Molen compiler for reconfigurable processors.	ACM Trans. Embed. Comput. Syst.	2007	DBLP DOI BibTeX RDF	FPGA, reconfigurable computing, Instruction scheduling
15	Xiaotong Zhuang, Santosh Pande	Allocating architected registers through differential encoding.	ACM Trans. Program. Lang. Syst.	2007	DBLP DOI BibTeX RDF	architected register, differential encoding, Register allocation
15	Amol Ghoting, Gregory Buehrer, Srinivasan Parthasarathy 0001, Daehyun Kim 0001, Anthony D. Nguyen, Yen-Kuang Chen, Pradeep Dubey	Cache-conscious frequent pattern mining on modern and emerging processors.	VLDB J.	2007	DBLP DOI BibTeX RDF	Cache-conscious data mining, Architecture-conscious algorithms, Association rule mining, Frequent pattern mining, Frequent itemset mining
15	Shay Mozes, Oren Weimann, Michal Ziv-Ukelson	Speeding Up HMM Decoding and Training by Exploiting Sequence Repetitions.	CPM	2007	DBLP DOI BibTeX RDF	dynamic programming, HMM, compression, Viterbi
15	Ashutosh Pal, M. Balakrishnan	A Behavioral Synthesis Approach for Distributed Memory FPGA Architectures.	FPL	2007	DBLP DOI BibTeX RDF
15	Quanxi Li, Jingsong He	A Sophisticated Architecture for Evolutionary Multiobjective Optimization Utilizing High Performance DSP.	ICES	2007	DBLP DOI BibTeX RDF	Evolvable Hardware, Digital Signal Processor, Evolutionary Multi-objective Optimization
15	Xiaojun Wang, Miriam Leeser	K-means Clustering for Multispectral Images Using Floating-Point Divide.	FCCM	2007	DBLP DOI BibTeX RDF
15	Rabie Ben Atitallah, Smaïl Niar, Samy Meftali, Jean-Luc Dekeyser	An MPSoC Performance Estimation Framework Using Transaction Level Modeling.	RTCSA	2007	DBLP DOI BibTeX RDF
15	Jike Chong, Nadathur Satish, Bryan Catanzaro, Kaushik Ravindran, Kurt Keutzer	Efficient Parallelization of H.264 Decoding with Macro Block Level Scheduling.	ICME	2007	DBLP DOI BibTeX RDF
15	Yu Hu 0002, King Ho Tam, Tong Jing, Lei He 0001	Fast dual-vdd buffering based on interconnect prediction and sampling.	SLIP	2007	DBLP DOI BibTeX RDF	routing, low power, interconnect, buffer insertion, dual-Vdd
15	Md. Mafijul Islam	Predicting Loop Termination to Boost Speculative Thread-Level Parallelism in Embedded Applications.	SBAC-PAD	2007	DBLP DOI BibTeX RDF
15	Chang-Duk Jung, You-Keon Park	Study on Sorting of A Parallel Computer Using Protocol in Ubiquitous Environment.	MUE	2007	DBLP DOI BibTeX RDF
15	Md. Mafijul Islam, Alexander Busck, Mikael Engbom, Simji Lee, Michel Dubois 0001, Per Stenström	Loop-level Speculative Parallelism in Embedded Applications.	ICPP	2007	DBLP DOI BibTeX RDF
15	Elankovan Sundararajan, Aaron Harwood, Kotagiri Ramamohanarao	Incorporating Fault Tolerance with Replication on Very Large Scale Grids.	PDCAT	2007	DBLP DOI BibTeX RDF
15	Michele Migliore, C. Cannia, William W. Lytton, Henry Markram, Michael L. Hines	Parallel network simulations with NEURON.	J. Comput. Neurosci.	2006	DBLP DOI BibTeX RDF	Realistic modeling, Spiking networks, Parallel computation, Computer simulation
15	Yossi Azar, Yossi Richter	An improved algorithm for CIOQ switches.	ACM Trans. Algorithms	2006	DBLP DOI BibTeX RDF	CIOQ, competitive, switch, Qos, on-line
15	Michael Rosenblum, Constantine Caramanis, Michel X. Goemans, Vahid Tarokh	Approximating fluid schedules in crossbar packet-switches and Banyan networks.	IEEE/ACM Trans. Netw.	2006	DBLP DOI BibTeX RDF	scheduling, graph theory, packet-switching, network calculus, combinatorics
15	Jonathan Cooper, Steve McKeever, Alan Garny	On the application of partial evaluation to the optimisation of cardiac electrophysiological simulations.	PEPM	2006	DBLP DOI BibTeX RDF
15	Hongjoong Kim, Junsoo Lee	Variable Step Fluid Simulation for Communication Network.	Networking	2006	DBLP DOI BibTeX RDF
15	Eduardo Argollo, Adriana Gaudiani, Dolores Rexachs, Emilio Luque	Tuning Application in a Multi-cluster Environment.	Euro-Par	2006	DBLP DOI BibTeX RDF
15	Changhee Jung, Daeseob Lim, Jaejin Lee, Yan Solihin	Helper thread prefetching for loosely-coupled multiprocessor systems.	IPDPS	2006	DBLP DOI BibTeX RDF
15	Yonghong Yang, Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert P. Dick	Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design.	ICCAD	2006	DBLP DOI BibTeX RDF
15	Amotz Bar-Noy, Mordecai J. Golin, Yan Zhang 0021	Online Dynamic Programming Speedups.	WAOA	2006	DBLP DOI BibTeX RDF
15	Miroslav N. Velev	Using Abstraction for Efficient Formal Verification of Pipelined Processors with Value Prediction.	ISQED	2006	DBLP DOI BibTeX RDF
15	Christopher Gammage, Vipin Chaudhary	On Optimization and Parallelization of Fuzzy Connected Segmentation for Medical Imaging.	AINA (2)	2006	DBLP DOI BibTeX RDF
15	Janis Sermulins, William Thies, Rodric M. Rabbah, Saman P. Amarasinghe	Cache aware optimization of stream programs.	LCTES	2005	DBLP DOI BibTeX RDF	cache, embedded, fusion, cache optimizations, synchronous dataflow, stream programing, StreamIt
15	Ben Wun, Jeremy Buhler, Patrick Crowley	Exploiting Coarse-Grained Parallelism to Accelerate Protein Motif Finding with a Network Processor.	IEEE PACT	2005	DBLP DOI BibTeX RDF
15	Justin Teller, Charles B. Silio Jr., Bruce L. Jacob	Performance characteristics of MAUI: an intelligent memory system architecture.	Memory System Performance	2005	DBLP DOI BibTeX RDF	MAUI memory architecture, SimpleScalar simulator, data-intensive calculations, intelligent memory, memory architecture, vector processing, SIMD processing
15	Luciano Bononi, Michele Bracuto, Gabriele D'Angelo, Lorenzo Donatiello	Concurrent Replication of Parallel and Distributed Simulations.	PADS	2005	DBLP DOI BibTeX RDF
15	Stephen Pellicer, Nova Ahmed, Yi Pan 0001, Yao Zheng	Gene Sequence Alignment on a Public Computing Platform.	ICPP Workshops	2005	DBLP DOI BibTeX RDF
15	Bryson R. Payne, Saeid Belkasim, G. Scott Owen, Michael Weeks, Ying Zhu 0001	Accelerated 2D Image Processing on GPUs.	International Conference on Computational Science (2)	2005	DBLP DOI BibTeX RDF
15	Dongkeun Kim, Donald Yeung	A study of source-level compiler algorithms for automatic construction of pre-execution code.	ACM Trans. Comput. Syst.	2004	DBLP DOI BibTeX RDF	pre-execution, prefetch conversion, speculative loop parallelization, multithreading, program slicing, Data prefetching, memory-level parallelism
15	Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha	Custom-instruction synthesis for extensible-processor platforms.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
15	Ying Chen, Frank K. H. A. Dehne, Todd Eavis, Andrew Rau-Chaplin	Building Large ROLAP Data Cubes in Parallel.	IDEAS	2004	DBLP DOI BibTeX RDF
15	Yossi Azar, Yossi Richter	An Improved Algorithm for CIOQ Switches.	ESA	2004	DBLP DOI BibTeX RDF
15	Ming Wu, Moon-Jung Chung, H. D. K. Moonesinghe	Parallel Implementation of WAP-Tree Mining Algorithm.	ICPADS	2004	DBLP DOI BibTeX RDF
15	Brian Towles, William J. Dally	Guaranteed scheduling for switches with configuration overhead.	IEEE/ACM Trans. Netw.	2003	DBLP DOI BibTeX RDF	packet switching, optical switches
15	Yan Solihin, Jaejin Lee, Josep Torrellas	Correlation Prefetching with a User-Level Memory Thread.	IEEE Trans. Parallel Distributed Syst.	2003	DBLP DOI BibTeX RDF	correlation prefetching, memory-side prefetching, intelligent memory architecture, Prefetching, heterogeneous system, processing-in-memory, helper threads
15	João Pedro Costa, Pedro Furtado 0001	DSQoS-distributed architecture providing QoS in summary warehouses.	DOLAP	2003	DBLP DOI BibTeX RDF	sampling, data warehouse, OLAP, approximate query answering
15	Robert B. Reese, Mitchell A. Thornton, Cherrice Traver	A Coarse-Grain Phased Logic CPU.	ASYNC	2003	DBLP DOI BibTeX RDF
15	Fredrik Warg, Per Stenström	Improving Speculative Thread-Level Parallelism Through Module Run-Length Prediction.	IPDPS	2003	DBLP DOI BibTeX RDF	module-level parallelism, module run-length prediction, performance evaluation, Multiprocessors, thread-level speculation
15	Mei Yang, Si-Qing Zheng	Pipelined Maximal Size Matching Scheduling Algorithms for CIOQ Switches..	ISCC	2003	DBLP DOI BibTeX RDF
15	Bilge Saglam Akgul, Vincent John Mooney, Henrik Thane, Pramote Kuacharoen	Hardware Support for Priority Inheritance.	RTSS	2003	DBLP DOI BibTeX RDF
15	Akihito Takahashi, Mostafa I. Soliman, Stanislav Sedukhin	Parallel LU-decomposition on Pentium Streaming SIMD Extensions.	ISHPC	2003	DBLP DOI BibTeX RDF	streaming SIMD, performance evaluation, parallel processing, data reusing, Gaussian elimination
15	Sanjeev Baskiyar, Prashanth C. SaiRanga	Scheduling Directed A-cyclic Task Graphs on Heterogeneous Network of Workstations to Minimize Schedule Length.	ICPP Workshops	2003	DBLP DOI BibTeX RDF	scheduling, DAG, heterogeneous computing, makespan, task graph
15	Hasan Arslan, Shantanu Dutt	ROAD : An Order-Impervious Optimal Detailed Router for FPGAs.	ICCD	2003	DBLP DOI BibTeX RDF
15	Martin Burtscher, Benjamin G. Zorn	Hybrid Load-Value Predictors.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	load-value predictor, performance metrics, Value prediction, value locality, hybrid predictor
15	Leo Chin Sim, Heiko Schröder 0001, Graham Leedham	Hybrid System, A New Low Cost Parallel Cluster.	HPCS	2002	DBLP DOI BibTeX RDF
15	Resit Sendag, David J. Lilja, Steven R. Kunkel	Exploiting the Prefetching Effect Provided by Executing Mispredicted Load Instructions.	Euro-Par	2002	DBLP DOI BibTeX RDF
15	Daehyun Kim, Mainak Chaudhuri, Mark A. Heinrich	Leveraging cache coherence in active memory systems.	ICS	2002	DBLP DOI BibTeX RDF	active memory, address re-mapping, cache coherence
15	Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka, Keiji Kimura, Hiroki Kaminaga, Hirofumi Nakano, Kouhei Nagasawa, Akiko Murai, Hiroki Itagaki, Jun Shirako	Multigrain Automatic Parallelization in Japanese Millennium Project IT21 Advanced Parallelizing Compiler.	PARELEC	2002	DBLP DOI BibTeX RDF
15	Yan Solihin, Josep Torrellas, Jaejin Lee	Using a User-Level Memory Thread for Correlation Prefetching.	ISCA	2002	DBLP DOI BibTeX RDF	intelligent memory, correlation prefetching, caches, computer architecture, memory hierarchies, threads, data prefetching, processing-in-memory
15	Roger Espasa, Federico Ardanaz, Julio Gago, Roger Gramunt, Isaac Hernandez, Toni Juan, Joel S. Emer, Stephen Felix, P. Geoffrey Lowney, Matthew Mattina, André Seznec	Tarantula: A Vector Extension to the Alpha Architecture.	ISCA	2002	DBLP DOI BibTeX RDF	Power, Microprocessor, Bandwidth, High Performance, Cache Coherency, Virtual Memory, Instruction Set Architecture, Vector Processor
15	Anasua Bhowmik, Manoj Franklin	A general compiler framework for speculative multithreading.	SPAA	2002	DBLP DOI BibTeX RDF	TLP compiler, thread formation, parallelization, data dependence, thread-level parallelism (TLP), control dependence, speculative multithreading (SpMT)
15	Fredrik Warg, Per Stenström	Limits on Speculative Module-Level Parallelism in Imperative and Object-Oriented Programs on CMP Platforms.	IEEE PACT	2001	DBLP DOI BibTeX RDF
15	Ulf Assarsson, Per Stenström	A Case Study of Load Distribution in Parallel View Frustum Culling and Collision Detection.	Euro-Par	2001	DBLP DOI BibTeX RDF
15	Steven J. Deitz, Bradford L. Chamberlain, Lawrence Snyder	Eliminating redundancies in sum-of-product array computations.	ICS	2001	DBLP DOI BibTeX RDF
15	Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara	Coarse Grain Task Parallel Processing with Cache Optimization on Shared Memory Multiprocessor.	LCPC	2001	DBLP DOI BibTeX RDF
15	Bernard M. E. Moret, Tandy J. Warnow	Reconstructing Optimal Phylogenetic Trees: A Challenge in Experimental Algorithmics.	Experimental Algorithmics	2000	DBLP DOI BibTeX RDF
15	Vivek Sarkar	Optimized unrolling of nested loops.	ICS	2000	DBLP DOI BibTeX RDF
15	Mario Donato Marino, Geraldo Lino de Campos	An Evaluation of Page Aggregation Technique on Different DSM Systems.	ISHPC	2000	DBLP DOI BibTeX RDF
15	Jianjian Song, Zhaoxuan Shen, Wenjun Zhuang	An Effective General Connectivity Concept for Clustering.	DATE	1998	DBLP DOI BibTeX RDF	clustering, connectivity, placement, feedthroughs
15	G. N. Srinivasa Prasanna	Compilation of Parallel Multimedia Computations - Extending Retiming Theory and Amdahl's Law.	PPoPP	1997	DBLP DOI BibTeX RDF
15	Jörg Henkel, Rolf Ernst, Ulrich Holtmann, Thomas Benner	Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis.	ICCAD	1994	DBLP DOI BibTeX RDF
15	G. N. Srinivasa Prasanna, Bruce R. Musicus	Generalized multiprocessor scheduling for directed acyclic graphs.	SC	1994	DBLP DOI BibTeX RDF
15	Shiva Chaudhuri, Torben Hagerup, Rajeev Raman	Approximate and Exact Deterministic Parallel Selection.	MFCS	1993	DBLP DOI BibTeX RDF