Search results for "compilers"

Hits ?▲	Authors	Title	Venue	Year	Link
14	Xin An, Sarra Boumedien, Abdoulaye Gamatié, Éric Rutten	CLASSY: a clock analysis system for rapid prototyping of embedded applications on MPSoCs.	Map2MPSoC/SCOPES	2012	DBLP DOI BibTeX RDF
14	Carlos H. A. Costa, José E. Moreira, Guilherme C. Januario, Paulo S. L. M. Barreto	Dynamic method to evaluate code optimization effectiveness.	Map2MPSoC/SCOPES	2012	DBLP DOI BibTeX RDF
14	Kevin Pouget, Vania Marangozova-Martin, Miguel Santana, Jean-François Méhaut	Debugging component-based embedded applications.	Map2MPSoC/SCOPES	2012	DBLP DOI BibTeX RDF
14	Sascha Roloff, Frank Hannig, Jürgen Teich	Fast architecture evaluation of heterogeneous MPSoCs by host-compiled simulation.	Map2MPSoC/SCOPES	2012	DBLP DOI BibTeX RDF
14	Guillermo A. Pérez 0001, Chung-Min Kao, Yeh-Ching Chung, Wei-Chung Hsu	A hybrid just-in-time compiler for android: comparing JIT types and the result of cooperation.	CASES	2012	DBLP DOI BibTeX RDF
14	Abbas Eslami Kiasari, Axel Jantsch, Marco Bekooij, Alan Burns 0001, Zhonghai Lu	Analytical approaches for performance evaluation of networks-on-chip.	CASES	2012	DBLP DOI BibTeX RDF
14	Mei Hong, Hui Guo 0001, Xiaobo Sharon Hu	A cost-effective tag design for memory data authentication in embedded systems.	CASES	2012	DBLP DOI BibTeX RDF
14	Jason Ansel, Maciej Pacula, Yee Lok Wong, Cy P. Chan, Marek Olszewski, Una-May O'Reilly, Saman P. Amarasinghe	Siblingrivalry: online autotuning through local competitions.	CASES	2012	DBLP DOI BibTeX RDF
14	Yuanfeng Wen, Ziyi Liu, Weidong Shi, Yifei Jiang, Albert M. K. Cheng, Khoa Le	Energy efficient hybrid display and predictive models for embedded and mobile systems.	CASES	2012	DBLP DOI BibTeX RDF
14	Zoya Dyka, Christian Walczyk, Damian Walczyk, Christian Wenger, Peter Langendörfer	Side channel attacks and the non volatile memory of the future.	CASES	2012	DBLP DOI BibTeX RDF
14	Lars Schor, Iuliana Bacivarov, Devendra Rai, Hoeseok Yang, Shin-Haeng Kang, Lothar Thiele	Scenario-based design flow for mapping streaming applications onto on-chip many-core systems.	CASES	2012	DBLP DOI BibTeX RDF
14	Nam Duong, Taesu Kim, Dali Zhao, Alexander V. Veidenbaum	Revisiting level-0 caches in embedded processors.	CASES	2012	DBLP DOI BibTeX RDF
14	Wajid Hassan Minhass, Paul Pop, Jan Madsen, Felician Stefan Blaga	Architectural synthesis of flow-based microfluidic large-scale integration biochips.	CASES	2012	DBLP DOI BibTeX RDF
14	Prasenjit Chakraborty, Preeti Ranjan Panda	Integrating software caches with scratch pad memory.	CASES	2012	DBLP DOI BibTeX RDF
14	Dongrui She, Yifan He, Henk Corporaal	Energy efficient special instruction support in an embedded processor with compact isa.	CASES	2012	DBLP DOI BibTeX RDF
14	Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge	Lazy cache invalidation for self-modifying codes.	CASES	2012	DBLP DOI BibTeX RDF
14	Stephan Wong, Luigi Carro, Stamatios Kavvadias, Georgios Keramidas, Francesco Papariello, Claudio Scordino, Roberto Giorgi, Stefanos Kaxiras	Embedded reconfigurable architectures.	CASES	2012	DBLP DOI BibTeX RDF
14	Aaron Landy, Greg Stitt	A low-overhead interconnect architecture for virtual reconfigurable fabrics.	CASES	2012	DBLP DOI BibTeX RDF
14	Bor-Yeh Shen, Jiunn-Yeu Chen, Wei-Chung Hsu, Wuu Yang	LLBT: an LLVM-based static binary translator.	CASES	2012	DBLP DOI BibTeX RDF
14	Abhik Sarkar, Frank Mueller 0001, Harini Ramaprasad	Static task partitioning for locked caches in multi-core real-time systems.	CASES	2012	DBLP DOI BibTeX RDF
14	John Robert Wernsing, Greg Stitt, Jeremy Fowers	The RACECAR heuristic for automatic function specialization on multi-core heterogeneous systems.	CASES	2012	DBLP DOI BibTeX RDF
14	Juan Carlos Martínez Santos, Yunsi Fei, Zhijie Jerry Shi	Static secure page allocation for light-weight dynamic information flow tracking.	CASES	2012	DBLP DOI BibTeX RDF
14	Jinkyu Jeong, Hwanju Kim, Jeaho Hwang, Joonwon Lee, Seungryoul Maeng	DaaC: device-reserved memory as an eviction-based file cache.	CASES	2012	DBLP DOI BibTeX RDF
14	Arun Raman, Jae W. Lee, David I. August	From sequential programming to flexible parallel execution.	CASES	2012	DBLP DOI BibTeX RDF
14	Narasinga Rao Miniskar, Pankaj Shailendra Gode, Soma Kohli, Donghoon Yoo	Function inlining and loop unrolling for loop acceleration in reconfigurable processors.	CASES	2012	DBLP DOI BibTeX RDF
14	Devendra Rai, Hoeseok Yang, Iuliana Bacivarov, Lothar Thiele	Power agnostic technique for efficient temperature estimation of multicore embedded systems.	CASES	2012	DBLP DOI BibTeX RDF
14	Gaurav Chadha, Scott A. Mahlke, Satish Narayanasamy	When less is more (LIMO): controlled parallelism forimproved efficiency.	CASES	2012	DBLP DOI BibTeX RDF
14	Xin Sui, Tsung-Hsien Lee, Joyce Jiyoung Whang, Berkant Savas, Saral Jain, Keshav Pingali, Inderjit S. Dhillon	Parallel Clustered Low-Rank Approximation of Graphs and Its Application to Link Prediction.	LCPC	2012	DBLP DOI BibTeX RDF
14	Stanislav Böhm, Marek Behalek, Ondrej Meca	Kaira: Generating Parallel Libraries and Their Usage with Octave.	LCPC	2012	DBLP DOI BibTeX RDF
14	Sara Royuela, Alejandro Duran, Xavier Martorell	Compiler Automatic Discovery of OmpSs Task Dependencies.	LCPC	2012	DBLP DOI BibTeX RDF
14	Dounia Khaldi, Pierre Jouvelot, Corinne Ancourt, François Irigoin	Task Parallelism and Data Distribution: An Overview of Explicit Parallel Programming Languages.	LCPC	2012	DBLP DOI BibTeX RDF
14	Andrew Stone, Michelle Mills Strout	Abstractions for Defining Semi-Regular Grids Orthogonally from Stencils.	LCPC	2012	DBLP DOI BibTeX RDF
14	Tomofumi Yuki, Gautam Gupta, DaeGon Kim, Tanveer Pathan, Sanjay V. Rajopadhye	AlphaZ: A System for Design Space Exploration in the Polyhedral Model.	LCPC	2012	DBLP DOI BibTeX RDF
14	Jason Cong, Bin Liu 0006, Raghu Prabhakar, Peng Zhang 0007	A Study on the Impact of Compiler Optimizations on High-Level Synthesis.	LCPC	2012	DBLP DOI BibTeX RDF
14	Jun Shirako, Vincent Cavé, Jisheng Zhao, Vivek Sarkar	Finish Accumulators: An Efficient Reduction Construct for Dynamic Task Parallelism.	LCPC	2012	DBLP DOI BibTeX RDF
14	Jae-Woo Lee, Leonardo R. Bachega, Samuel P. Midkiff, Y. Charlie Hu	Ant: A Debugging Framework for MPI Parallel Programs.	LCPC	2012	DBLP DOI BibTeX RDF
14	Vasileios Porpodas, Marcelo Cintra	UCIFF: Unified Cluster Assignment Instruction Scheduling and Fast Frequency Selection for Heterogeneous Clustered VLIW Cores.	LCPC	2012	DBLP DOI BibTeX RDF
14	Zhen Cao, Clark Verbrugge	Language and Architecture Independent Software Thread-Level Speculation.	LCPC	2012	DBLP DOI BibTeX RDF
14	Ivo Anjo, João P. Cachopo	A Software-Based Method-Level Speculation Framework for the Java Platform.	LCPC	2012	DBLP DOI BibTeX RDF
14	Yuriy Kashnikov, Jean Christophe Beyler, William Jalby	Compiler Optimizations: Machine Learning versus O3.	LCPC	2012	DBLP DOI BibTeX RDF
14	Aleksandar Prokopec, Heather Miller, Tobias Schlatter, Philipp Haller, Martin Odersky	FlowPools: A Lock-Free Deterministic Concurrent Dataflow Abstraction.	LCPC	2012	DBLP DOI BibTeX RDF
14	Hugo Rito, João P. Cachopo	FlashbackSTM: Improving STM Performance by Remembering the Past.	LCPC	2012	DBLP DOI BibTeX RDF
14	Rosario Cammarota, Alexandru Nicolau, Alexander V. Veidenbaum	Just in Time Load Balancing.	LCPC	2012	DBLP DOI BibTeX RDF
14	Serge Guelton, Mehdi Amini, Béatrice Creusillet	Beyond Do Loops: Data Transfer Generation with Convex Array Regions.	LCPC	2012	DBLP DOI BibTeX RDF
14	Vinoth Krishnan Elangovan, Rosa M. Badia, Eduard Ayguadé Parra	OmpSs-OpenCL Programming Model for Heterogeneous Systems.	LCPC	2012	DBLP DOI BibTeX RDF
14	Harshvardhan, Adam Fidel, Nancy M. Amato, Lawrence Rauchwerger	The STAPL Parallel Graph Library.	LCPC	2012	DBLP DOI BibTeX RDF
14	Carlo Bertolli, Adam Betts, Nicolas Loriant, Gihan R. Mudalige, David Radford, David A. Ham, Mike B. Giles, Paul H. J. Kelly	Compiler Optimizations for Industrial Unstructured Mesh CFD Applications on GPUs.	LCPC	2012	DBLP DOI BibTeX RDF
14	Michelle Mills Strout, Geri Georg, Catherine Olschanowsky	Set and Relation Manipulation for the Sparse Polyhedral Framework.	LCPC	2012	DBLP DOI BibTeX RDF
14	Christopher D. Krieger, Michelle Mills Strout	A Fast Parallel Graph Partitioner for Shared-Memory Inspector/Executor Strategies.	LCPC	2012	DBLP DOI BibTeX RDF
14		Compilers.	Encyclopedia of Parallel Computing	2011	DBLP DOI BibTeX RDF
14	Per Stenström (eds.)	Transactions on High-Performance Embedded Architectures and Compilers IV	Trans. HiPEAC	2011	DBLP DOI BibTeX RDF
14	Per Stenström (eds.)	Transactions on High-Performance Embedded Architectures and Compilers III	Trans. HiPEAC	2011	DBLP DOI BibTeX RDF
14	Pinaki Chakraborty, Taneja Shweta, Prem Chandra Saxena, Chittaranjan Padmanabha Katti	Teaching purpose compilers: an exercise and its feedback.	Inroads	2011	DBLP DOI BibTeX RDF
14	Jan Olaf Blech, Benjamin Grégoire	Certifying compilers using higher-order theorem provers as certificate checkers.	Formal Methods Syst. Des.	2011	DBLP DOI BibTeX RDF
14	Alexander V. Klepinin, A. A. Melentyev	Integration of semantic verifiers into Java language compilers.	Autom. Control. Comput. Sci.	2011	DBLP DOI BibTeX RDF
14	Görel Hedin, Johan Åkesson, Torbjörn Ekman 0001	Extending Languages by Leveraging Compilers: From Modelica to Optimica.	IEEE Softw.	2011	DBLP DOI BibTeX RDF
14	Heung Seok Chae, Gyun Woo, Tae Yeon Kim, Jung Ho Bae, Won-Young Kim	An automated approach to reducing test suites for testing retargeted C compilers for embedded systems.	J. Syst. Softw.	2011	DBLP DOI BibTeX RDF
14	Jan Vitek, Bjorn De Sutter (eds.)	Proceedings of the ACM SIGPLAN/SIGBED 2011 conference on Languages, compilers, and tools for embedded systems, LCTES 2011, Chicago, IL, USA, April 11-14, 2011	LCTES	2011	DBLP DOI BibTeX RDF
14	Serge Guelton, Adrien Guinet, Ronan Keryell	Building Retargetable and Efficient Compilers for Multimedia Instruction Sets.	PACT	2011	DBLP DOI BibTeX RDF
14	Saeed Maleki, Yaoqing Gao, María Jesús Garzarán, Tommy Wong, David A. Padua	An Evaluation of Vectorizing Compilers.	PACT	2011	DBLP DOI BibTeX RDF
14	Henk Corporaal, Sander Stuijk (eds.)	14th International Workshop on Software and Compilers for Embedded Systems, SCOPES '11, St. Goar, Germany, June 27-28, 2011	SCOPES	2011	DBLP BibTeX RDF
14	Jaime Urquiza-Fuentes, Francisco Manso, J. Ángel Velázquez-Iturbide, Manuel Rubio-Sánchez	Improving compilers education through symbol tables animations.	ITiCSE	2011	DBLP DOI BibTeX RDF
14	Emilio Wuerges, Rômulo Silva de Oliveira, Luiz C. V. dos Santos	Fast estimation of memory consumption for energy-efficient compilers.	ICECS	2011	DBLP DOI BibTeX RDF
14	Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala	Operation set customization in retargetable compilers.	ACSCC	2011	DBLP DOI BibTeX RDF
14	P. R. Mahalingam, C. Unnikrishnan	Portability in Incremental Compilers.	ACC (3)	2011	DBLP DOI BibTeX RDF
14	Edwin C. Brady	Epic - A Library for Generating Compilers.	Trends in Functional Programming	2011	DBLP DOI BibTeX RDF
14	Laurence E. Day, Graham Hutton	Towards Modular Compilers for Effects.	Trends in Functional Programming	2011	DBLP DOI BibTeX RDF
14	Xuejun Yang, Yang Chen 0024, Eric Eide, John Regehr	Finding and understanding bugs in C compilers.	PLDI	2011	DBLP DOI BibTeX RDF
14	Rajesh K. Gupta 0001, Vincent John Mooney (eds.)	Proceedings of the 14th International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2011, part of the Seventh Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14, 2011	CASES	2011	DBLP BibTeX RDF
14	Keith D. Cooper, John M. Mellor-Crummey, Vivek Sarkar (eds.)	Languages and Compilers for Parallel Computing - 23rd International Workshop, LCPC 2010, Houston, TX, USA, October 7-9, 2010. Revised Selected Papers	LCPC	2011	DBLP DOI BibTeX RDF
14	Antoine Floch, Tomofumi Yuki, Clément Guy, Steven Derrien, Benoît Combemale, Sanjay V. Rajopadhye, Robert B. France	Model-Driven Engineering and Optimizing Compilers: A Bridge Too Far?	MoDELS	2011	DBLP DOI BibTeX RDF
14	Manolis Katevenis, Margaret Martonosi, Christos Kozyrakis, Olivier Temam (eds.)	High Performance Embedded Architectures and Compilers, 6th International Conference, HiPEAC 2011, Heraklion, Crete, Greece, January 24-26, 2011. Proceedings	HiPEAC	2011	DBLP BibTeX RDF
14	Lan S. Bai	Simplifying Design of Wireless Sensor Networks with Programming Languages, Compilers, and Synthesis.		2011	RDF
14	Hugh Leather	Machine learning in compilers.		2011	RDF
14	Christoph Angerer	Exploiting Task-Order Information in Compilers for Shared-Memory Parallel Programs.		2011	RDF
14	Patry Zadarnowski	C, Lambda Calculus and Compiler Verification - a study in Haskell of purely-functional techniques for a formal specification of imperative programming languages and an epistemically-sound verification of their compilers.		2011	RDF
14	William George Osborne, Wayne Luk, José Gabriel F. Coutinho, Oskar Mencer	Energy Reduction by Systematic Run-Time Reconfigurable Hardware Deactivation.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Valeriu Beiu, Basheer A. M. Madappuram, Peter M. Kelly, Liam McDaid	On Two-Layer Brain-Inspired Hierarchical Topologies - A Rent's Rule Approach -.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Markus Rullmann, Renate Merker	A Cost Model for Partial Dynamic Reconfiguration.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Frederik Vandeputte, Lieven Eeckhout	Characterizing Time-Varying Program Behavior Using Phase Complexity Surfaces.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara	A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Timothy M. Jones 0001, Michael F. P. O'Boyle, Jaume Abella 0001, Antonio González 0001	Compiler Directed Issue Queue Energy Reduction.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Omer Khan, Sandip Kundu	Microvisor: A Runtime Architecture for Thermal Management in Chip Multiprocessors.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf	Advanced Packet Segmentation and Buffering Algorithms in Network Processors.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Michael B. Henry, Leyla Nazhandali	Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Magnus Jahre, Lasse Natvig	A High Performance Adaptive Miss Handling Architecture for Chip Multiprocessors.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Adam Welc, Bratin Saha	Software Transactional Memory Validation - Time and Space Considerations.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Frederik Vandeputte, Lieven Eeckhout	Finding Extreme Behaviors in Microprocessor Workloads.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya	Heterogeneous Design in Functional DIF.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez 0001, Alex Ramírez, Mateo Valero	A Highly Scalable Parallel Implementation of H.264.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan	A Modular Simulator Framework for Network-on-Chip Based Manycore Chips Using UNISIM.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Sai Prashanth Muralidhara, Mahmut T. Kandemir	Communication Based Proactive Link Power Management.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Nan Yuan, Lei Yu 0012, Dongrui Fan	An Efficient and Flexible Task Management for Many Cores.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Nan Wu 0003, Qianming Yang, Mei Wen, Yi He 0008, Ju Ren 0002, Maolin Guan, Chunyuan Zhang	Tiled Multi-Core Stream Architecture.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Ben Cope, Peter Y. K. Cheung, Wayne Luk, Lee W. Howes	A Systematic Design Space Exploration Approach to Customising Multi-Processor Architectures: Exemplified Using Graphics Processors.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Stanley Jaddoe, Mark Thompson 0001, Andy D. Pimentel	Signature-Based Calibration of Analytical Performance Models for System-Level Design Space Exploration.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Mohammad Ansari, Mikel Luján, Christos Kotselidis, Kim Jarvis, Chris C. Kirkham, Ian Watson	Transaction Reordering to Reduce Aborts in Software Transactional Memory.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Sandro Bartolini, Pierfrancesco Foglia, Cosimo Antonio Prete	Eighth MEDEA Workshop.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Tarik Saidani, Lionel Lacassagne, Joel Falcou, Claude Tadonki, Samir Bouaziz	Parallelization Schemes for Memory Optimization on the Cell Processor: A Case Study on the Harris Corner Detector.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF
14	Tobias Klug, Michael Ott 0001, Josef Weidendorfer, Carsten Trinitis	autopin - Automated Optimization of Thread-to-Core Pinning on Multicore Systems.	Trans. High Perform. Embed. Archit. Compil.	2011	DBLP DOI BibTeX RDF