Search results for "1149.4"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
86	Jari Hannu, Markku Moilanen	Methods of Testing Discrete Semiconductors in the 1149.4 Environment.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	1149.4, Discrete semiconductors, Boundary scan
77	Uros Kac, Franc Novak, Srecko Macek, Marina Santo Zarnik	Alternative Test Methods Using IEEE 1149.4.	DATE	2000	DBLP DOI BibTeX RDF
63	Juha Häkkinen, Pekka Syri, Juha-Veikko Voutilainen, Markku Moilanen	A Frequency Mixing and Sub-Sampling Based RF-Measurement Apparatus for IEEE 1149.4.	ITC	2004	DBLP DOI BibTeX RDF
63	John E. McDermid	Limited access testing: IEEE 1149.4-instrumentation and methods.	ITC	1998	DBLP DOI BibTeX RDF
59	Teuvo Saikkonen, Markku Moilanen	Component Value Calculations and Characterizations for Measurements in the IEEE 1149.4 Environment.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	IEEE 1149.4, Loading effect, Mixed-signal test
50	Pekka Syri, Juha Häkkinen, Markku Moilanen	IEEE 1149.4 Compatible ABMs for Basic RF Measurements.	DATE	2005	DBLP DOI BibTeX RDF
45	Jose M. M. Ferreira, Manuel G. O. Gericota, Antonio M. Cardoso	An integrated framework to support remote IEEE 1149.1 / 1149.4 design for test experiments.	Int. J. Online Eng.	2006	DBLP BibTeX RDF
45	Stephen K. Sunter, Adam Osseiran, Adam Cron, Neil G. Jacobson, Dave Bonnett, Bill Eklow, Carl Barnhart, Ben Bennetts	Status of IEEE Testability Standards 1149.4, 1532 and 1149.6.	DATE	2004	DBLP DOI BibTeX RDF
41	Stephen K. Sunter, Benoit Nadeau-Dostie	Complete, Contactless I/O Testing - Reaching the Boundary in Minimizing Digital IC Testing Cost.	ITC	2002	DBLP DOI BibTeX RDF
36	Gladys Omayra Ducoudray, Jaime Ramírez-Angulo	Innovative Built-In Self-Test Schemes for On-Chip Diagnosis, Compliant with the IEEE 1149.4 Mixed-Signal Test Bus Standard.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	iDD analysis, built-in self-test, mixed-signal test
36	Uros Kac, Franc Novak, Florence Azaïs, Pascal Nouet, Michel Renovell	Extending IEEE Std. 1149.4 Analog Boundary Modules to Enhance Mixed-Signal Test.	IEEE Des. Test Comput.	2003	DBLP DOI BibTeX RDF
36	Chauchin Su, Chih-Hu Wang, Wei-Juo Wang, I. S. Tseng	1149.4 Based On-Line Quiescent State Monitoring Technique.	VTS	2003	DBLP DOI BibTeX RDF
36	G. O. D. Acevedo, Jaime Ramírez-Angulo	Built-in self-test scheme for on-chip diagnosis, compliant with the IEEE 1149.4 mixed-signal test bus standard.	ISCAS (1)	2002	DBLP DOI BibTeX RDF
27	Hari Vijay Venkatanarayanan, Michael L. Bushnell	An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip.	VLSI Design	2006	DBLP DOI BibTeX RDF
27	Chauchin Su, Yue-Tsang Chen	Intrinsic response extraction for the removal of the parasiticeffects in analog test buses.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2000	DBLP DOI BibTeX RDF
23	Andrzej Rucinski 0002, Barbara Dziurla-Rucinska	Boundary Scan as a Test Solution in Microelectronics Curricula.	DELTA	2002	DBLP DOI BibTeX RDF	IEEE 1149.4 standard, Education, Boundary scan
23	Jari Hannu, Juha Häkkinen, Juha-Veikko Voutilainen, Heli Jantunen, Markku Moilanen	Current State of the Mixed-Signal Test Bus 1149.4.	J. Electron. Test.	2012	DBLP DOI BibTeX RDF
23	Manuel C. Felgueiras, Gustavo R. Alves, José Manuel Martins Ferreira	An embedded 1149.4 extension to support mixed-signal debugging.	Microelectron. J.	2011	DBLP DOI BibTeX RDF
23	Wimol San-Um, Masayoshi Tachibana	A Fault Signature Characterization Based Analog Circuit Testing Scheme and the Extension of IEEE 1149.4 Standard.	IEICE Trans. Inf. Syst.	2010	DBLP DOI BibTeX RDF
23	Juha-Veikko Voutilainen, Jussi Putaala, Markku Moilanen, Heli Jantunen	A prognostic method for the embedded failure monitoring of solder interconnections with 1149.4 test bus architecture.	Microelectron. J.	2009	DBLP DOI BibTeX RDF
23	Pekka Syri, Juha Häkkinen, Markku Moilanen	IEEE 1149.4 Compatible ABMs for Basic RF Measurements	CoRR	2007	DBLP BibTeX RDF
23	Srividya Sundar, Bruce C. Kim, Toby Byrd, Felipe Toledo, Sudhir Wokhlu, Erika Beskar, Raul Rousselin, David Cotton, Gary Kendall	Low cost automatic mixed-signal board test using IEEE 1149.4.	ITC	2007	DBLP DOI BibTeX RDF
23	Gladys Omayra Ducoudray Acevedo, Jaime Ramírez-Angulo	Innovative Built-In Self-Test Schemes for On-Chip Diagnosis, Compliant with the IEEE 1149.4 Mixed-Signal Test Bus Standard.	LATW	2001	DBLP BibTeX RDF
23	Stephen K. Sunter, Ken Filliter, Joe Woo, Pat McHugh	A general purpose 1149.4 IC with HF analog test capabilities.	ITC	2001	DBLP DOI BibTeX RDF
23	José Vicente Calvano, Vladimir Castro Alves, Marcelo Soares Lubaszewski	Mixed-Signal Test Bus IEEE 1149.4 Compatible BIST Scheme for Classical 2nd Order Filter Approximations using the Transient Response Analysis Method.	LATW	2000	DBLP BibTeX RDF
14	Carl Jeffrey, Reuben Cutajar, Stephen Prosser, M. Lickess, Andrew Richardson 0001, Stephen Riches	The Integration of On-Line Monitoring and Reconfiguration Functions using IEEE1149.4 Into a Safety Critical Automotive Electronic Control Unit.	DATE	2005	DBLP DOI BibTeX RDF
14	Rodger Schuttert, D. C. L. (Erik) van Geest, A. Kumar	On-Chip Mixed-Signal Test Structures Re-used for Board Test.	ITC	2004	DBLP DOI BibTeX RDF
14	Stephen K. Sunter	Testing High Frequency ADCs and DACs with a Low Frequency Analog Bus.	ITC	2003	DBLP DOI BibTeX RDF
14	José Vicente Calvano, Vladimir Castro Alves, Antonio Carneiro de Mesquita Filho, Marcelo Lubaszewski	Filters Designed for Testability Wrapped on the Mixed-Signal Test Bus.	VTS	2002	DBLP DOI BibTeX RDF	BIST, design for test, analog test, mixed-signal test