Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
98 | Shin-ichi Minato |
Streaming BDD Manipulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 51(5), pp. 474-485, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
algorithm, verification, testing, data structure, logic design, binary decision diagram, BDD, combinatorial problem, VLSI CAD |
89 | Frank Reffel |
BDD-Nodes Can Be More Expressive. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASIAN ![In: Advances in Computing Science - ASIAN'99, 5th Asian Computing Science Conference, Phuket, Thailand, December 10-12, 1999, Proceedings, pp. 294-307, 1999, Springer, 3-540-66856-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
80 | Lei Cheng 0001, Deming Chen, Martin D. F. Wong |
DDBDD: Delay-Driven BDD Synthesis for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(7), pp. 1203-1213, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
80 | Lei Cheng 0001, Deming Chen, Martin D. F. Wong |
DDBDD: Delay-Driven BDD Synthesis for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 910-915, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
72 | Rasa Remenyte, John D. Andrews |
A Simple Component Connection Approach for Fault Tree Conversion to Binary Decision Diagram. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARES ![In: Proceedings of the The First International Conference on Availability, Reliability and Security, ARES 2006, The International Dependability Conference - Bridging Theory and Practice, April 20-22 2006, Vienna University of Technology, Austria, pp. 449-457, 2006, IEEE Computer Society, 0-7695-2567-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
71 | Matthias Krause 0001, Dirk Stegemann |
Reducing the Space Complexity of BDD-Based Attacks on Keystream Generators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FSE ![In: Fast Software Encryption, 13th International Workshop, FSE 2006, Graz, Austria, March 15-17, 2006, Revised Selected Papers, pp. 163-178, 2006, Springer, 3-540-36597-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Bluetooth E0, GSM A5/1, cryptanalysis, Stream cipher, BDD, self-shrinking generator |
71 | Yanyan Xu 0001, Weiya Yue, Kaile Su |
The BDD-Based Dynamic A* Algorithm for Real-Time Replanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FAW ![In: Frontiers in Algorithmics, Third International Workshop, FAW 2009, Hefei, China, June 20-23, 2009. Proceedings, pp. 271-282, 2009, Springer, 978-3-642-02269-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
71 | Ronnie L. Wright, Michael A. Shanblatt |
Reducing BDD Size by Exploiting Structural Connectivity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 132-135, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
70 | Gopal Paul, Ajit Pal, Bhargab B. Bhattacharya |
On finding the minimum test set of a BDD-based circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 169-172, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
binary decision diagram (BDD), multiplexors, network flow, stuck-at faults, VLSI testing |
63 | Dragan Jankovic, Radomir S. Stankovic, Rolf Drechsler |
Decision Diagram Method for Calculation of Pruned Walsh Transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(2), pp. 147-157, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Walsh, pruned spectrum, Logic synthesis, BDD, spectral techniques |
62 | Tsutomu Sasao, Munehiro Matsuura |
BDD representation for incompletely specifiedvmultiple-output logic functions and its applications to functional decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 373-378, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
code converter, BDD, cascade, characteristic function, incompletely specified function |
62 | Andrei Rimsa, Luis E. Zárate, Mark A. J. Song |
Evaluation of Different BDD Libraries to Extract Concepts in FCA - Perspectives and Limitations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCS (1) ![In: Computational Science - ICCS 2009, 9th International Conference, Baton Rouge, LA, USA, May 25-27, 2009, Proceedings, Part I, pp. 367-376, 2009, Springer, 978-3-642-01969-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Zero-Supressed Binary Decision Diagrams, Formal Concept Analysis, Binary Decision Diagrams, Formal Context, Formal Concept |
62 | Zhihua Tang, Joanne Bechta Dugan |
BDD-based reliability analysis of phased-mission systems with multimode failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 55(2), pp. 350-360, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
62 | William N. N. Hung, Xiaoyu Song, El Mostapha Aboulhamid, Michael A. Driscoll |
BDD minimization by scatter search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(8), pp. 974-979, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
61 | Xinyu Zang, Dazhi Wang, Hairong Sun, Kishor S. Trivedi |
A BDD-Based Algorithm for Analysis of Multistate Systems with Multistate Components. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(12), pp. 1608-1618, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Binary Decision Diagram (BDD), multistate component, multistate fault tree, multistate system, blocking probability |
54 | Chung-Hung Lai, Tien-Fu Chen |
Compressing inverted files in scalable information systems by binary decision diagram encoding . ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the 2001 ACM/IEEE conference on Supercomputing, Denver, CO, USA, November 10-16, 2001, CD-ROM, pp. 60, 2001, ACM, 1-58113-293-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
scalable information systems, information retrieval, BDD, inverted file |
54 | Seiichiro Tani, Kiyoharu Hamaguchi, Shuzo Yajima |
The Complexity of the Optimal Variable Ordering Problems of Shared Binary Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISAAC ![In: Algorithms and Computation, 4th International Symposium, ISAAC '93, Hong Kong, December 15-17, 1993, Proceedings, pp. 389-398, 1993, Springer, 3-540-57568-5. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
53 | Dirk Stegemann |
Extended BDD-Based Cryptanalysis of Keystream Generators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Selected Areas in Cryptography ![In: Selected Areas in Cryptography, 14th International Workshop, SAC 2007, Ottawa, Canada, August 16-17, 2007, Revised Selected Papers, pp. 17-35, 2007, Springer, 978-3-540-77359-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
F-FCSR, cryptanalysis, Stream cipher, BDD, Trivium, Grain |
53 | Ziv Nevo, Monica Farkash |
Distributed dynamic BDD reordering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 223-228, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
model checking, distributed computing, BDD, reordering |
53 | Farn Wang |
Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 16th International Conference, CAV 2004, Boston, MA, USA, July 13-17, 2004, Proceedings, pp. 295-307, 2004, Springer, 3-540-22342-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
model-checking, verification, data-structures, BDD, hybrid automata |
53 | Farn Wang |
Efficient Verification of Timed Automata with BDD-Like Data-Structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VMCAI ![In: Verification, Model Checking, and Abstract Interpretation, 4th International Conference, VMCAI 2003, New York, NY, USA, January 9-11, 2002, Proceedings, pp. 189-205, 2003, Springer, 3-540-00348-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
model-checking, verification, data-structures, timed automata, BDD |
53 | Congguang Yang, Maciej J. Ciesielski, Vigyan Singhal |
BDD Decomposition for Efficient Logic Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 626-, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Decomposition, Logic Synthesis, BDD, Dominators |
53 | Avi Yadgar, Orna Grumberg, Assaf Schuster |
Hybrid BDD and All-SAT Method for Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Languages: From Formal to Natural ![In: Languages: From Formal to Natural, Essays Dedicated to Nissim Francez on the Occasion of His 65th Birthday, pp. 228-244, 2009, Springer, 978-3-642-01747-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
53 | Toru Akishita, Masanobu Katagi, Yoshikazu Miyato, Asami Mizuno, Kyoji Shibutani |
A Practical DPA Countermeasure with BDD Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CARDIS ![In: Smart Card Research and Advanced Applications, 8th IFIP WG 8.8/11.2 International Conference, CARDIS 2008, London, UK, September 8-11, 2008. Proceedings, pp. 206-217, 2008, Springer, 978-3-540-85892-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
dual-rail pre-charge logic, DPA, Binary Decision Diagram, countermeasure |
53 | Dirk Beyer 0001 |
Improvements in BDD-Based Reachability Analysis of Timed Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FME ![In: FME 2001: Formal Methods for Increasing Software Productivity, International Symposium of Formal Methods Europe, Berlin, Germany, March 12-16, 2001, Proceedings, pp. 318-343, 2001, Springer, 3-540-41791-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Real-time systems, Formal verification, Timed automata, BDDs, Discretization |
53 | Michael Baldamus, Klaus Schneider 0001 |
The BDD Space Complexity of Different Forms of Concurrency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: 2nd International Conference on Application of Concurrency to System Design (ACSD 2001), 25-30 June 2001, Newcastle upon Tyne, UK, pp. 231-, 2001, IEEE Computer Society, 0-7695-1071-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
45 | Ildefonso Montero, Joaquín Peña, Antonio Ruiz Cortés |
Representing Runtime Variability in Business-Driven Development Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCBSS ![In: Seventh International Conference on Composition-Based Software Systems (ICCBSS 2008), February, 25-29, 2008, Madrid, Spain, Proceedings, pp. 241, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Runtime Variability, Modeling business processes, BDD |
45 | Guoqing Xu 0001, Atanas Rountev |
Merging equivalent contexts for scalable heap-cloning-based context-sensitive points-to analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSTA ![In: Proceedings of the ACM/SIGSOFT International Symposium on Software Testing and Analysis, ISSTA 2008, Seattle, WA, USA, July 20-24, 2008, pp. 225-236, 2008, ACM, 978-1-60558-050-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
pointer analysis, context sensitivity, points-to analysis |
45 | Yi-Kai Liu 0001, Vadim Lyubashevsky, Daniele Micciancio |
On Bounded Distance Decoding for General Lattices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPROX-RANDOM ![In: Approximation, Randomization, and Combinatorial Optimization. Algorithms and Techniques, 9th International Workshop on Approximation Algorithms for Combinatorial Optimization Problems, APPROX 2006 and 10th International Workshop on Randomization and Computation, RANDOM 2006, Barcelona, Spain, August 28-30 2006, Proceedings, pp. 450-461, 2006, Springer, 3-540-38044-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
45 | Dazhi Wang, Kishor S. Trivedi |
Computing steady-state mean time to failure for non-coherent repairable systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 54(3), pp. 506-516, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Pascal Fontaine, E. Pascal Gribomont |
Using BDDs with Combinations of Theories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LPAR ![In: Logic for Programming, Artificial Intelligence, and Reasoning, 9th International Conference, LPAR 2002, Tbilisi, Georgia, October 14-18, 2002, Proceedings, pp. 190-201, 2002, Springer, 3-540-00010-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
45 | Gianpiero Cabodi |
Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 13th International Conference, CAV 2001, Paris, France, July 18-22, 2001, Proceedings, pp. 118-130, 2001, Springer, 3-540-42345-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
45 | Congguang Yang, Maciej J. Ciesielski |
Synthesis for Mixed CMOS/PTl Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 750, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Farn Wang |
Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 31(1), pp. 38-51, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
model-checking, verification, Data-structures, BDD, hybrid automata |
44 | Farn Wang |
Efficient verification of timed automata with BDD-like data structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 6(1), pp. 77-97, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Model checking, Verification, Data structures, Timed automata, BDD |
44 | Navin Vemuri, Priyank Kalla, Russell Tessier |
BDD-based logic synthesis for LUT-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 7(4), pp. 501-525, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
FPGA, decomposition, logic synthesis, BDD |
44 | Justin E. Harlow III, Franc Brglez |
Design of experiments and evaluation of BDD ordering heuristics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 3(2), pp. 193-206, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Benchmarking, BDD, Design of experiments |
44 | Wei Zhang 0004, Hua Yan, Haiyan Zhao, Zhi Jin |
A BDD-Based Approach to Verifying Clone-Enabled Feature Models' Constraints and Customization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSR ![In: High Confidence Software Reuse in Large Systems, 10th International Conference on Software Reuse, ICSR 2008, Beijing, China, May 25-29, 2008, Proceedings, pp. 186-199, 2008, Springer, 978-3-540-68062-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Clonable features, Verification, Constraints, Customization, Feature models |
44 | Florian Pigorsch, Christoph Scholl 0001, Stefan Disch |
Advanced Unbounded Model Checking Based on AIGs, BDD Sweeping, And Quantifier Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, 6th International Conference, FMCAD 2006, San Jose, California, USA, November 12-16, 2006, Proceedings, pp. 89-96, 2006, IEEE Computer Society, 0-7695-2707-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Rupesh S. Shelar, Sachin S. Sapatnekar |
BDD decomposition for delay oriented pass transistor logic synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(8), pp. 957-970, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
44 | Rüdiger Ebendt, Rolf Drechsler |
Quasi-Exact BDD Minimization Using Relaxed Best-First Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), New Frontiers in VLSI Design, 11-12 May 2005, Tampa, FL, USA, pp. 59-64, 2005, IEEE Computer Society, 0-7695-2365-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
44 | Veronika Ortner, Norbert Schirmer |
Verification of BDD Normalization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TPHOLs ![In: Theorem Proving in Higher Order Logics, 18th International Conference, TPHOLs 2005, Oxford, UK, August 22-25, 2005, Proceedings, pp. 261-277, 2005, Springer, 3-540-28372-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
44 | Jean-Michel Couvreur |
A BDD-Like Implementation of an Automata Package. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIAA ![In: Implementation and Application of Automata, 9th International Conference, CIAA 2004, Kingston, Canada, July 22-24, 2004, Revised Selected Papers, pp. 310-311, 2004, Springer, 3-540-24318-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
44 | Gilles Audemard, Lakhdar Sais |
SAT Based BDD Solver for Quantified Boolean Formulas. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTAI ![In: 16th IEEE International Conference on Tools with Artificial Intelligence (ICTAI 2004), 15-17 November 2004, Boca Raton, FL, USA, pp. 82-89, 2004, IEEE Computer Society, 0-7695-2236-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
44 | Amit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz |
A high-performance architecture and BDD-based synthesis methodology for packet classification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(6), pp. 698-709, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
44 | Dirk Beyer 0001, Claus Lewerentz, Andreas Noack |
Rabbit: A Tool for BDD-Based Verification of Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 15th International Conference, CAV 2003, Boulder, CO, USA, July 8-12, 2003, Proceedings, pp. 122-125, 2003, Springer, 3-540-40524-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
44 | Guoqiang Pan, Moshe Y. Vardi |
Optimizing a BDD-Based Modal Solver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CADE ![In: Automated Deduction - CADE-19, 19th International Conference on Automated Deduction Miami Beach, FL, USA, July 28 - August 2, 2003, Proceedings, pp. 75-89, 2003, Springer, 3-540-40559-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
44 | Congguang Yang, Maciej J. Ciesielski |
BDS: a BDD-based logic optimization system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(7), pp. 866-876, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
44 | Per Lindgren, Mikael Kerttu, Mitchell A. Thornton, Rolf Drechsler |
Low power optimization technique for BDD mapped circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 615-621, 2001, ACM, 0-7803-6634-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
44 | Christoph Meinel, Harald Sack, Arno Wagner |
WWW.BDD-Portal.ORG: An Experimentation Platform for Binary Decision Diagram Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Experimental Algorithmics ![In: Experimental Algorithmics, From Algorithm Design to Robust and Efficient Software [Dagstuhl seminar, September 2000], pp. 127-138, 2000, Springer, 3-540-00346-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Priyank Kalla, Zhihong Zeng, Maciej J. Ciesielski, ChiLai Huang |
A BDD-Based Satisfiability Infrastructure Using the Unate Recursive Paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 232-236, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Tevfik Bultan |
BDD vs. Constraint-Based Model Checking: An Experimental Evaluation for Asynchronous Concurrent Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for Construction and Analysis of Systems, 6th International Conference, TACAS 2000, Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000, Berlin, Germany, March 25 - April 2, 2000, Proceedings, pp. 441-455, 2000, Springer, 3-540-67282-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Kenneth Y. Yun, Bill Lin 0001, David L. Dill, Srinivas Devadas |
BDD-based synthesis of extended burst-mode controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(9), pp. 782-792, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
44 | Kim Milvang-Jensen, Alan J. Hu |
BDDNOW: A Parallel BDD Package. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, Second International Conference, FMCAD '98, Palo Alto, California, USA, November 4-6, 1998, Proceedings, pp. 501-507, 1998, Springer, 3-540-65191-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
44 | Bwolen Yang, Randal E. Bryant, David R. O'Hallaron, Armin Biere, Olivier Coudert, Geert Janssen, Rajeev K. Ranjan 0001, Fabio Somenzi |
A Performance Study of BDD-Based Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, Second International Conference, FMCAD '98, Palo Alto, California, USA, November 4-6, 1998, Proceedings, pp. 255-289, 1998, Springer, 3-540-65191-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
44 | Youpyo Hong, Peter A. Beerel, Luciano Lavagno, Ellen Sentovich |
Don't Care-Based BDD Minimization for Embedded Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 506-509, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
low power, synthesis, placement, flip-flops, voltage scaling, codec, MPEG4, level converters, design automatian |
44 | Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenneth L. McMillan |
Safe BDD Minimization Using Don't Cares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997., pp. 208-213, 1997, ACM Press, 0-89791-920-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
43 | Liudong Xing, Joanne Bechta Dugan |
Comments on PMS BDD generation in 'A BDD-based algorithm for Reliability Analysis of phased-mission systems'. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 53(2), pp. 169-173, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
36 | Felipe Machado, Teresa Riesgo, Yago Torroja |
Disjoint Region Partitioning for Probabilistic Switching Activity Estimation at Register Transfer Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers, pp. 399-408, 2008, Springer, 978-3-540-95947-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
activity estimation, CAD, VHDL, BDD, power estimation, RTL, Switching activity, circuit partition, digital circuit design |
36 | Yaniv Shaked, Avishai Wool |
Cryptanalysis of the Bluetooth E0 Cipher Using OBDD's. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISC ![In: Information Security, 9th International Conference, ISC 2006, Samos Island, Greece, August 30 - September 2, 2006, Proceedings, pp. 187-202, 2006, Springer, 3-540-38341-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Cryptanalysis, Stream cipher, Bluetooth, BDD |
36 | Jon T. Butler, Tsutomu Sasao, Munehiro Matsuura |
Average Path Length of Binary Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(9), pp. 1041-1053, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
average path length, worst-case path length, APL, Binary decision diagrams, BDD |
36 | Tsutomu Sasao, Munehiro Matsuura |
A method to decompose multiple-output logic functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 428-433, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
FPGA, BDD, cascade, characteristic function |
36 | Wolfgang Günther 0001, Rolf Drechsler |
Linear Transformations and Exact Minimization of BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 325-330, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
FPGA, synthesis, BDD, linear transformation, variable ordering, spectral transformation |
36 | Yung-Chih Chen, Chun-Yao Wang |
An Implicit Approach to Minimizing Range-Equivalent Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11), pp. 1942-1955, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
36 | Dazhi Wang, Kishor S. Trivedi |
Reliability Analysis of Phased-Mission System With Independent Component Repairs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 56(3), pp. 540-551, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
36 | Jean-Michel Couvreur, Yann Thierry-Mieg |
Hierarchical Decision Diagrams to Exploit Model Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FORTE ![In: Formal Techniques for Networked and Distributed Systems - FORTE 2005, 25th IFIP WG 6.1 International Conference, Taipei, Taiwan, October 2-5, 2005, Proceedings, pp. 443-457, 2005, Springer, 3-540-29189-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Rüdiger Ebendt, Wolfgang Günther 0001, Rolf Drechsler |
Minimization of the expected path length in BDDs based on local changes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 865-870, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
36 | Mohammad Awedh, Fabio Somenzi |
Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings, pp. 230-244, 2004, Springer, 3-540-23738-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
36 | Marc Berndl, Ondrej Lhoták, Feng Qian, Laurie J. Hendren, Navindra Umanee |
Points-to analysis using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation 2003, San Diego, California, USA, June 9-11, 2003, pp. 103-114, 2003, ACM, 1-58113-662-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
binary decision diagrams, points-to analysis |
36 | Gianpiero Cabodi, Paolo Camurati, Stefano Quer |
Can BDDs compete with SAT solvers on bounded model checking? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 117-122, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
model checking, formal verification, SAT, BDDs |
36 | Viresh Paruthi, Andreas Kuehlmann |
Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 459-464, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
36 | E. Allen Emerson, Richard J. Trefler |
From Asymmetry to Full Symmetry: New Techniques for Symmetry Reduction in Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHARME ![In: Correct Hardware Design and Verification Methods, 10th IFIP WG 10.5 Advanced Research Working Conference, CHARME '99, Bad Herrenalb, Germany, September 27-29, 1999, Proceedings, pp. 142-156, 1999, Springer, 3-540-66559-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
36 | Chia-Pin R. Liu, Jacob A. Abraham |
Transistor Level Synthesis for Static CMOS Combinational Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 172-175, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
36 | Henrik Reif Andersen, Henrik Hulgaard |
Boolean Expression Diagrams (Extended Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
LICS ![In: Proceedings, 12th Annual IEEE Symposium on Logic in Computer Science, Warsaw, Poland, June 29 - July 2, 1997, pp. 88-98, 1997, IEEE Computer Society, 0-8186-7925-5. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
36 | Kenneth L. McMillan |
Hierarchical Representations of Discrete Functions, with Application to Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 6th International Conference, CAV '94, Stanford, California, USA, June 21-23, 1994, Proceedings, pp. 41-54, 1994, Springer, 3-540-58179-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
35 | Markus Behle |
On threshold BDDs and the optimal variable ordering problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comb. Optim. ![In: J. Comb. Optim. 16(2), pp. 107-118, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Threshold BDD, 0/1 integer programming, Optimal variable ordering, Variable ordering spectrum, Binary decision diagram, Knapsack |
35 | P. W. Chandana Prasad, Ali Assi 0001, Azam Beg |
Binary Decision Diagrams and neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 39(3), pp. 301-320, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
BDD complexity, Neural network, Binary decision diagrams, Complexity estimation |
35 | Robert Wille, Rolf Drechsler |
BDD-based synthesis of reversible logic for large functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 270-275, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
synthesis, decision diagrams, reversible logic, quantum logic |
35 | Ralf Wimmer 0001, Marc Herbstritt, Bernd Becker 0001 |
Optimization techniques for BDD-based bisimulation computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 405-410, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
binary decision diagrams, bisimulation, state space reduction, state space explosion, symbolic methods |
35 | Rüdiger Ebendt, Rolf Drechsler |
Effect of improved lower bounds in dynamic BDD reordering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5), pp. 902-909, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Gianpiero Cabodi, Marco Murciano |
BDD-Based Hardware Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SFM ![In: Formal Methods for Hardware Verification, 6th International School on Formal Methods for the Design of Computer, Communication, and Software Systems, SFM 2006, Bertinoro, Italy, May 22-27, 2006, Advanced Lectures, pp. 78-107, 2006, Springer, 978-3-540-34304-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Weiya Yue, Yanyan Xu 0001, Kaile Su |
BDDRPA*: An Efficient BDD-Based Incremental Heuristic Search Algorithm for Replanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Australian Conference on Artificial Intelligence ![In: AI 2006: Advances in Artificial Intelligence, 19th Australian Joint Conference on Artificial Intelligence, Hobart, Australia, December 4-8, 2006, Proceedings, pp. 627-636, 2006, Springer, 3-540-49787-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Dennis Wu, Jianwen Zhu |
BDD-based two variable sharing extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1031-1034, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Rüdiger Ebendt, Rolf Drechsler |
Lower bounds for dynamic BDD reordering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 579-582, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Yen-Tai Lai, Yung-Chuan Jiang, Hong-Ming Chu |
BDD decomposition for mixed CMOS/PTL logic circuit synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5649-5652, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Görschwin Fey, Junhao Shi, Rolf Drechsler |
BDD Circuit Optimization for Path Delay Fault Testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August - 3 September 2004, Rennes, France, pp. 168-172, 2004, IEEE Computer Society, 0-7695-2203-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Jean Vuillemin, Frédéric Béal |
On the BDD of a Random Boolean Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASIAN ![In: Advances in Computer Science - ASIAN 2004, Higher-Level Decision Making, 9th Asian Computing Science Conference, Dedicated to Jean-Louis Lassez on the Occasion of His 5th Cycle Birthday, Chiang Mai, Thailand, December 8-10, 2004, Proceedings, pp. 483-493, 2004, Springer, 3-540-24087-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Debashis Sahoo, Subramanian K. Iyer, Jawahar Jain, Christian Stangier, Amit Narayan, David L. Dill, E. Allen Emerson |
A Partitioning Methodology for BDD-Based Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings, pp. 399-413, 2004, Springer, 3-540-23738-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Yung-Ruei Chang, Hung-Yau Lin, Sy-Yen Kuo |
Reliability Evaluation of Dependable Distributed Computing Systems Based on Recursive Merge and BDD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 10th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2004), 3-5 March 2004, Papeete, Tahiti, pp. 197-206, 2004, IEEE Computer Society, 0-7695-2076-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Gianpiero Cabodi, Sergio Nocco, Stefano Quer |
Improving SAT-Based Bounded Model Checking by Means of BDD-Based Approximate Traversals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10898-10905, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Geert Janssen |
A Consumer Report on BDD Packages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2003, Sao Paulo, Brazil, September 8-11, 2003, pp. 217-, 2003, IEEE Computer Society, 0-7695-2009-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Rüdiger Ebendt |
Reducing the number of variable movements in exact BDD minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 605-608, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Gianpiero Cabodi, Sergio Nocco, Stefano Quer |
Mixing Forward and Backward Traversals in Guided-Prioritized BDD-Based Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 14th International Conference, CAV 2002,Copenhagen, Denmark, July 27-31, 2002, Proceedings, pp. 471-484, 2002, Springer, 3-540-43997-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Sava Krstic, John Matthews |
Verifying BDD Algorithms through Monadic Interpretation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VMCAI ![In: Verification, Model Checking, and Abstract Interpretation, Third International Workshop, VMCAI 2002, Venice, Italy, January 21-22, 2002, Revised Papers, pp. 182-195, 2002, Springer, 3-540-43631-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Alessandro Cimatti, Enrico Giunchiglia, Marco Pistore, Marco Roveri, Roberto Sebastiani, Armando Tacchella |
Integrating BDD-Based and SAT-Based Symbolic Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FroCoS ![In: Frontiers of Combining Systems, 4th International Workshop, FroCoS 2002, Santa Margherita Ligure, Italy, April 8-10, 2002, Proceedings, pp. 49-56, 2002, Springer, 3-540-43381-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Congguang Yang, Maciej J. Ciesielski, Vigyan Singhal |
BDS: a BDD-based logic optimization system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 92-97, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
35 | Gianpiero Cabodi, Paolo Camurati, Stefano Quer |
Improving the efficiency of BDD-based operators by means of partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(5), pp. 545-556, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
35 | Justin E. Harlow III, Franc Brglez |
Design of Experiments for Evaluation of BDD Packages Using Controlled Circuit Mutations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, Second International Conference, FMCAD '98, Palo Alto, California, USA, November 4-6, 1998, Proceedings, pp. 64-81, 1998, Springer, 3-540-65191-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
34 | Yanyan Xu, Weiya Yue |
A Generalized Framework for BDD-based Replanning A* Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SNPD ![In: 10th ACIS International Conference on Software Engineering, Artificial Intelligences, Networking and Parallel/Distributed Computing, SNPD 2009, in conjunction with 3rd International Workshop on e-Activity, IWEA 2009, 1st International Workshop on Enterprise Architecture Challenges and Responses, WEACR 2009, Catholic University of Daegu, Daegu, Korea, 27-29 May 2009, pp. 133-139, 2009, IEEE Computer Society, 978-0-7695-3642-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
BDD-based search, heuristic search-based planning, A*, replanning, incremental search |
34 | Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013, pp. 1014-1017, 2013, EDA Consortium San Jose, CA, USA / ACM DL, 978-1-4503-2153-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|