Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
188 | Yen-Jen Chang |
Lazy BTB: reduce BTB energy consumption using dynamic profiling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 917-922, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
145 | Tao Li 0006, Ravi Bhargava, Lizy Kurian John |
Rehashable BTB: An Adaptive Branch Target Buffer to Improve the Target Predictability of Java Code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2002, 9th International Conference, Bangalore, India, December 18-21, 2002, Proceedings, pp. 597-608, 2002, Springer, 3-540-00303-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
135 | Weiyu Tang, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta 0001 |
Integrated I-cache Way Predictor and Branch Target Buffer to Reduce Energy Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISHPC ![In: High Performance Computing, 4th International Symposium, ISHPC 2002, Kansai Science City, Japan, May 15-17, 2002, Proceedings, pp. 120-132, 2002, Springer, 3-540-43674-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
128 | Ioana Burcea, Andreas Moshovos |
Phantom-BTB: a virtualized branch target buffer design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009, pp. 313-324, 2009, ACM, 978-1-60558-406-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
predictor metadata prefetching, predictor virtualization, branch target buffer |
122 | Cheol Kim, Sung Chung, Chu Shik Jhon |
A Power-Aware Branch Predictor by Accessing the BTB Selectively. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 20(5), pp. 607-614, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
BTB, PHT, low power design, embedded processor, branch predictor |
119 | Jan Hoogerbrugge |
Cost-Efficient Branch Target Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference, Munich, Germany, August 29 - September 1, 2000, Proceedings., pp. 950-959, 2000, Springer, 3-540-67956-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
102 | Sung-Hoon Shim, Jong Wook Kwak, Cheol Hong Kim, Sung Tae Jhang, Chu Shik Jhon |
Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, 2005, Proceedings, pp. 162-171, 2005, Springer, 3-540-26969-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
94 | Noel Tomás, Julio Sahuquillo, Salvador Petit, Pedro López 0001 |
Reducing the Number of Bits in the BTB to Attack the Branch Predictor Hot-Spot. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2008 - Parallel Processing, 14th International Euro-Par Conference, Las Palmas de Gran Canaria, Spain, August 26-29, 2008, Proceedings, pp. 317-326, 2008, Springer, 978-3-540-85450-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
62 | Nadav Levison, Shlomo Weiss |
Low power branch prediction for embedded application processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 67-72, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
ARM cortex, BTB, mobile, embedded, power, battery |
61 | Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti |
Minimizing Energy Consumption for High-Performance Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 199-, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
BTB size, voltage reduction, frequency reduction, parallel processing, low power, energy savings, MPEG-2, cache size |
60 | Shyh-An Chi, R.-Ming Shiu, Jih-Ching Chiu, Si-En Chang, Chung-Ping Chung |
Instruction Cache Prefetching with Extended BTB. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 11-13 December 1997, Seoul, Korea, Proceedings, pp. 360-, 1997, IEEE Computer Society, 0-8186-8227-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
53 | Truls Asheim, Boris Grot, Rakesh Kumar 0003 |
BTB-X: A Storage-Effective BTB Organization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 20(2), pp. 134-137, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
51 | Hans Vandierendonck, André Seznec |
Speculative return address stack management revisited. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 5(3), pp. 15:1-15:20, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Return address prediction, back-up predictor, corruption detection |
51 | Juan Carlos Martínez Santos, Yunsi Fei |
Leveraging speculative architectures for run-time program validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 498-505, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
51 | Hisataka Maruyama, Fumihito Arai, Toshio Fukuda |
Gel-tool Sensor Positioned by Optical Tweezers for Local pH Measurement in a Microchip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: 2007 IEEE International Conference on Robotics and Automation, ICRA 2007, 10-14 April 2007, Roma, Italy, pp. 806-811, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
51 | Kaveh Jokar Deris, Amirali Baniasadi |
Branchless cycle prediction for embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2006 ACM Symposium on Applied Computing (SAC), Dijon, France, April 23-27, 2006, pp. 928-932, 2006, ACM, 1-59593-108-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
low-power design, embedded processors, branch target buffer, power-aware architectures |
51 | Tao Zhang 0037, Weidong Shi, Santosh Pande |
Static Techniques to Improve Power Efficiency of Branch Predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2004, 11th International Conference, Bangalore, India, December 19-22, 2004, Proceedings, pp. 274-285, 2004, Springer, 3-540-24129-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
51 | Weidong Shi, Tao Zhang 0037, Santosh Pande |
Static Techniques to Improve Power Efficiency of Branch Predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004, Proceedings, pp. 385-398, 2004, Springer, 3-540-23003-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
51 | Peter Petrov, Alex Orailoglu |
Low-power Branch Target Buffer for Application-Specific Embedded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), Architectures, Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey, pp. 158-165, 2003, IEEE Computer Society, 0-7695-2003-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
51 | Brad Calder, Dirk Grunwald |
Next Cache Line and Set Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 22nd Annual International Symposium on Computer Architecture, ISCA '95, Santa Margherita Ligure, Italy, June 22-24, 1995, pp. 287-296, 1995, ACM, 0-89791-698-0. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
43 | Sung Woo Chung, Sung-Bae Park |
A Low Power Branch Predictor to Selectively Access the BTB. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004, Proceedings, pp. 374-384, 2004, Springer, 3-540-23003-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
43 | Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami |
A Low Energy Set-Associative I-Cache with Extended BTB. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 20th International Conference on Computer Design (ICCD 2002), VLSI in Computers and Processors, 16-18 September 2002, Freiburg, Germany, Proceedings, pp. 187-, 2002, IEEE Computer Society, 0-7695-1700-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
34 | Hisataka Maruyama, Fumihito Arai, Toshio Fukuda |
Fabrication of functional gel-microbead for local environment measurement in microchip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: 2008 IEEE International Conference on Robotics and Automation, ICRA 2008, May 19-23, 2008, Pasadena, California, USA, pp. 305-310, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Chengmo Yang, Alex Orailoglu |
Power efficient branch prediction through early identification of branch addresses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 169-178, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
low-power design, application-specific processors, dynamic branch prediction |
34 | Philo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Phil Diodato, Stefanos Kaxiras |
Implementing branch-predictor decay using quasi-static memory cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 1(2), pp. 180-219, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Energy aware computing |
34 | Enric Musoll |
Speculating to reduce unnecessary power consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 2(4), pp. 509-536, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
low-power microarchitectures, Low-power design |
34 | Yul Chu, Mabo Robert Ito |
An Efficient Indirect Branch Predictor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2001: Parallel Processing, 7th International Euro-Par Conference Manchester, UK August 28-31, 2001, Proceedings, pp. 394-402, 2001, Springer, 3-540-42495-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
34 | Jan Hoogerbrugge |
Dynamic Branch Prediction for a VLIW Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania, USA, October 15-19, 2000, pp. 207-216, 2000, IEEE Computer Society, 0-7695-0622-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
34 | Da-Chih David Tang, Ann Marie Grizzaffi Maynard, Lizy Kurian John |
Contrasting branch characteristics and branch predictor performance of C++ and C programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPCCC ![In: Proceedings of the IEEE International Performance Computing and Communications Conference, IPCCC 1999, Phoenix/Scottsdale, Arizona, USA, 10-12 February 1999, pp. 275-283, 1999, IEEE, 0-7803-5258-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | David R. Kaeli, Philip G. Emma |
Improving the Accuracy of History Based Branch Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 46(4), pp. 469-472, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
History-based branch prediction, BTB, call/return stack, case block table, high-level language, execution-driven simulation |
27 | Ahmad Zmily, Christos Kozyrakis |
A low power front-end for embedded processors using a block-aware instruction set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 267-276, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
instruction re-ordering, low power front-end, software hints, tagless instruction cache, unified instruction cache and BTB, instruction prefetching |
27 | Tao Li 0006, Ravi Bhargava, Lizy Kurian John |
Adapting branch-target buffer to improve the target predictability of java code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 2(2), pp. 109-130, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
branch-target buffer (BTB), Java, Computer architecture, branch prediction, pipelined processor |
26 | Jiawei Nian, Zongnan Liang, Hongjin Liu, Mengfei Yang |
An Efficient Fault-Tolerant Protection Method for L0 BTB. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 70(3), pp. 1284-1297, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Truls Asheim, Boris Grot, Rakesh Kumar 0003 |
A Storage-Effective BTB Organization for Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2301.03899, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Truls Asheim, Boris Grot, Rakesh Kumar 0003 |
A Storage-Effective BTB Organization for Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2023, Montreal, QC, Canada, February 25 - March 1, 2023, pp. 1153-1167, 2023, IEEE, 978-1-6654-7652-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Kiril Simov, Petya Osenova |
Recent Developments in BTB-WordNet. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GWC ![In: Proceedings of the 12th Global Wordnet Conference, GWC 2023, University of the Basque Country, Donostia - San Sebastian, Basque Country, Spain, 23 - 27 January 2023, pp. 220-227, 2023, Global Wordnet Association, 978-84-09-53956-7. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP BibTeX RDF |
|
26 | Jiyong Yu, Trent Jaeger, Christopher Wardlaw Fletcher |
All Your PC Are Belong to Us: Exploiting Non-control-Transfer Instruction BTB Updates for Dynamic PC Extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 50th Annual International Symposium on Computer Architecture, ISCA 2023, Orlando, FL, USA, June 17-21, 2023, pp. 65:1-65:14, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Chongbin Zhao, Qirong Jiang |
Impedance-based AC/DC Terminal Modeling and Analysis of MMC-BTB system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2206.12545, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
26 | Truls Asheim, Boris Grot, Rakesh Kumar 0003 |
A Specialized BTB Organization for Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, PACT 2022, Chicago, Illinois, October 8-12, 2022, pp. 548-549, 2022, ACM, 978-1-4503-9868-8. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
26 | Vishal Gupta 0006, Biswabandan Panda |
Micro BTB: a high performance and storage efficient last-level branch target buffer for servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CF ![In: CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17 - 22, 2022, pp. 12-20, 2022, ACM, 978-1-4503-9338-6. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
26 | Shixin Song, Tanvir Ahmed Khan, Sara Mahdizadeh-Shahri, Akshitha Sriraman, Niranjan K. Soundararajan, Sreenivas Subramoney, Daniel A. Jiménez, Heiner Litz, Baris Kasikci |
Thermometer: profile-guided btb replacement for data center applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18 - 22, 2022, pp. 742-756, 2022, ACM, 978-1-4503-8610-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
26 | Vishal Gupta 0006, Biswabandan Panda |
Micro BTB: A High Performance and Lightweight Last-Level Branch Target Buffer for Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2106.04205, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
26 | Hae Gyun Lim, Hyunhee Kim, Kyungmin Kim, Jeongwoo Park, Yeonggeun Kim, Jinhee Yoo, Dasom Heo, Jinhwan Baik, Sung-Min Park 0001, Hyung Ham Kim |
Thermal Ablation and High-Resolution Imaging Using a Back-to-Back (BTB) Dual-Mode Ultrasonic Transducer: In Vivo Results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 21(5), pp. 1580, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
26 | Tanvir Ahmed Khan, Nathan Brown, Akshitha Sriraman, Niranjan K. Soundararajan, Rakesh Kumar 0003, Joseph Devietti, Sreenivas Subramoney, Gilles A. Pokam, Heiner Litz, Baris Kasikci |
Twig: Profile-Guided BTB Prefetching for Data Center Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021, pp. 816-829, 2021, ACM, 978-1-4503-8557-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
26 | Hady H. Fayek, Omar Hanafy Abdalla |
Optimal Settings of BTB-VSC in Interconnected Power System Using TFWO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISIE ![In: 30th IEEE International Symposium on Industrial Electronics, ISIE 2021, Kyoto, Japan, June 20-23, 2021, pp. 1-6, 2021, IEEE, 978-1-7281-9023-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
26 | Naoki Matsuda, Hirotaka Okabe, Ayako Omura, Miki Nakano, Koji Miyake, Toshihiko Nagamura, Hideki Kawai |
In situ Observation of Capturing BTB Molecules from Aqueous Solutions with Hydrophobic DNA Nano-Film. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 102-C(2), pp. 203-206, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
26 | Moumita Das, Ansuman Banerjee, Bhaskar Sardar |
A Shared BTB Design for Multicore Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2019, Washington, DC, USA, February 16-20, 2019, pp. 267-268, 2019, IEEE, 978-1-7281-1436-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
26 | Kiril Simov, Petya Osenova, Laska Laskova, Ivajlo Radev, Zara Kancheva |
Aligning the Bulgarian BTB WordNet with the Bulgarian Wikipedia. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GWC ![In: Proceedings of the 10th Global Wordnet Conference, GWC 2019, Wroclaw, Poland, July 23-27, 2019, pp. 290-297, 2019, Global Wordnet Association, 978-83-7493-108-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
26 | Laska Laskova, Petya Osenova, Kiril Ivanov Simov, Ivajlo Radev, Zara Kancheva |
Modeling MWEs in BTB-WN. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWE-WN@ACL ![In: Proceedings of the Joint Workshop on Multiword Expressions and WordNet, MWE-WN@ACL 2019, Florence, Italy, August 2, 2019, pp. 70-78, 2019, Association for Computational Linguistics, 978-1-950737-26-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
26 | Changhee Han, Jaehyeong Lee, Sung Chul Hwang, Gilsoo Jang |
Multi-Objective Optimized Operating Strategy of BTB-VSC for Grid Service. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISIE ![In: 28th IEEE International Symposium on Industrial Electronics, ISIE 2019, Vancouver, BC, Canada, June 12-14, 2019, pp. 147-152, 2019, IEEE, 978-1-7281-3666-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
26 | Zhenya Xiong, Zhenghao Lin, Haoqi Ren |
基于跳转轨迹的分支目标缓冲研究 (Efficient BTB Based on Taken Trace). ![Search on Bibsonomy](Pics/bibsonomy.png) |
计算机科学 ![In: 计算机科学 44(3), pp. 195-201, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Andrey A. Radionov, Vadim R. Gasiyarov, Alexander S. Maklakov |
Hybrid PWM on the basis of SVPWM and SHEPWM for VSI as part of 3L-BtB-NPC converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IECON ![In: IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, October 29 - November 1, 2017, pp. 1232-1236, 2017, IEEE, 978-1-5386-1127-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Ryotaro Kobayashi, Kaoru Saito, Hajime Shimada |
Energy Reduction of BTB by Focusing on Number of Branches per Cache Line. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Inf. Process. ![In: J. Inf. Process. 24(3), pp. 492-503, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
26 | Yoshio Shimomura, Hiroki Yamamoto, Hayato Usui, Ryotaro Kobayashi, Hajime Shimada |
BTB Energy Reduction by Focusing on Useless Accesses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 98-C(7), pp. 569-579, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | Remund Labios, Hwachang Song |
Determining the placement of BTB converters for fault current reduction in a power system by using a hybrid GA-Tabu search method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCIS&ISIS ![In: 2014 Joint 7th International Conference on Soft Computing and Intelligent Systems (SCIS) and 15th International Symposium on Advanced Intelligent Systems (ISIS), Kita-Kyushu, Japan, December 3-6, 2014, pp. 5-8, 2014, IEEE, 978-1-4799-5955-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Jorge Almaguer, Victor M. Cárdenas, Homero Miranda, Janeth Alcalá |
Modular multilevel BTB converter with parallel cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IECON ![In: IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, Dallas, TX, USA, October 29 - November 1, 2014, pp. 1617-1623, 2014, IEEE, 978-1-4799-4032-5. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Kosaku Fukuda, Lin Meng, Takeshi Kumaki, Takeshi Ogura |
A CAM-Based Separated BTB for a Superscalar Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CANDAR ![In: The First International Symposium on Computing and Networking - Across Practical Development and Theoretical Research, Dogo SPA Resort, Matsuyama, Japan, December 4-6, 2013., pp. 385-388, 2013, IEEE Computer Society, 978-1-4799-2795-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | Tomoyuki Nakabayashi, Takahiro Sasaki, Toshio Kondo |
Dynamic BTB Resizing for Variable Stages Superscalar Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CANDAR ![In: The First International Symposium on Computing and Networking - Across Practical Development and Theoretical Research, Dogo SPA Resort, Matsuyama, Japan, December 4-6, 2013., pp. 352-358, 2013, IEEE Computer Society, 978-1-4799-2795-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | D. Changdao, Mariagrazia Graziano, Ernesto Sánchez 0001, Matteo Sonza Reorda, Maurizio Zamboni, N. Zhifan |
On the functional test of the BTB logic in pipelined and superscalar processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 14th Latin American Test Workshop, LATW 2013, Cordoba, Argentina, 3-5 April, 2013, pp. 1-6, 2013, IEEE Computer Society, 978-1-4799-0595-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | Ricardo Sierra, Janeth Alcalá, Victor M. Cárdenas, Javier Perez-Ramirez, Ana Rivera |
Evaluating the performance of the BTB converter under unbalanced voltage sags. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCE ![In: 9th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2012, Mexico City, Mexico, September 26-28, 2012, pp. 1-6, 2012, IEEE, 978-1-4673-2170-9. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Abnery Ortiz, Trond Ostrem, Waldemar Sulkowski |
Tapping power from a microgrid based on a BtB converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISGT Europe ![In: 2nd IEEE PES International Conference and Exhibition on `Innovative Smart Grid Technologies`, ISGT Europe 2011, Manchester, United Kingdom, December 5-7, 2011, pp. 1-6, 2011, IEEE, 978-1-4577-1422-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Roger Kahn, Shlomo Weiss |
Reducing leakage power with BTB access prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 43(1), pp. 49-57, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Kaveh Jokar Deris, Amirali Baniasadi |
Power-aware BTB for modern processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Electr. Eng. ![In: Comput. Electr. Eng. 36(5), pp. 902-911, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Muhammad Umar Farooq 0003, Lei Chen, Lizy Kurian John |
Value Based BTB Indexing for indirect jump prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 9-14 January 2010, Bangalore, India, pp. 1-11, 2010, IEEE Computer Society, 978-1-4244-5659-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Roger Kahn, Shlomo Weiss |
Thrifty BTB: A comprehensive solution for dynamic power reduction in branch target buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 32(8), pp. 425-436, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Shuai Wang 0006, Jie S. Hu, Sotirios G. Ziavras |
BTB Access Filtering: A Low Energy and High Performance Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France, pp. 81-86, 2008, IEEE Computer Society, 978-0-7695-3170-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Yen-Jen Chang |
An Energy-Efficient BTB Lookup Scheme for Embedded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 53-II(9), pp. 817-821, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Daniel Chaver, Miguel A. Rojas, Luis Piñuel, Manuel Prieto 0001, Francisco Tirado, Michael C. Huang 0001 |
Energy-aware fetch mechanism: trace cache and BTB customization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 42-47, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
adaptive, profiling, instruction fetch |
26 | Hidenori Sato, Toshinori Sato |
A static and dynamic energy reduction technique for I-cache and BTB in embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 830-833, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
26 | Soren Prag, Josephine C. Adams |
Molecular phylogeny of the kelch-repeat superfamily reveals an expansion of BTB/kelch proteins in animals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BMC Bioinform. ![In: BMC Bioinform. 4, pp. 42, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Stevan A. Vlaovic, Edward S. Davidson, Gary S. Tyson |
Improving BTB performance in the presence of DLLs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 33, Monterey, California, USA, December 10-13, 2000, pp. 77-86, 2000, ACM/IEEE Computer Society, 0-7695-0924-x. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
26 | Weili Chu, Stamatis Vassiliadis, José G. Delgado-Frias |
The multi-associative branch target buffer: a cost effective BTB mechanism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microprogramming ![In: Microprocess. Microprogramming 41(3), pp. 211-225, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Hisataka Maruyama, Toshio Fukuda, Fumihito Arai |
Laser manipulation and optical adhesion control of functional gel-microtool for on-chip cell manipulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 11-15, 2009, St. Louis, MO, USA, pp. 1413-1418, 2009, IEEE, 978-1-4244-3803-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Christos Strydis, Georgi Gaydadjiev |
Evaluating Various Branch-Prediction Schemes for Biomedical-Implant Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2009, July 7-9, 2009, Boston, MA, USA, pp. 169-176, 2009, IEEE Computer Society, 978-0-7695-3732-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Yixin Shi, Gyungho Lee |
Augmenting Branch Predictor to Secure Program Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: The 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2007, 25-28 June 2007, Edinburgh, UK, Proceedings, pp. 10-19, 2007, IEEE Computer Society, 0-7695-2855-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Control Flow Validation, Indirect Branch, Bloom Filter, Software Protection, Branch Predictor |
17 | Chih-Da Chien, Chih-Wei Wang, Chiun-Chau Lin, Tien-Wei Hsieh, Yuan-Hwa Chu, Jiun-In Guo |
A Low Latency Memory Controller for Video Coding Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007, July 2-5, 2007, Beijing, China, pp. 1211-1214, 2007, IEEE Computer Society, 1-4244-1017-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Fei Gao, Suleyman Sair |
Exploiting Intra-function Correlation with the Global History Stack. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, 2005, Proceedings, pp. 172-181, 2005, Springer, 3-540-26969-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Dharmesh Parikh, Kevin Skadron, Yan Zhang 0028, Mircea R. Stan |
Power-Aware Branch Prediction: Characterization and Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(2), pp. 168-186, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
target prediction, highly-biased branches, pipeline gating, speculation control, Low-power design, power, branch prediction, processor architecture, energy-aware systems, banking |
17 | Dharmesh Parikh, Kevin Skadron, Yan Zhang 0028, Marco Barcella, Mircea R. Stan |
Power Issues Related to Branch Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February 2-6, 2002, pp. 233-244, 2002, IEEE Computer Society, 0-7695-1525-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Performance, Power, Energy, Branch Prediction |
17 | Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami |
Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACS ![In: Power-Aware Computer Systems, Second International Workshop, PACS 2002 Cambridge, MA, USA, February 2, 2002, Revised Papers, pp. 18-32, 2002, Springer, 3-540-01028-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Oliverio J. Santana, Ayose Falcón, Enrique Fernández, Pedro Medina, Alex Ramírez, Mateo Valero |
A Comprehensive Analysis of Indirect Branch Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISHPC ![In: High Performance Computing, 4th International Symposium, ISHPC 2002, Kansai Science City, Japan, May 15-17, 2002, Proceedings, pp. 133-145, 2002, Springer, 3-540-43674-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
indirect branch, Multi-Stage Cascaded Predictor, branch prediction, microarchitecture, Branch Target Buffer |
17 | Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami |
A history-based I-cache for low-energy multimedia applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 148-153, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Jih-Ching Chiu, I-Huan Huang, Chung-Ping Chung |
Design of Instruction Stream Buffer with Trace Support for X86 Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 294-299, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
instruction stream buffer, x86 architecture, multiple instruction fetch, superscalar processor, ILP, Trace cache |
17 | Glenn Reinman, Todd M. Austin, Brad Calder |
A Scalable Front-End Architecture for Fast Instruction Delivery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 26th Annual International Symposium on Computer Architecture, ISCA 1999, Atlanta, Georgia, USA, May 2-4, 1999, pp. 234-245, 1999, IEEE Computer Society, 0-7695-0170-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | James O. Bondi, Ashwini K. Nanda, Simonjit Dutta |
Integrating a Misprediction Recovery Cache (MRC) into a Superscalar Pipeline. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996, pp. 14-23, 1996, ACM/IEEE Computer Society, 0-8186-7641-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
branch target buffer technology, deep pipelines, misprediction recovery cache integration, performance loss, residual misprediction penalty, superscalar pipeline, microprocessor chips, microprocessor designs, CISC, multiple instructions |
17 | Shlomit S. Pinter, Adi Yoaz |
Tango: A Hardware-Based Data Prefetching Technique for Superscalar Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996, pp. 214-225, 1996, ACM/IEEE Computer Society, 0-8186-7641-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
LRU mechanism, SPEC92 benchmark, Tango, base line architecture, hardware-based data prefetching technique, memory reference instructions, program progress graph, performance, parallel processing, instruction level parallelism, simulation results, superscalar processors, branch target buffer, instruction prefetching, hardware resources, slack time |
17 | Yue Liu, David R. Kaeli |
Branch-Directed and Stride-Based Data Cache Prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 225-230, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|