Search results for "CORDIC"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
128	Oskar Mencer, Luc Séméria, Martin Morf, Jean-Marc Delosme	Application of Reconfigurable CORDIC Architectures.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF
103	Jie Zhou 0007, Yong Dou, Yuanwu Lei, Jinbo Xu, Yazhuo Dong	Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.	HPCC	2008	DBLP DOI BibTeX RDF
103	Nariankadu D. Hemkumar, Joseph R. Cavallaro	Efficient complex matrix transformations with CORDIC.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
101	Julio Villalba, J. C. Arrabal, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera	Radix-4 Vectoring Cordic Algorithm And Architectures.	ASAP	1996	DBLP DOI BibTeX RDF	radix-4 vectoring CORDIC algorithm, radix-4 vectoring CORDIC architectures, vectoring mode, microrotations, zero skipping technique, recursive architectures, matrix triangularization, rotation angle, computational complexity, complexity, parallel architectures, singular value decomposition, SVD, signal processing, digital arithmetic, digital arithmetic, matrix algebra, pipelined architectures
91	Koushik Maharatna, Swapna Banerjee, Eckhard Grass, Milos Krstic, Alfonso Troya	Modified virtually scaling-free adaptive CORDIC rotator algorithm and architecture.	IEEE Trans. Circuits Syst. Video Technol.	2005	DBLP DOI BibTeX RDF
91	Shen-Fu Hsiao, Chun-Yi Lau, Jean-Marc Delosme	Redundant Constant-Factor Implementation of Multi-Dimensional CORDIC and Its Application to Complex SVD.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF
91	Shen-Fu Hsiao, Jen-Yin Chen	Design, Implementation and Analysis of a New Redundant CORDIC Processor with Constant Scaling Factor and Regular Structure.	J. VLSI Signal Process.	1998	DBLP DOI BibTeX RDF
88	Bimal Gisutham, Thambipillai Srikanthan, Vijayan K. Asari	A High Speed Flat CORDIC Based Neuron with Multi-Level Activation Function for Robust Pattern Recognition.	CAMP	2000	DBLP DOI BibTeX RDF	CORDIC based neuron, robust pattern recognition, multiple valued logic neuron, neural network implementation, real-time pattern recognition, Flat CORDIC, neural networks, image processing, complexity, activation function
86	Nariankadu D. Hemkumar, Joseph R. Cavallaro	Redundant and On-Line CORDIC for Unitary Transformations.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	unitary transformations, two-sided unitary transformation, Jacobi-like methods, complex matrices, special-purpose processor array architectures, nonredundant CORDIC, online CORDIC, redundant CORDIC, Coordinate Rotation Digital Computer, parallel algorithms, parallel algorithms, computational complexity, parallel architectures, singular value decompositions, digital arithmetic, matrix algebra, eigenvalue, CORDIC, special purpose computers, eigenvalues and eigenfunctions, matrices
83	Tomás Lang, Elisardo Antelo	CORDIC Vectoring with Arbitrary Target Value.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	Computer arithmetic, VLSI architectures, rotations, CORDIC, elementary functions
78	Jie Zhou 0007, Yong Dou, Yuanwu Lei, Yazhuo Dong	Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.	ARC	2008	DBLP DOI BibTeX RDF
78	Tzu-Hao Yu, Chi-Li Yu, Kai-Yuan Jheng, An-Yeu Wu	On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems.	SiPS	2006	DBLP DOI BibTeX RDF
78	Chang Yong Kang, Earl E. Swartzlander Jr.	An Analysis of the CORDIC Algorithm for Direct Digital Frequency Synthesis.	ASAP	2002	DBLP DOI BibTeX RDF
78	Andrew P. Paplinski, Nandita Bhattacharjee, Charles Greif	Rotating Ultrasonic Signal Vectors with a Word-Parallel CORDIC Processor.	DSD	2001	DBLP DOI BibTeX RDF
78	Jack E. Volder	The Birth of Cordic.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF
78	Marco Bekooij, Jos Huisken, Katarzyna Nowak	Numerical Accuracy of Fast Fourier Transforms with CORDIC Arithmetic.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF
78	Jae-Hyuck Kwak, Jae Hun Choi, Earl E. Swartzlander Jr.	High-Speed CORDIC Based on an Overlapped Architecture and a Novel sigma-Prediction Method.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF
78	Tomás Lang, Elisardo Antelo	CORDIC-Based Computation of ArcCos.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF
78	Tomás Lang, Elisardo Antelo	CORDIC-based computation of arccos and arcsin.	ASAP	1997	DBLP DOI BibTeX RDF
76	Tze-Yun Sung, Yaw-Shih Shieh, Chun-Wang Yu, Hsi-Chin Hsin	A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering.	PDCAT	2006	DBLP DOI BibTeX RDF	Redundant CORDIC arithmetic, 3-D vector interpolation, high-throughput, CORDIC algorithm
71	Fabian Angarita, Ma José Canet, T. Sansaloni, A. Perez-Pascual, Javier Valls	Efficient Mapping of CORDIC Algorithm for OFDM-Based WLAN.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	wireless LAN, OFDM, cordic
71	Tomás Lang, Elisardo Antelo	High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	vector normalization, geometry transforms, graphics processor, CORDIC, 3D rotations
71	Konstantinos Sarrigeorgidis, Jan M. Rabaey	Ultra Low Power CORDIC Processor for Wireless Communication Algorithms.	J. VLSI Signal Process.	2004	DBLP DOI BibTeX RDF	cordic arithmetic, wireless communications, low power design, least squares, QR decomposition, redundant arithmetic
71	Javier Valls, Martin Kuhlmann, Keshab K. Parhi	Evaluation of CORDIC Algorithms for FPGA Design.	J. VLSI Signal Process.	2002	DBLP DOI BibTeX RDF	FPGA, CORDIC, redundant arithmetic, Two's complement
71	Elisardo Antelo, Tomás Lang, Javier D. Bruguera	Very-High Radix Circular CORDIC: Vectoring and Unified Rotation/Vectoring.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	Very-high radix algorithms, selection by rounding, angle and modulus calculation, rotation, CORDIC
71	Ray Andraka	A Survey of CORDIC Algorithms for FPGA Based Computers.	FPGA	1998	DBLP DOI BibTeX RDF	polar conversion, vector magnitude, CORDIC, sine, cosine
71	Julio Villalba, José Antonio Hidalgo López, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera	CORDIC Architectures with Parallel Compensation of the Scale Factor.	ASAP	1995	DBLP DOI BibTeX RDF	Parallel Architecture, CORDIC algorithm, Scale Factor, Redundant Arithmetic
66	Xinbiao Gan, Kui Dai, Libo Huang, Li Shen 0007, Zhiying Wang 0003	A New CORDIC Algorithm and Software Implementation Based on Synchronized Data Triggering Architecture.	MUE	2008	DBLP DOI BibTeX RDF
66	Tso-Bing Juang	Area/Delay Efficient Recoding Methods for Parallel CORDIC Rotations.	APCCAS	2006	DBLP DOI BibTeX RDF
66	Zhaohui Liu, Kevin Dickson, John V. McCanny	A floating-point CORDIC based SVD processor.	ASAP	2003	DBLP DOI BibTeX RDF
66	Abhishek Singh 0001, Dhananjay S. Phatak, Tom Goff, Mike Riggs, James F. Plusquellic, Chintan Patel	Comparison of Branching CORDIC Implementations.	ASAP	2003	DBLP DOI BibTeX RDF
66	Javier D. Bruguera, Nicolás Guil, Tomás Lang, Julio Villalba, Emilio L. Zapata	Cordic based parallel/pipelined architecture for the Hough transform.	J. VLSI Signal Process.	1996	DBLP DOI BibTeX RDF
66	Feng Zhou, Peter Kornerup	High Speed DCT/IDCT Using a Pipelined CORDIC Algorithm.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
59	Javier Hormigo, Julio Villalba, Emilio L. Zapata	CORDIC Processor for Variable-Precision Interval Arithmetic.	J. VLSI Signal Process.	2004	DBLP DOI BibTeX RDF	interval arithmetic, CORDIC, reliable computing, variable precision
59	Jen-Chuan Chih, Sau-Gee Chen	Fast CORDIC Algorithm Based on a New Recoding Scheme for Rotation Angles and Variable Scale Factors.	J. VLSI Signal Process.	2003	DBLP DOI BibTeX RDF	variable scale factor, table lookup method, residual angle and scale factor recoding, CORDIC algorithm
59	Jae Hun Choi, Jae-Hyuck Kwak, Earl E. Swartzlander Jr.	High-Speed CORDIC Architecture Based on Redundant Sum Formation and Overlapped s-Selection.	ICCD	1999	DBLP DOI BibTeX RDF	Low latency CORDIC architecture, Folded-transistor design, Area optimization
59	Julio Villalba, Tomás Lang	Low latency word serial CORDIC.	ASAP	1997	DBLP DOI BibTeX RDF	word serial CORDIC, vectoring operation modes, digital arithmetic, iterations, scaling factor
59	Roberto R. Osorio, Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata	Digit On-line Large Radix CORDIC Rotator.	ASAP	1995	DBLP DOI BibTeX RDF	Digit on-line processing, Pipelined array architecture, VLSI architecture, Application-specific processor, CORDIC algorithm
54	Oskar Mencer, Wayne Luk	Parameterized High Throughput Function Evaluation for FPGAs.	J. VLSI Signal Process.	2004	DBLP DOI BibTeX RDF	FPGAs, function approximation, CORDIC, lookup table, rational approximation
54	M. G. Buddika Sumanasena	A Scale Factor Correction Scheme for the CORDIC Algorithm.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF
54	Elisardo Antelo, Julio Villalba, Emilio L. Zapata	A Low-Latency Pipelined 2D and 3D CORDIC Processors.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Arithmetic and Logic Structures, Algorithms, Computer arithmetic, High-Speed Arithmetic
54	Koushik Maharatna, Karim El-Shabrawy, Bashir M. Al-Hashimi	Reduced Z-datapath Cordic Rotator.	ISCAS	2008	DBLP DOI BibTeX RDF
54	Chi-Li Yu, Tzu-Hao Yu, An-Yeu Wu	On the Fixed-Point Properties of Mixed-Scaling-Rotation Cordic Algorithm.	SiPS	2007	DBLP DOI BibTeX RDF
54	R. Stapenhurst, Koushik Maharatna, Jimson Mathew, José L. Núñez-Yáñez, Dhiraj K. Pradhan	On the Hardware Reduction of z-Datapath of Vectoring CORDIC.	ISCAS	2007	DBLP DOI BibTeX RDF
54	Mihai Sima, John Glossner, Daniel Iancu, Hua Ye 0003, Andrei Iancu, A. Joseph Hoane	CORDIC-Augmented Sandbridge Processor for Channel Equalization.	SAMOS	2005	DBLP DOI BibTeX RDF
54	Jen-Chuan Chih, Kun-Lung Chen, Sau-Gee Chen	A CORDIC processor with efficient table-lookup schemes for rotations and on-line scale factor compensations.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
54	Satish Ravichandran, Vijayan K. Asari	Pre-computatio of Rotatio Bits in Unidirectional CORDIC for Trigonometric and Hyperbolic Computations.	ISVLSI	2003	DBLP DOI BibTeX RDF
54	Shen-Fu Hsiao	A high-speed constant-factor redundant CORDIC processor without extra correcting or scaling iterations.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
54	Roberto Sarmiento, V. de Armas, José Francisco López, Juan A. Montiel-Nelson, Antonio Núñez	A CORDIC processor for FFT computation and its implementation using gallium arsenide technology.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
54	Julio Villalba, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera	Radix-4 Vectoring CORDIC Algorithm and Architectures.	J. VLSI Signal Process.	1998	DBLP DOI BibTeX RDF
54	Gerben J. Hekstra, Ed F. Deprettere	Floating point Cordic.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
52	Tomás Lang, Elisardo Antelo	CORDIC Vectoring with Arbitrary Target Value.	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	Extended CORDIC functions, inverse kinematics computations, computer arithmetic, rotations, CORDIC
52	Shaoyun Wang, Vincenzo Piuri, Earl E. Swartzlander Jr.	Hybrid CORDIC Algorithms.	IEEE Trans. Computers	1997	DBLP DOI BibTeX RDF	Givens transformation, planary rotator, CORDIC architecture, elementary function, CORDIC algorithm
52	Kishore Kota, Joseph R. Cavallaro	Numerical Accuracy and Hardware Tradeoffs for CORDIC Arithmetic for Special-Purpose Processors.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	numerical accuracy, hardware tradeoffs, CORDIC arithmetic, special-purpose processors, coordinate rotation digital computer, real-time signal processing, Y-reduction mode, inverse tangent function, floating-point CORDIC, special-purpose arrays, signal processing, digital arithmetic, hybrid architecture, implementation complexity
52	Jean Duprat, Jean-Michel Muller	The CORDIC Algorithm: New Results for Fast VLSI Implementation.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	sign functions, fast VLSI implementation, signed-digit implementation, carry-save representation, branching CORDIC method, constant normalization factor, online delay, cosine functions, VLSI, signal processing, digital arithmetic, CORDIC algorithm
52	Milos D. Ercegovac, Tomás Lang	Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD.	IEEE Trans. Computers	1990	DBLP DOI BibTeX RDF	online CORDIC, redundant CORDIC, matrix triangularization, angles, digit-serial addition, online multiplication, Givens' rotations, singular value decomposition, SVD, digital arithmetic, rotations, division, square root, scaling factors, floating-point representations
49	Mihai Sima, Michael McGuire	Embedded Reconfigurable Solution for OFDM Detection Over Fast Fading Radio Channels.	SiPS	2007	DBLP DOI BibTeX RDF
49	Ignacio Bravo Muñoz, Pedro Jiménez, Manuel Mazo 0001, José Luis Lázaro, Alfredo Gardel Vicente	Implementation in Fpgas of Jacobi Method to Solve the Eigenvalue and Eigenvector Problem.	FPL	2006	DBLP DOI BibTeX RDF
46	Tze-Yun Sung, Yaw-Shih Shieh, Chun-Wang Yu, Hsi-Chin Hsin	High-Efficiency and Low-Power Architectures for 2-D DCT and IDCT Based on CORDIC Rotation.	PDCAT	2006	DBLP DOI BibTeX RDF	low-power, DCT, CORDIC, IDCT
46	Eckhard Grass, Bodhisatya Sarker, Koushik Maharatna	A Dual-Mode Synchronous/Asynchronous CORDIC Processor.	ASYNC	2002	DBLP DOI BibTeX RDF	CORDIC processor, dual-mode, synchronous, asynchronous, self-timed
46	Jason M. Musicer, Jan M. Rabaey	MOS current mode logic for low power, low noise CORDIC computation in mixed-signal environments.	ISLPED	2000	DBLP DOI BibTeX RDF	CORDIC, digital logic, current mode logic, low-energy design
46	Elisardo Antelo, Javier D. Bruguera, Tomás Lang, Julio Villalba, Emilio L. Zapata	High Radix Cordic Rotation Based on Selection by Rounding.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF	Rotation mode, High radix algorithm, CORDIC algorithm
46	Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata	Redundant CORDIC Rotator Based on Parallel Prediction.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF	High speed processor, Parallel prediction, Parallel architecture, CORDIC algorithm, Redundant arithmetic
42	Roberto Gutierrez, Javier Valls	Low-Power FPGA-Implementation of atan(Y/X) Using Look-Up Table Methods for Communication Applications.	J. Signal Process. Syst.	2009	DBLP DOI BibTeX RDF	atan(Y/X), FPGA, Wireless communication, CORDIC
42	Robin Pottathuparambil, Ron Sass	A parallel/vectorized double-precision exponential core to accelerate computational science applications.	FPGA	2009	DBLP DOI BibTeX RDF	exponential core, fpga, cordic
42	Jarmo Takala, Konsta Punkka	Scalable FFT Processors and Pipelined Butterfly Units.	J. VLSI Signal Process.	2006	DBLP DOI BibTeX RDF	parallel processing, application-specific integrated circuit, CORDIC, distributed arithmetic, radix-2
42	Ian D. Walker, Joseph R. Cavallaro	Parallel VLSI architectures for real-time kinematics of redundant robots.	J. Intell. Robotic Syst.	1994	DBLP DOI BibTeX RDF	cordic arithmetic, kinematic redundancy, VLSI, Robot kinematics, pseudoinverse
41	Malay K. Ganai, Franjo Ivancic	Efficient decision procedure for non-linear arithmetic constraints using CORDIC.	FMCAD	2009	DBLP DOI BibTeX RDF
41	José Luis Sánchez, Higinio Mora Mora, Jerónimo Mora Pascual, Antonio Jimeno	Architecture implementation of an improved decimal CORDIC method.	ICCD	2008	DBLP DOI BibTeX RDF
41	Erkka Laulainen, Lauri Koskinen, Marko Kosunen, Kari Halonen	Compass tilt compensation algorithm using CORDIC.	ISCAS	2008	DBLP DOI BibTeX RDF
41	Katsutoshi Seki, Tomoyoshi Kobori, James Okello, Masao Ikekawa	A Cordic-Based Reconfigrable Systolic Array Processor for MIMO-OFDM Wireless Communications.	SiPS	2007	DBLP DOI BibTeX RDF
41	Elisardo Antelo, Julio Villalba	Low Latency Pipelined Circular CORDIC.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
41	Suchitra Sathyanarayana, S. Sukthankar, Thambipillai Srikanthan, Christopher T. Clarke	Elimination of sign precomputation in flat CORDIC.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
41	Ireneusz Janiszewski, Hermann Meuth, Bernhard Hoppe	FPGA-Efficient Hybrid LUT/CORDIC Architecture.	FPL	2004	DBLP DOI BibTeX RDF
41	Shin'ichi Shiraishi, Miki Haseyama, Hideo Kitajima	A cost-effective and high-precision architecture for CORDIC-based adaptive lattice filters.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
41	Jae-Hyuck Kwak, Earl E. Swartzlander Jr., Vincenzo Piuri	Fault-Tolerant High-Performance Cordic Processors.	DFT	2000	DBLP DOI BibTeX RDF
41	David Lewis	Complex Logarithmic Number System Arithmetic Using High-Radix Redundant CORDIC Algorithms.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
41	Javier Hormigo, Julio Villalba, Emilio L. Zapata	Interval Sine and Cosine Functions Computation Based on Variable-Precision CORDIC Algorithm.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
41	Elisardo Antelo, Tomás Lang, Javier D. Bruguera	Very-High Radix CORDIC Vectoring with Scalings and Selection by Rounding.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
41	Julio Villalba, Tomás Lang, Emilio L. Zapata	Parallel Compensation of Scale Factor for the CORDIC Algorithm.	J. VLSI Signal Process.	1998	DBLP DOI BibTeX RDF
41	Christian V. Schimpfle, Sven Simon 0001, Josef A. Nossek	Low Power CORDIC Implementation Using Redundant Number Representation.	ASAP	1997	DBLP DOI BibTeX RDF
41	D. E. Metafas, Constantinos E. Goutis	A floating-point advanced cordic processor.	J. VLSI Signal Process.	1995	DBLP DOI BibTeX RDF
37	Hongzhi Wang 0003, Pierre Leray, Jacques Palicot	An Efficient MIMO V-BLAST Decoder Based on a Dynamically Reconfigurable FPGA Including its Reconfiguration Management.	ICC	2008	DBLP DOI BibTeX RDF
37	Jie Chen 0002, K. J. Ray Liu	Efficient architecture and design of an embedded video coding engine.	IEEE Trans. Multim.	2001	DBLP DOI BibTeX RDF
37	Oskar Mencer, Nicolas Boullis, Wayne Luk, Henry Styles	Parameterized Function Evaluation for FPGAs.	FPL	2001	DBLP DOI BibTeX RDF
37	Sau-Gee Chen, Chin-Chi Chang	A new efficient algorithm for singular value decomposition.	ISCAS (5)	1999	DBLP DOI BibTeX RDF
35	Jürgen Götze, Steffen Paul, Matthias Sauer 0001	An Efficient Jacobi-like Algorithm for Parallel Eigenvalue Computation.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	Jacobi-like algorithm, parallel eigenvalue computation, symmetric eigenvalue problems, CORDIC processor, CORDIC angle sequence, Jacobi rotation, linear convergence, approximate rotations, scaling computation, parallel algorithms, signal processing, digital signal processing, matrix algebra, convergence of numerical methods, eigenvalues and eigenfunctions, matrix computation, fast implementations, quadratic convergence, eigenvalue computation
34	Terence K. Rodrigues, Earl E. Swartzlander Jr.	Adaptive CORDIC: Using Parallel Angle Recoding to Accelerate Rotations.	IEEE Trans. Computers	2010	DBLP DOI BibTeX RDF	angle rotation, sine computation, cosine computation, CORDIC algorithm
34	Bipul Das, Swapna Banerjee	A CORDIC based array architecture for complex discrete wavelet transform.	ACM Great Lakes Symposium on VLSI	2001	DBLP DOI BibTeX RDF	complex discrete wavelet transform, image padding, FPGA, FIR filter, CORDIC
34	Dhananjay S. Phatak	Comments on Duprat and Muller's Branching CORDIC Paper.	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	Branching CORDIC, constant scale factor, errata, corrections, signed-digit representation
34	Shen-Fu Hsiao, Jean-Marc Delosme	Householder CORDIC Algorithms.	IEEE Trans. Computers	1995	DBLP DOI BibTeX RDF	Householder reflections, parallel algorithms, VLSI, computer arithmetic, CORDIC
34	Steffen Paul, Jürgen Götze, Matthias Sauer 0001	Error Analysis of CORDIC-Based Jacobi Algorithms.	IEEE Trans. Computers	1995	DBLP DOI BibTeX RDF	eigenvalue calculation, Jacobi algorithms, approximate rotations, Error analysis, CORDIC
34	Helmut Hahn, Dirk Timmermann, Bedrich J. Hosticka, Bernold Rix	A Unified and Division-Free CORDIC Argument Reduction Method with Unlimited Convergence Domain Including Inverse Hyperbolic Functions.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	CORDIC argument reduction method, convergence domain, inverse hyperbolic functions, unified division-free argument reduction method, floating point implementation, fixed point implementation, digital arithmetic, mathematics computing
34	Yu Hen Hu, S. Naganathan	An Angle Recoding Method for CORDIC Algorithm Implementation.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	angle recording method, CORDIC algorithm implementation, coordinate rotation digital computer, iterative arithmetic algorithm, generalized vector rotations, elementary rotation angles, signal processing, digital arithmetic, greedy algorithm
34	Dirk Timmermann, Helmut Hahn, Bedrich J. Hosticka	Low Latency Time CORDIC Algorithms.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	constant scale factor, redundant addition, latency time, computational complexity, parallel architecture, iterative methods, digital arithmetic, adders, number theory, CORDIC algorithms
34	Jeong-A Lee, Tomás Lang	Constant-Factor Redundant CORDIC for Angle Calculation and Rotation.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	rotation direction, angle calculation, constant-factor redundant-CORDIC, plane rotations, correcting iterations, radix-4, convergence, iterative methods, digital arithmetic, number theory, convergence of numerical methods, algorithm theory, scale factor, radix-2
34	Xiaobo Hu 0001, Ronald G. Harber, Steven C. Bass	Expanding the Range of Convergence of the CORDIC Algorithm.	IEEE Trans. Computers	1991	DBLP DOI BibTeX RDF	coordinate rotational digital computer, range of convergence, numerical values, functional arguments, fixed-point hardware implementation, iterative methods, digital arithmetic, roundoff errors, CORDIC algorithm
33	Mario Garrido, Petter Kallstrom, Martin Kumm, Oscar Gustafsson	CORDIC II: A New Improved CORDIC Algorithm.	IEEE Trans. Circuits Syst. II Express Briefs	2016	DBLP DOI BibTeX RDF
33	Tushar Supe, David Anderson	Super-CORDIC: An approximation based parallel and redundant CORDIC algorithm.	ISPACS	2016	DBLP DOI BibTeX RDF
33	Hongzhi Wang 0003	Architectures reconfigurables à base d'opérateur CORDIC pour le traitement du signal: Applications aux récepteurs MIMO. (Reconfigurable architecture based on CORDIC opérator for signal processing: Applications to MIMO receivers).		2009	RDF