Search results for "CPUs"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
54	Timothy D. R. Hartley, Ümit V. Çatalyürek, Antonio Ruiz, Francisco D. Igual, Rafael Mayo 0002, Manuel Ujaldon	Biomedical image analysis on a cooperative cluster of GPUs and multicores.	ICS	2008	DBLP DOI BibTeX RDF	biomedical image analysis, cuda programming, multicore cpus, multiprocessors, high performance computing, graphics processors
51	Jayanth Gummaraju, Ben Sander, Laurent Morichetti, Benedict R. Gaster, Lee W. Howes	Efficient implementation of GPGPU synchronization primitives on CPUs.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	synchronization, multicore, gpgpu
51	Yaron Weinsberg, Danny Dolev, Tal Anker, Muli Ben-Yehuda, Pete Wyckoff	Tapping into the fountain of CPUs: on operating system support for programmable devices.	ASPLOS	2008	DBLP DOI BibTeX RDF	operating systems, programming model, offloading
51	Javier Celaya, Unai Arronategui	YA: Fast and Scalable Discovery of Idle CPUs in a P2P network.	GRID	2006	DBLP DOI BibTeX RDF
44	Yuebin Bai, Cong Xu, Zhi Li 0009	Task-aware based co-scheduling for virtual machine system.	SAC	2010	DBLP DOI BibTeX RDF	VCPU scheduling, task-aware, virtualization, Xen
44	Seung Woo Son 0001, Sai Prashanth Muralidhara, Ozcan Ozturk 0001, Mahmut T. Kandemir, Ibrahim Kolcu, Mustafa Karaköy	Profiler and compiler assisted adaptive I/O prefetching for shared storage caches.	PACT	2008	DBLP DOI BibTeX RDF	shared storage cache, adaptive, compiler, profiler, prefetching
44	Marc Ebner	A Three-Dimensional Environment for Self-Reproducing Programs.	ECAL	2001	DBLP DOI BibTeX RDF
43	Anna Inn-Tung Chen, Ming-Shing Chen, Tien-Ren Chen, Chen-Mou Cheng, Jintai Ding, Eric Li-Hsiang Kuo, Frost Yu-Shuang Lee, Bo-Yin Yang	SSE Implementation of Multivariate PKCs on Modern x86 CPUs.	CHES	2009	DBLP DOI BibTeX RDF	multivariate public key cryptosystem (MPKC), ?IC, vector instructions, SSSE3, Wiedemann, TTS, rainbow, SSE2
36	Stavros Passas, Kostas Magoutis, Angelos Bilas	Towards 100 gbit/s ethernet: multicore-based parallel communication protocol design.	ICS	2009	DBLP DOI BibTeX RDF	100 gbit/s ethernet, communication protocol design, multicore cpus, performance evaluation
36	Tobias Haist, Marcus Reicherter, Min Wu, Lars Seifert	Using Graphics Boards to Compute Holograms.	Comput. Sci. Eng.	2006	DBLP DOI BibTeX RDF	graphics boards, integrated circuits, CPUs, special-purpose computing, special-purpose computers
36	K. H. (Kane) Kim, Yuseok Kim	An Experimental Investigation of the Potential of BLF-driven Scheduling of Real-time Threads.	ICECCS	1996	DBLP DOI BibTeX RDF	BLF-driven scheduling, real-time threads, complex real-time computer systems, peripheral devices, benefit loss function, BLF-driven thread scheduler, Solaris 2.3, resource allocation, resource allocation, CPUs, communication channels
36	Ti-Yen Yen, Wayne H. Wolf	Performance estimation for real-time distributed embedded systems.	ICCD	1995	DBLP DOI BibTeX RDF	real-time distributed embedded systems, efficient analysis algorithm, application task, cosynthesis algorithms, bounding algorithms, performance evaluation, real-time systems, distributed processing, ASICs, data dependencies, execution time, performance estimation, CPUs, tight bounds, communication links
35	Joel C. Adams, Daniel J. Ernst, Thomas Murphy, Ariel Ortiz	Multicore education: pieces of the parallel puzzle.	SIGCSE	2010	DBLP DOI BibTeX RDF	parallel, concurrency, training, programming, curriculum, languages, multi-core, workshops, many-core, faculty
35	Mahmut T. Kandemir, Ozcan Ozturk 0001	Software-directed combined cpu/link voltage scaling fornoc-based cmps.	SIGMETRICS	2008	DBLP DOI BibTeX RDF	compiler, CMP, NoC, voltage scaling, cpu, communication link
35	Tim Brecht, G. John Janakiraman, Brian Lynn, Vikram A. Saletore, Yoshio Turner	Evaluating network processing efficiency with processor partitioning and asynchronous I/O.	EuroSys	2006	DBLP DOI BibTeX RDF	asynchronous I/O, TCP/IP, network processing
35	Dong Guo 0002, Liang Hu 0001, Meng Zhang 0006, Zhuopeng Zhang	GcpSensor: a CPU Performance Tool for Grid Environments.	QSIC	2005	DBLP DOI BibTeX RDF
35	Kozo Okano, Yuko Kitahama, Akira Kitajima, Teruo Higashino, Kenichi Taniguchi	Formal Verification of CPU in Laboratory Work.	MSE	2001	DBLP DOI BibTeX RDF
35	Thin-Fong Tsuei, Allan Packer, Keng-Tai Ko	Database Buffer Size Investigation for OLTP Workloads (Experience Paper).	SIGMOD Conference	1997	DBLP DOI BibTeX RDF
34	Changkyu Kim, Jatin Chhugani, Nadathur Satish, Eric Sedlar, Anthony D. Nguyen, Tim Kaldewey, Victor W. Lee, Scott A. Brandt, Pradeep Dubey	FAST: fast architecture sensitive tree search on modern CPUs and GPUs.	SIGMOD Conference	2010	DBLP DOI BibTeX RDF	compression, thread-level parallelism, cpu, gpu, tree search, data-level parallelism
34	Angela C. Sodan, Lei Lan	LOMARC: Lookahead Matchmaking for Multiresource Coscheduling on Hyperthreaded CPUs.	IEEE Trans. Parallel Distributed Syst.	2006	DBLP DOI BibTeX RDF	scheduling, performance measures, threads, Distributed architecture, multiprocessing
34	Avi Efrati, Moshe Kleyner	Timing analysis challenges for high speed CPUs at 90nm and below.	Timing Issues in the Specification and Synthesis of Digital Systems	2002	DBLP DOI BibTeX RDF
32	Matt Martineau, Simon McIntosh-Smith	The Productivity, Portability and Performance of OpenMP 4.5 for Scientific Applications Targeting Intel CPUs, IBM CPUs, and NVIDIA GPUs.	IWOMP	2017	DBLP DOI BibTeX RDF
27	Jeffrey R. Yost	From the Editor's Desk.	IEEE Ann. Hist. Comput.	2011	DBLP DOI BibTeX RDF	Lars Heide, J.C.R. Licklider, DoD, key-set office machine, cash-dispensing machines, electrical efficiency, Hasselblad, ATMs, History of computing, digital imaging, CPUs, Arpanet
27	Victor W. Lee, Changkyu Kim, Jatin Chhugani, Michael Deisher, Daehyun Kim 0001, Anthony D. Nguyen, Nadathur Satish, Mikhail Smelyanskiy, Srinivas Chennupaty, Per Hammarlund, Ronak Singhal, Pradeep Dubey	Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU.	ISCA	2010	DBLP DOI BibTeX RDF	cpu architecture, gpu architecture, throughput computing, performance analysis, performance measurement, software optimization
27	Isaac Gelado, Javier Cabezas, Nacho Navarro, John E. Stone, Sanjay J. Patel, Wen-mei W. Hwu	An asymmetric distributed shared memory model for heterogeneous parallel systems.	ASPLOS	2010	DBLP DOI BibTeX RDF	asymmetric distributed shared memory, data-centric programming models, heterogeneous systems
27	Fumihiko Ino, Yuki Kotani, Kenichi Hagihara	Harnessing the power of idle GPUs for acceleration of biological sequence alignment.	IPDPS	2009	DBLP DOI BibTeX RDF
27	Tomoaki Hamano, Toshio Endo, Satoshi Matsuoka	Power-aware dynamic task scheduling for heterogeneous accelerated clusters.	IPDPS	2009	DBLP DOI BibTeX RDF
27	Bingsheng He, Wenbin Fang, Qiong Luo 0001, Naga K. Govindaraju, Tuyong Wang	Mars: a MapReduce framework on graphics processors.	PACT	2008	DBLP DOI BibTeX RDF	GPGPU, MapReduce, data parallelism, graphics processor, multi-core processors, web analysis
27	Yinfei Pan, Ying Zhang, Kenneth Chiu	Hybrid Parallelism for XML SAX Parsing.	ICWS	2008	DBLP DOI BibTeX RDF
27	Yasuhiko Ogata, Toshio Endo, Naoya Maruyama, Satoshi Matsuoka	An efficient, model-based CPU-GPU heterogeneous FFT library.	IPDPS	2008	DBLP DOI BibTeX RDF
27	Christof Pitter	Time-predictable memory arbitration for a Java chip-multiprocessor.	JTRES	2008	DBLP DOI BibTeX RDF	Java, chip-multiprocessor, shared memory, worst-case execution time
27	Krzysztof Niski, Jonathan D. Cohen 0001	Tile-based Level of Detail for the Parallel Age.	IEEE Trans. Vis. Comput. Graph.	2007	DBLP DOI BibTeX RDF	parallel, distributed, Level of detail, out-of-core, geometry image
27	Alexandre Peixoto Ferreira, Daniel Mossé, Jae C. Oh	Thermal Faults Modeling Using a RC Model with an Application to Web Farms.	ECRTS	2007	DBLP DOI BibTeX RDF
27	Michael Kluge, Wolfgang E. Nagel	Analysis of Linux Scheduling with VAMPIR.	International Conference on Computational Science (2)	2007	DBLP DOI BibTeX RDF
27	Andreas Merkel, Frank Bellosa	Balancing power consumption in multiprocessor systems.	EuroSys	2006	DBLP DOI BibTeX RDF	event counters, thermal management, energy estimation, task migration, energy-aware scheduling
27	Giorgio Calarco, Carla Raffaelli, Giovanni Schembra, Giovanni Tusa	Comparative Analysis of SMP Click Scheduling Techniques.	QoS-IP	2005	DBLP DOI BibTeX RDF
27	K. Korotaev	Hierarchical CPU Schedulers for Multiprocessor Systems, Fair CPU Scheduling and Processes Isolation.	CLUSTER	2005	DBLP DOI BibTeX RDF
27	Ali-Reza Adl-Tabatabai, Jay Bharadwaj, Michal Cierniak, Marsha Eng, Jesse Fang, Brian T. Lewis, Brian R. Murphy, James M. Stichnoth	Improving 64-Bit Java IPF Performance by Compressing Heap References.	CGO	2004	DBLP DOI BibTeX RDF
27	Angela C. Sodan, Lei Lan	LOMARC - Lookahead Matchmaking for Multi-resource Coscheduling.	JSSPP	2004	DBLP DOI BibTeX RDF
27	Gilles Sassatelli, Lionel Torres, Pascal Benoit, Thierry Gil, Camille Diou, Gaston Cambon, Jérôme Galy	Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications.	DATE	2002	DBLP DOI BibTeX RDF
27	Robert P. Colwell, Bob Brennan	Intel's Formal Verification Experience on the Willamette Development.	TPHOLs	2000	DBLP DOI BibTeX RDF
25	John A. Stratton, Vinod Grover, Jaydeep Marathe, Bastiaan Aarts, Mike Murphy, Ziang Hu, Wen-mei W. Hwu	Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs.	CGO	2010	DBLP DOI BibTeX RDF	multicore, CUDA, CPU, SPMD
25	David B. Thomas, Lee W. Howes, Wayne Luk	A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation.	FPGA	2009	DBLP DOI BibTeX RDF	mppa, fpga, monte-carlo, random numbers, gpu
25	John E. Stone, Jan Saam, David J. Hardy, Kirby L. Vandivort, Wen-mei W. Hwu, Klaus Schulten	High performance computation and interactive display of molecular orbitals on GPUs and multi-core CPUs.	GPGPU	2009	DBLP DOI BibTeX RDF	molecular orbital, GPGPU, CUDA, GPU computing
25	Daniel Ziener, Jürgen Teich	Concepts for Autonomous Control Flow Checking for Embedded CPUs.	ATC	2008	DBLP DOI BibTeX RDF
25	John A. Stratton, Sam S. Stone, Wen-mei W. Hwu	MCUDA: An Efficient Implementation of CUDA Kernels for Multi-core CPUs.	LCPC	2008	DBLP DOI BibTeX RDF
25	Honggang Wang, Jide Zhao, Hongguang Li, Jianguo Wang	Parallel Clustering Algorithms for Image Processing on Multi-core CPUs.	CSSE (3)	2008	DBLP DOI BibTeX RDF
25	Javier Celaya, Unai Arronategui	Scalable Architecture for Allocation of Idle CPUs in a P2P Network.	HPCC	2006	DBLP DOI BibTeX RDF	Parallel and Distributed Architectures, Networking Protocols and Routing and Algorithms, Reliability and Fault-tolerance, Parallel and Distributed Algorithms, Grid Computing, Peer-to-Peer Computing
25	Nilesh Padhariya, Kolin Paul, Dheeraj Bhardwaj	A FLOPs Based Model for Performance Analysis and Scheduling of Applications for Single and Multiple CPUs.	ICPP Workshops	2006	DBLP DOI BibTeX RDF
25	Sanghoan Chang, Gwan Choi	Timing Failure Analysis of Commercial CPUs Under Operating Stress.	DFT	2006	DBLP DOI BibTeX RDF
25	João Canas Ferreira, Miguel M. Silva	Run-Time Reconfiguration Support for FPGAs with Embedded CPUs: The Hardware Layer.	IPDPS	2005	DBLP DOI BibTeX RDF
25	Uwe Langer	Integration of Performance Evaluations in the Design Process of CPUs and Computer Systems.	MMB	1995	DBLP DOI BibTeX RDF	CPU design, workload hierarchy, generic objects, information re-use, simulation, performance evaluation, modelling, computer design
18	Thanos Makatos, Yannis Klonatos, Manolis Marazakis, Michail D. Flouris, Angelos Bilas	Using transparent compression to improve SSD-based I/O caches.	EuroSys	2010	DBLP DOI BibTeX RDF	online block-level compression, solid state disk caches, evaluation, I/O performance
18	Igor Melatti, Robert Palmer, Geoffrey Sawaya, Yu Yang 0013, Robert M. Kirby, Ganesh Gopalakrishnan	Parallel and distributed model checking in Eddy.	Int. J. Softw. Tools Technol. Transf.	2009	DBLP DOI BibTeX RDF
18	Mahdi Dashtbozorgi, Mohammad Abdollahi Azgomi	A scalable multi-core aware software architecture for high-performance network monitoring.	SIN	2009	DBLP DOI BibTeX RDF	high-performance network monitoring, multi-core aware architecture, scalable architecture
18	Steffen Frey, Christoph Müller 0001, Magnus Strengert, Thomas Ertl	Concurrent CT Reconstruction and Visual Analysis Using Hybrid Multi-resolution Raycasting in a Cluster Environment.	ISVC (1)	2009	DBLP DOI BibTeX RDF
18	Ravi Krishnamurthy	A data warehouse appliance for the mass market.	SIGMOD Conference	2009	DBLP DOI BibTeX RDF	data warehouse, appliance
18	Lokman A. Abbas-Turki, Stéphane Vialle, Bernard Lapeyre, Patrick P. Mercier	High dimensional pricing of exotic European contracts on a GPU Cluster, and comparison to a CPU cluster.	IPDPS	2009	DBLP DOI BibTeX RDF
18	Gerd Pfeiffer, Stefan Baumgart, Jan Schröder, Manfred Schimmler	A Massively Parallel Architecture for Bioinformatics.	ICCS (1)	2009	DBLP DOI BibTeX RDF
18	Takanori Ueda, Yu Hirate, Hayato Yamana	Exploiting idle CPU cores to improve file access performance.	ICUIMC	2009	DBLP DOI BibTeX RDF	access pattern mining, many core, access pattern, replacement algorithm, buffer caching
18	Chuliang Weng, Zhigang Wang, Minglu Li 0001, Xinda Lu	The hybrid scheduling framework for virtual machine systems.	VEE	2009	DBLP DOI BibTeX RDF	virtualization, scheduling strategy, hybrid scheduling
18	Megumi Ito, Shuichi Oikawa	Lightweight Shadow Paging for Efficient Memory Isolation in Gandalf VMM.	ISORC	2008	DBLP DOI BibTeX RDF	Virtual Machine Monitors, System Software
18	Le Liu, Jianhua Feng, Guoliang Li 0001, Qian Qian, Jianhui Li	Parallel Structural Join Algorithm on Shared-Memory Multi-Core Systems.	WAIM	2008	DBLP DOI BibTeX RDF
18	Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin	A helper thread based EDP reduction scheme for adapting application execution in CMPs.	IPDPS	2008	DBLP DOI BibTeX RDF
18	Yinfei Pan, Ying Zhang, Kenneth Chiu	Simultaneous transducers for data-parallel XML parsing.	IPDPS	2008	DBLP DOI BibTeX RDF
18	Butler W. Lampson	Lazy and speculative execution in computer systems.	ICFP	2008	DBLP DOI BibTeX RDF	lazy evaluation
18	Jack Whitham, Neil C. Audsley	Forming Virtual Traces for WCET Analysis and Reduction.	RTCSA	2008	DBLP DOI BibTeX RDF
18	Nobuko Yoshida, Vasco Thudichum Vasconcelos, Hervé Paulino, Kohei Honda 0001	Session-Based Compilation Framework for Multicore Programming.	FMCO	2008	DBLP DOI BibTeX RDF
18	Malay K. Ganai, Weihong Li	d-TSR: Parallelizing SMT-Based BMC Using Tunnels over a Distributed Framework.	Haifa Verification Conference	2008	DBLP DOI BibTeX RDF
18	Jung-Lok Yu, Jin-Soo Kim 0001, Seung Ryoul Maeng	A runtime resolution scheme for priority boost conflict in implicit coscheduling.	J. Supercomput.	2007	DBLP DOI BibTeX RDF	Priority boost conflict, Runtime contention, Rescheduling latency, Process reordering, Clusters, Performance comparison, Coscheduling
18	Seung Woo Son 0001, Konrad Malkowski, Guilin Chen, Mahmut T. Kandemir, Padma Raghavan	Reducing energy consumption of parallel sparse matrix applications through integrated link/CPU voltage scaling.	J. Supercomput.	2007	DBLP DOI BibTeX RDF	Parallel sparse matrix, Computation, Dynamic voltage scaling, Communication networks, Energy consumption
18	Roberto Maria Avanzi, Nicolas Thériault	Effects of Optimizations for Software Implementations of Small Binary Field Arithmetic.	WAIFI	2007	DBLP DOI BibTeX RDF	curve-based cryptography, efficient implementation, Binary fields
18	Claudio Lucchese, Salvatore Orlando 0001, Raffaele Perego 0001	Parallel Mining of Frequent Closed Patterns: Harnessing Modern Computer Architectures.	ICDM	2007	DBLP DOI BibTeX RDF
18	Makoto Matsumoto, Mutsuo Saito, Takuji Nishimura, Mariko Hagita	A Fast Stream Cipher with Huge State Space and Quasigroup Filter for Software.	Selected Areas in Cryptography	2007	DBLP DOI BibTeX RDF	combined generator, filter with memory, quasigroup filter, multiplicative filter, CryptMT, distribution, stream cipher, period, eSTREAM
18	Nicholas Weaver, Vern Paxson, José M. González	The shunt: an FPGA-based accelerator for network intrusion prevention.	FPGA	2007	DBLP DOI BibTeX RDF	FPGA, intrusion detection, hardware acceleration, NIC
18	Nathan Woods	Integrating FPGAs in high-performance computing: the architecture and implementation perspective.	FPGA	2007	DBLP DOI BibTeX RDF	compute acceleration, high-performance computinghigh-performance computing, reconfigurable computing, co-processor
18	Åshild Grønstad Solheim, Olav Lysne, Thomas Sødring, Tor Skeie, Jakob Aleksander Libak	Routing-Contained Virtualization Based on Up/Down Forwarding.	HiPC	2007	DBLP DOI BibTeX RDF
18	Rui Fang, Bingsheng He, Mian Lu, Ke Yang, Naga K. Govindaraju, Qiong Luo 0001, Pedro V. Sander	GPUQP: query co-processing using graphics processors.	SIGMOD Conference	2007	DBLP DOI BibTeX RDF	query processing, graphics processing units
18	Jörg Domaschka, Andreas Ingmar Schmied, Hans P. Reiser, Franz J. Hauck	Revisiting Deterministic Multithreading Strategies.	IPDPS	2007	DBLP DOI BibTeX RDF
18	Alan Kaminsky	Parallel Java: A Unified API for Shared Memory and Cluster Parallel Programming in 100% Java.	IPDPS	2007	DBLP DOI BibTeX RDF
18	Michael Ward, Neil C. Audsley	A Deterministic Implementation Process for Accurate and Traceable System Timing and Space Analysis.	RTCSA	2007	DBLP DOI BibTeX RDF
18	Nicolas Fritz, Philipp Lucas 0001, Reinhard Wilhelm	Exploiting SIMD Parallelism with the CGiSCompiler Framework.	LCPC	2007	DBLP DOI BibTeX RDF
18	Marco Di Natale, Enrico Bini	Optimizing the FPGA Implementation of HRT Systems.	IEEE Real-Time and Embedded Technology and Applications Symposium	2007	DBLP DOI BibTeX RDF
18	Peter Lindstrom 0001, Martin Isenburg	Fast and Efficient Compression of Floating-Point Data.	IEEE Trans. Vis. Comput. Graph.	2006	DBLP DOI BibTeX RDF	file compaction for I/O efficiency, fast entropy coding, range coder, large scale simulation and visualization, lossless compression, High throughput, predictive coding
18	Gundolf Kiefer, Helko Lehmann, Jürgen Weese	Fast Maximum Intensity Projections of Large Medical Data Sets by Exploiting Hierarchical Memory Architectures.	IEEE Trans. Inf. Technol. Biomed.	2006	DBLP DOI BibTeX RDF
18	Carsten Kutzner, David van der Spoel, Martin Fechner, Erik Lindahl, Udo W. Schmitt, Bert L. de Groot, Helmut Grubmüller	Improved GROMACS Scaling on Ethernet Switched Clusters.	PVM/MPI	2006	DBLP DOI BibTeX RDF
18	Daisuke Takahashi	An Implementation of Parallel 1-D FFT Using SSE3 Instructions on Dual-Core Processors.	PARA	2006	DBLP DOI BibTeX RDF
18	Igor Melatti, Robert Palmer, Geoffrey Sawaya, Yu Yang 0013, Robert M. Kirby, Ganesh Gopalakrishnan	Parallel and Distributed Model Checking in Eddy.	SPIN	2006	DBLP DOI BibTeX RDF
18	Goncalo M. de Matos, Horácio C. Neto	On Reconfigurable Architectures for Efficient Matrix Inversion.	FPL	2006	DBLP DOI BibTeX RDF
18	Rick Janda, Wolfgang E. Nagel, Bernd Trenkler	Analyzing the Interaction of OpenMP Programs Within Multiprogramming Environments on a Sun Fire E25K System with PARbench.	Euro-Par	2006	DBLP DOI BibTeX RDF
18	Shlomit S. Pinter, Marcel Zalmanovici	Data Sharing Conscious Scheduling for Multi-threaded Applications on SMP Machines.	Euro-Par	2006	DBLP DOI BibTeX RDF
18	Seung Woo Son 0001, Konrad Malkowski, Guilin Chen, Mahmut T. Kandemir, Padma Raghavan	Integrated link/CPU voltage scaling for reducing energy consumption of parallel sparse matrix applications.	IPDPS	2006	DBLP DOI BibTeX RDF
18	Christophe Blanchet, Christophe Combet, Vladimir Daric, Gilbert Deléage	Web Services Interface to Run Protein Sequence Tools on Grid, Testcase of Protein Sequence Alignment.	ISBMDA	2006	DBLP DOI BibTeX RDF	Protein Sequence Analysis, Web Services, Grid computing, Bioinformatics
18	Peter E. Strazdins, Richard Alexander, David Barr	Performance Enhancement of SMP Clusters with Multiple Network Interfaces Using Virtualization.	ISPA Workshops	2006	DBLP DOI BibTeX RDF
18	Leopold Grinberg, Suchuan Dong, James Noble 0002, Alexander Yakhot, George E. Karniadakis, Nicholas T. Karonis	Poster reception - Human arterial tree simulation on TeraGrid.	SC	2006	DBLP DOI BibTeX RDF
18	Nolan Goodnight, Rui Wang 0003, Greg Humphreys	Computation on Programmable Graphics Hardware.	IEEE Computer Graphics and Applications	2005	DBLP DOI BibTeX RDF	image processing, GPU, tone mapping
18	Sven Woop, Jörg Schmittler, Philipp Slusallek	RPU: a programmable ray processing unit for realtime ray tracing.	ACM Trans. Graph.	2005	DBLP DOI BibTeX RDF	ray processing unit, ray tracing, hardware architecture, programmable shading
18	Leonardo Taglietti, José O. Carlomagno Filho, Daniel C. Casarotto, Olinto J. V. Furtado, Luiz C. V. dos Santos	Automatic ADL-Based Assembler Generation for ASIP Programming Support.	SAMOS	2005	DBLP DOI BibTeX RDF
18	Dara Kusic, Raymond Hoare, Alex K. Jones, Joshua Fazekas, John Foster 0001	Extracting Speedup From C-Code With Poor Instruction-Level Parallelism.	IPDPS	2005	DBLP DOI BibTeX RDF
18	Tsutomu Ikegami, Toyokazu Ishida, Dmitri G. Fedorov, Kazuo Kitaura, Yuichi Inadomi, Hiroaki Umeda, Mitsuo Yokokawa, Satoshi Sekiguchi	Full Electron Calculation Beyond 20, 000 Atoms: Ground Electronic State of Photosynthetic Proteins.	SC	2005	DBLP DOI BibTeX RDF