Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
137 | Matti Järvisalo, Tommi A. Junttila |
Limitations of restricted branching in clause learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Constraints An Int. J. ![In: Constraints An Int. J. 14(3), pp. 325-356, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Branching heuristics, Clause learning, Backdoor sets, Proof complexity, Propositional satisfiability, DPLL, Problem structure |
134 | Robert Nieuwenhuis, Albert Oliveras, Cesare Tinelli |
Solving SAT and SAT Modulo Theories: From an abstract Davis--Putnam--Logemann--Loveland procedure to DPLL(T). ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 53(6), pp. 937-977, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
SAT solvers, Satisfiability Modulo Theories |
130 | Robert Nieuwenhuis, Albert Oliveras, Cesare Tinelli |
Abstract DPLL and Abstract DPLL Modulo Theories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LPAR ![In: Logic for Programming, Artificial Intelligence, and Reasoning, 11th International Conference, LPAR 2004, Montevideo, Uruguay, March 14-18, 2005, Proceedings, pp. 36-50, 2004, Springer, 3-540-25236-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
101 | Matti Järvisalo, Tommi A. Junttila |
Limitations of Restricted Branching in Clause Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CP ![In: Principles and Practice of Constraint Programming - CP 2007, 13th International Conference, CP 2007, Providence, RI, USA, September 23-27, 2007, Proceedings, pp. 348-363, 2007, Springer, 978-3-540-74969-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
84 | Roberto Sebastiani |
From KSAT to Delayed Theory Combination: Exploiting DPLL Outside the SAT Domain. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FroCoS ![In: Frontiers of Combining Systems, 6th International Symposium, FroCoS 2007, Liverpool, UK, September 10-12, 2007, Proceedings, pp. 28-46, 2007, Springer, 978-3-540-74620-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
84 | Harald Ganzinger, George Hagen, Robert Nieuwenhuis, Albert Oliveras, Cesare Tinelli |
DPLL( T): Fast Decision Procedures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 16th International Conference, CAV 2004, Boston, MA, USA, July 13-17, 2004, Proceedings, pp. 175-188, 2004, Springer, 3-540-22342-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
82 | Himanshu Jain, Edmund M. Clarke |
Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 563-568, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
NNF, verification, Boolean satisfiability, DPLL |
82 | Michael Alekhnovich, Edward A. Hirsch, Dmitry Itsykson |
Exponential Lower Bounds for the Running Time of DPLL Algorithms on Satisfiable Formulas. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Autom. Reason. ![In: J. Autom. Reason. 35(1-3), pp. 51-72, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
DPLL algorithms, satisfiability |
74 | Matti Järvisalo, Tommi A. Junttila, Ilkka Niemelä |
Unrestricted vs restricted cut in a tableau method for Boolean circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Math. Artif. Intell. ![In: Ann. Math. Artif. Intell. 44(4), pp. 373-399, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cut rule, satisfiability, proof complexity, Boolean circuits, DPLL |
71 | Kenneth L. McMillan, Andreas Kuehlmann, Mooly Sagiv |
Generalizing DPLL to Richer Logics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 21st International Conference, CAV 2009, Grenoble, France, June 26 - July 2, 2009. Proceedings, pp. 462-476, 2009, Springer, 978-3-642-02657-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
71 | Paolo Liberatore |
Complexity results on DPLL and resolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Log. ![In: ACM Trans. Comput. Log. 7(1), pp. 84-107, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Davis-Putnam, NP-completeness, propositional satisfiability |
63 | Carsten Sinz, Edda-Maria Dieringer |
DPvis - A Tool to Visualize the Structure of SAT Instances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing, 8th International Conference, SAT 2005, St. Andrews, UK, June 19-23, 2005, Proceedings, pp. 257-268, 2005, Springer, 3-540-26276-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
59 | Robert Nieuwenhuis, Albert Oliveras |
DPLL(T) with Exhaustive Theory Propagation and Its Application to Difference Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 17th International Conference, CAV 2005, Edinburgh, Scotland, UK, July 6-10, 2005, Proceedings, pp. 321-334, 2005, Springer, 3-540-27231-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
59 | Michael Alekhnovich, Edward A. Hirsch, Dmitry Itsykson |
Exponential Lower Bounds for the Running Time of DPLL Algorithms on Satisfiable Formulas. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming: 31st International Colloquium, ICALP 2004, Turku, Finland, July 12-16, 2004. Proceedings, pp. 84-96, 2004, Springer, 3-540-22849-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
59 | Cesare Tinelli |
A DPLL-Based Calculus for Ground Satisfiability Modulo Theories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JELIA ![In: Logics in Artificial Intelligence, European Conference, JELIA 2002, Cosenza, Italy, September, 23-26, Proceedings, pp. 308-319, 2002, Springer, 3-540-44190-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
51 | Stéphane Lescuyer, Sylvain Conchon |
Improving Coq Propositional Reasoning Using a Lazy CNF Conversion Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FroCoS ![In: Frontiers of Combining Systems, 7th International Symposium, FroCoS 2009, Trento, Italy, September 16-18, 2009. Proceedings, pp. 287-303, 2009, Springer, 978-3-642-04221-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
51 | Clark W. Barrett, Robert Nieuwenhuis, Albert Oliveras, Cesare Tinelli |
Splitting on Demand in SAT Modulo Theories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LPAR ![In: Logic for Programming, Artificial Intelligence, and Reasoning, 13th International Conference, LPAR 2006, Phnom Penh, Cambodia, November 13-17, 2006, Proceedings, pp. 512-526, 2006, Springer, 3-540-48281-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
51 | Romanelli Lodron Zuim, José T. de Sousa, Claudionor José Nunes Coelho Jr. |
A Fast SAT Solver Strategy Based on Negated Clauses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006, pp. 110-115, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
51 | Gilles Audemard, Lakhdar Sais |
A Symbolic Search Based Approach for Quantified Boolean Formulas. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing, 8th International Conference, SAT 2005, St. Andrews, UK, June 19-23, 2005, Proceedings, pp. 16-30, 2005, Springer, 3-540-26276-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Satisfiability, Binary decision diagram, Quantified boolean formula |
48 | Anthony Monnet, Roger Villemaire |
Scalable formula decomposition for propositional satisfiability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
C3S2E ![In: Canadian Conference on Computer Science & Software Engineering, C3S2E 2010, Montreal, Quebec, Canada, May 19-20, 2010, Proceedings, pp. 43-52, 2010, ACM, 978-1-60558-901-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
scalability, SAT, tree decomposition, propositional satisfiability, DPLL |
48 | Simona Cocco, Rémi Monasson |
Restarts and exponential acceleration of the Davis-Putnam-Loveland-Logemann algorithm: A large deviation analysis of the generalized unit clause heuristic for random 3-SAT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Math. Artif. Intell. ![In: Ann. Math. Artif. Intell. 43(1), pp. 153-172, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
satisfiability, large deviations, restart, DPLL |
48 | Olga Tveretina |
A Decision Procedure for Equality Logic with Uninterpreted Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AISC ![In: Artificial Intelligence and Symbolic Computation, 7th International Conference, AISC 2004, Linz, Austria, September 22-24, 2004, Proceedings, pp. 66-79, 2004, Springer, 3-540-23212-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
equality logic with uninterpreted functions, DPLL procedure, satisfiability |
48 | Mohammad Ghasemzadeh 0001, Volker Klotz, Christoph Meinel |
Embedding Memoization to the Semantic Tree Search for Deciding QBFs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Australian Conference on Artificial Intelligence ![In: AI 2004: Advances in Artificial Intelligence, 17th Australian Joint Conference on Artificial Intelligence, Cairns, Australia, December 4-6, 2004, Proceedings, pp. 681-693, 2004, Springer, 3-540-24059-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Zero-Suppressed Binary Decision Diagram (ZDD), Quantified Boolean Formula (QBF), QSAT, Satisfiability, DPLL |
46 | Adrian Balint, Michael Henn, Oliver Gableske |
A Novel Approach to Combine a SLS- and a DPLL-Solver for the Satisfiability Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2009, 12th International Conference, SAT 2009, Swansea, UK, June 30 - July 3, 2009. Proceedings, pp. 284-297, 2009, Springer, 978-3-642-02776-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
46 | Leonardo Mendonça de Moura, Nikolaj S. Bjørner |
Engineering DPLL(T) + Saturation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCAR ![In: Automated Reasoning, 4th International Joint Conference, IJCAR 2008, Sydney, Australia, August 12-15, 2008, Proceedings, pp. 475-490, 2008, Springer, 978-3-540-71069-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
46 | Bruno Dutertre, Leonardo Mendonça de Moura |
A Fast Linear-Arithmetic Solver for DPLL(T). ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 18th International Conference, CAV 2006, Seattle, WA, USA, August 17-20, 2006, Proceedings, pp. 81-94, 2006, Springer, 3-540-37406-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
46 | Cameron Brien, Sharad Malik |
Understanding the Dynamic Behavior of Modern DPLL SAT Solvers through Visual Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, 6th International Conference, FMCAD 2006, San Jose, California, USA, November 12-16, 2006, Proceedings, pp. 49-50, 2006, IEEE Computer Society, 0-7695-2707-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
46 | Allen Van Gelder |
Pool Resolution and Its Relation to Regular Resolution and DPLL with Clause Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LPAR ![In: Logic for Programming, Artificial Intelligence, and Reasoning, 12th International Conference, LPAR 2005, Montego Bay, Jamaica, December 2-6, 2005, Proceedings, pp. 580-594, 2005, Springer, 3-540-30553-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
46 | Rémi Monasson |
A Generating Function Method for the Average-Case Analysis of DPLL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPROX-RANDOM ![In: Approximation, Randomization and Combinatorial Optimization, Algorithms and Techniques, 8th International Workshop on Approximation Algorithms for Combinatorial Optimization Problems, APPROX 2005 and 9th InternationalWorkshop on Randomization and Computation, RANDOM 2005, Berkeley, CA, USA, August 22-24, 2005, Proceedings, pp. 402-413, 2005, Springer, 3-540-28239-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
46 | Anbulagan |
Extending Unit Propagation Look-Ahead of DPLL Procedure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRICAI ![In: PRICAI 2004: Trends in Artificial Intelligence, 8th Pacific Rim International Conference on Artificial Intelligence, Auckland, New Zealand, August 9-13, 2004, Proceedings, pp. 173-182, 2004, Springer, 3-540-22817-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
46 | Jinbo Huang, Adnan Darwiche |
Using DPLL for Efficient OBDD Construction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT (Selected Papers ![In: Theory and Applications of Satisfiability Testing, 7th International Conference, SAT 2004, Vancouver, BC, Canada, May 10-13, 2004, Revised Selected Papers, pp. 157-172, 2004, Springer, 3-540-27829-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
46 | Paul Beame, Russell Impagliazzo, Toniann Pitassi, Nathan Segerlind |
Memoization and DPLL: Formula Caching Proof Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCC ![In: 18th Annual IEEE Conference on Computational Complexity (Complexity 2003), 7-10 July 2003, Aarhus, Denmark, pp. 248-, 2003, IEEE Computer Society, 0-7695-1879-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
44 | Carsten Sinz |
Visualizing SAT Instances and Runs of the DPLL Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Autom. Reason. ![In: J. Autom. Reason. 39(2), pp. 219-243, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
SAT instance, DPLL procedure |
38 | Moshe Y. Vardi |
Symbolic Techniques in Propositional Satisfiability Solving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2009, 12th International Conference, SAT 2009, Swansea, UK, June 30 - July 3, 2009. Proceedings, pp. 2-3, 2009, Springer, 978-3-642-02776-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
38 | Lei Fang 0002, Michael S. Hsiao |
A new hybrid solution to boost SAT solver performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1307-1313, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Peter Baumgartner 0001, Alexander Fuchs 0003, Cesare Tinelli |
Lemma Learning in the Model Evolution Calculus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LPAR ![In: Logic for Programming, Artificial Intelligence, and Reasoning, 13th International Conference, LPAR 2006, Phnom Penh, Cambodia, November 13-17, 2006, Proceedings, pp. 572-586, 2006, Springer, 3-540-48281-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
38 | Fahiem Bacchus |
CSPs: Adding Structure to SAT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2006, 9th International Conference, Seattle, WA, USA, August 12-15, 2006, Proceedings, pp. 10-10, 2006, Springer, 3-540-37206-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
38 | Daijue Tang, Sharad Malik |
Solving Quantified Boolean Formulas with Circuit Observability Don't Cares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2006, 9th International Conference, Seattle, WA, USA, August 12-15, 2006, Proceedings, pp. 368-381, 2006, Springer, 3-540-37206-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
38 | Robert Nieuwenhuis, Albert Oliveras |
Decision Procedures for SAT, SAT Modulo Theories and Beyond. The BarcelogicTools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LPAR ![In: Logic for Programming, Artificial Intelligence, and Reasoning, 12th International Conference, LPAR 2005, Montego Bay, Jamaica, December 2-6, 2005, Proceedings, pp. 23-46, 2005, Springer, 3-540-30553-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
38 | Peter Baumgartner 0001, Cesare Tinelli |
The Model Evolution Calculus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CADE ![In: Automated Deduction - CADE-19, 19th International Conference on Automated Deduction Miami Beach, FL, USA, July 28 - August 2, 2003, Proceedings, pp. 350-364, 2003, Springer, 3-540-40559-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
38 | Djamal Habet, Chu Min Li, Laure Devendeville, Michel Vasquez |
A Hybrid Approach for SAT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CP ![In: Principles and Practice of Constraint Programming - CP 2002, 8th International Conference, CP 2002, Ithaca, NY, USA, September 9-13, 2002, Proceedings, pp. 172-184, 2002, Springer, 3-540-44120-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
38 | Lintao Zhang, Sharad Malik |
Towards a Symmetric Treatment of Satisfaction and Conflicts in Quantified Boolean Formula Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CP ![In: Principles and Practice of Constraint Programming - CP 2002, 8th International Conference, CP 2002, Ithaca, NY, USA, September 9-13, 2002, Proceedings, pp. 200-215, 2002, Springer, 3-540-44120-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
38 | Peter Baumgartner 0001 |
FDPLL - A First Order Davis-Putnam-Longeman-Loveland Procedure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CADE ![In: Automated Deduction - CADE-17, 17th International Conference on Automated Deduction, Pittsburgh, PA, USA, June 17-20, 2000, Proceedings, pp. 200-219, 2000, Springer, 3-540-67664-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
38 | T. M. Almaida, Moisés Simões Piedade |
High performance analog and digital PLL design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 394-397, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
36 | Filip Maric |
Formalization and Implementation of Modern SAT Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Autom. Reason. ![In: J. Autom. Reason. 43(1), pp. 81-119, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Algorithms, Data structures, Software verification, DPLL, SAT solving |
36 | Ming-e Jing, Dian Zhou, Pushan Tang, Xiaofang Zhou, Hua Zhang 0019 |
Solving SAT problem by heuristic polarity decision-making algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 50(6), pp. 915-925, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
complete algorithm, decision-making, DPLL, SAT problem |
33 | Carsten Sinz, Markus Iser |
Problem-Sensitive Restart Heuristics for the DPLL Procedure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2009, 12th International Conference, SAT 2009, Swansea, UK, June 30 - July 3, 2009. Proceedings, pp. 356-362, 2009, Springer, 978-3-642-02776-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
33 | Eric I. Hsu, Sheila A. McIlraith |
VARSAT: Integrating Novel Probabilistic Inference Techniques with DPLL Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2009, 12th International Conference, SAT 2009, Swansea, UK, June 30 - July 3, 2009. Proceedings, pp. 377-390, 2009, Springer, 978-3-642-02776-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Survey Propagation/EMBP, Variable/Value Ordering Heuristics, Probabilistic Inference |
33 | Leonardo Mendonça de Moura, Nikolaj S. Bjørner |
Deciding Effectively Propositional Logic Using DPLL and Substitution Sets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCAR ![In: Automated Reasoning, 4th International Joint Conference, IJCAR 2008, Sydney, Australia, August 12-15, 2008, Proceedings, pp. 410-425, 2008, Springer, 978-3-540-71069-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
33 | Dan Goldwasser, Ofer Strichman, Shai Fine |
A Theory-Based Decision Heuristic for DPLL(T). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, FMCAD 2008, Portland, Oregon, USA, 17-20 November 2008, pp. 1-8, 2008, IEEE, 978-1-4244-2735-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
33 | Raihan H. Kibria |
Evolving a Neural Net-Based Decision and Search Heuristic for DPLL SAT Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCNN ![In: Proceedings of the International Joint Conference on Neural Networks, IJCNN 2007, Celebrating 20 years of neural networks, Orlando, Florida, USA, August 12-17, 2007, pp. 765-770, 2007, IEEE, 978-1-4244-1379-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
33 | Shujun Deng, Jinian Bian, Weimin Wu, Xiaoqing Yang, Yanni Zhao |
EHSAT: An Efficient RTL Satisfiability Solver Using an Extended DPLL Procedure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 588-593, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
33 | Scott Cotton, Oded Maler |
Fast and Flexible Difference Constraint Propagation for DPLL(T). ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2006, 9th International Conference, Seattle, WA, USA, August 12-15, 2006, Proceedings, pp. 170-183, 2006, Springer, 3-540-37206-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
33 | Raihan H. Kibria, You Li |
Optimizing the Initialization of Dynamic Decision Heuristics in DPLL SAT Solvers Using Genetic Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroGP ![In: Genetic Programming, 9th European Conference, EuroGP 2006, Budapest, Hungary, April 10-12, 2006, Proceedings, pp. 331-340, 2006, Springer, 3-540-33143-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
33 | Dimitris Achlioptas, Paul Beame, Michael Molloy 0001 |
Exponential bounds for DPLL below the satisfiability threshold. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SODA ![In: Proceedings of the Fifteenth Annual ACM-SIAM Symposium on Discrete Algorithms, SODA 2004, New Orleans, Louisiana, USA, January 11-14, 2004, pp. 139-140, 2004, SIAM, 0-89871-558-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
33 | Markus Wedler, Dominik Stoffel, Wolfgang Kunz |
Arithmetic Reasoning in DPLL-Based SAT Solving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 30-35, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
33 | Morten Irgens, William S. Havens |
On Selection Strategies for the DPLL Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Canadian AI ![In: Advances in Artificial Intelligence, 17th Conference of the Canadian Society for Computational Studies of Intelligence, Canadian AI 2004, London, Ontario, Canada, May 17-19, 2004, Proceedings, pp. 277-291, 2004, Springer, 3-540-22004-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
33 | Jader A. De Lima, Peterson R. Agostinho |
A low-voltage low sensitivity sinusoidal VCO for DPLL realizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 789-792, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
33 | Christian Thiffault, Fahiem Bacchus, Toby Walsh |
Solving Non-clausal Formulas with DPLL Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CP ![In: Principles and Practice of Constraint Programming - CP 2004, 10th International Conference, CP 2004, Toronto, Canada, September 27 - October 1, 2004, Proceedings, pp. 663-678, 2004, Springer, 3-540-23241-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
33 | Anna Vasylenko, Orla Feely |
Nonlinear dynamics of first-order DPLL with frequency-modulated input. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 775-778, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
33 | Ilias Panayiotopoulos, Phillip Constantinou |
Performance Improvement of Nonuniform Polarity-DPLL Symbol Synchronizers by Using Novel Adaptive Statistical Loop Filtering Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCC ![In: Proceedings of the Fifth IEEE Symposium on Computers and Communications (ISCC 2000), 4-6 July 2000, Antibes, France, pp. 756-761, 2000, IEEE Computer Society, 0-7695-0722-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Dhadesugoor R. Vaman, Ashwin Ashok |
An Efficient Distributed Synchronization Method for TD/CDMA based Mobile Ad Hoc Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PerCom Workshops ![In: Seventh Annual IEEE International Conference on Pervasive Computing and Communications - Workshops (PerCom Workshops 2009), 9-13 March 2009, Galveston, TX, USA, pp. 1-6, 2009, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Jingchao Chen |
Building a Hybrid SAT Solver via Conflict-Driven, Look-Ahead and XOR Reasoning Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2009, 12th International Conference, SAT 2009, Swansea, UK, June 30 - July 3, 2009. Proceedings, pp. 298-311, 2009, Springer, 978-3-642-02776-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Conflict-driven, XOR reasoning, Hybrid solving technique, search pruning technique, Look-ahead, Boolean satisfiability (SAT) |
25 | Christopher Lynch, Duc-Khanh Tran |
SMELS: Satisfiability Modulo Equality with Lazy Superposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATVA ![In: Automated Technology for Verification and Analysis, 6th International Symposium, ATVA 2008, Seoul, Korea, October 20-23, 2008. Proceedings, pp. 186-200, 2008, Springer, 978-3-540-88386-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Yong Gao 0001 |
Random Instances of W[2]-Complete Problems: Thresholds, Complexity, and Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2008, 11th International Conference, SAT 2008, Guangzhou, China, May 12-15, 2008. Proceedings, pp. 91-104, 2008, Springer, 978-3-540-79718-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Amit Stark, Dan Raphaeli |
Combining Decision-Feedback Equalization and Carrier Recovery for Two-Dimensional Signal Constellations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 55(10), pp. 2012-2021, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Jose Marcelo Lima Duarte, Francisco das Chagas Mota, Manoel J. M. Carvalho |
Digital PM demodulator for brazilian data collecting system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007, pp. 142-146, 2007, ACM, 978-1-59593-816-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
BDCS, control system theory, FPGA, PLL, phase locked loop |
25 | Martin Davis |
SAT: Past and Future. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2007, 10th International Conference, Lisbon, Portugal, May 28-31, 2007, Proceedings, pp. 1-2, 2007, Springer, 978-3-540-72787-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Roberto Cavada, Alessandro Cimatti, Anders Franzén, Krishnamani Kalyanasundaram, Marco Roveri, R. K. Shyamasundar |
Computing Predicate Abstractions by Integrating BDDs and SMT Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, 7th International Conference, FMCAD 2007, Austin, Texas, USA, November 11-14, 2007, Proceedings, pp. 69-76, 2007, IEEE Computer Society, 0-7695-3023-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Michael Codish |
Proving Termination with (Boolean) Satisfaction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LOPSTR ![In: Logic-Based Program Synthesis and Transformation, 17th International Symposium, LOPSTR 2007, Kongens Lyngby, Denmark, August 23-24, 2007, Revised Selected Papers, pp. 1-7, 2007, Springer, 978-3-540-78768-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Mahmoud Fawzy Wagdy, Srishti Vaishnava |
A Fast-Locking Digital Phase-Locked Loop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Third International Conference on Information Technology: New Generations (ITNG 2006), 10-12 April 2006, Las Vegas, Nevada, USA, pp. 742-746, 2006, IEEE Computer Society, 0-7695-2497-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Horst Samulowitz, Fahiem Bacchus |
Binary Clause Reasoning in QBF. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2006, 9th International Conference, Seattle, WA, USA, August 12-15, 2006, Proceedings, pp. 353-367, 2006, Springer, 3-540-37206-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Himanshu Jain, Constantinos Bartzis, Edmund M. Clarke |
Satisfiability Checking of Non-clausal Formulas Using General Matings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2006, 9th International Conference, Seattle, WA, USA, August 12-15, 2006, Proceedings, pp. 75-89, 2006, Springer, 3-540-37206-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Peter Baumgartner 0001, Cesare Tinelli |
The Model Evolution Calculus with Equality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CADE ![In: Automated Deduction - CADE-20, 20th International Conference on Automated Deduction, Tallinn, Estonia, July 22-27, 2005, Proceedings, pp. 392-408, 2005, Springer, 3-540-28005-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Kameshwar Chandrasekar, Michael S. Hsiao |
Q-PREZ: QBF Evaluation Using Partition, Resolution and Elimination with ZBDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 189-194, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Sathiamoorthy Subbarayan, Dhiraj K. Pradhan |
NiVER: Non-increasing Variable Elimination Resolution for Preprocessing SAT Instances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT (Selected Papers ![In: Theory and Applications of Satisfiability Testing, 7th International Conference, SAT 2004, Vancouver, BC, Canada, May 10-13, 2004, Revised Selected Papers, pp. 276-291, 2004, Springer, 3-540-27829-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Haixia Jia, Cristopher Moore |
How Much Backtracking Does It Take to Color Random Graphs? Rigorous Results on Heavy Tails. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CP ![In: Principles and Practice of Constraint Programming - CP 2004, 10th International Conference, CP 2004, Toronto, Canada, September 27 - October 1, 2004, Proceedings, pp. 742-746, 2004, Springer, 3-540-23241-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Lintao Zhang, Sharad Malik |
The Quest for Efficient Boolean Satisfiability Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 14th International Conference, CAV 2002,Copenhagen, Denmark, July 27-31, 2002, Proceedings, pp. 17-36, 2002, Springer, 3-540-43997-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Gilles Audemard, Piergiorgio Bertoli, Alessandro Cimatti, Artur Kornilowicz, Roberto Sebastiani |
A SAT Based Approach for Solving Formulas over Boolean and Linear Mathematical Propositions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CADE ![In: Automated Deduction - CADE-18, 18th International Conference on Automated Deduction, Copenhagen, Denmark, July 27-30, 2002, Proceedings, pp. 195-210, 2002, Springer, 3-540-43931-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Lintao Zhang, Sharad Malik |
The Quest for Efficient Boolean Satisfiability Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CADE ![In: Automated Deduction - CADE-18, 18th International Conference on Automated Deduction, Copenhagen, Denmark, July 27-30, 2002, Proceedings, pp. 295-313, 2002, Springer, 3-540-43931-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Alexey Teplinsky, Orla Feely |
Phase-jitter dynamics in second-order DPLLs with irrational and integer input frequencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 495-498, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
25 | Benyong Zhang, Philip E. Allen |
Feed-forward compensated high switching speed digital phase-locked loop frequency synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 371-374, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
23 | Sandeep Kumar Singla, Pradeep Kumar Jaswal |
Hybrid Satisfiability Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Seventh International Conference on Information Technology: New Generations, ITNG 2010, Las Vegas, Nevada, USA, 12-14 April 2010, pp. 281-284, 2010, IEEE Computer Society, 978-0-7695-3984-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
HybridSAT, Satisfiability, SAT, Boolean Satisfiability, DPLL |
23 | Mahmoud Fawzy Wagdy, Brandon Casey Cabrales |
A Novel Flash Fast-Locking Digital Phase-Locked Loop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Sixth International Conference on Information Technology: New Generations, ITNG 2009, Las Vegas, Nevada, USA, 27-29 April 2009, pp. 47-52, 2009, IEEE Computer Society, 978-0-7695-3596-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
lock time, coarse-tuning, fine-tuning, CMOS, DPLL |
23 | Chang-hong Shan, Zhong-ze Chen, Jin-xiong Jiang |
An All Digital Phase-Locked Loop System with High Performance on Wideband Frequency Tracking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HIS (3) ![In: 9th International Conference on Hybrid Intelligent Systems (HIS 2009), August 12-14, 2009, Shenyang, China, pp. 460-463, 2009, IEEE Computer Society, 978-0-7695-3745-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
All Digital Phase-Locked Loop (all DPLL), Wideband Frequency Tracking, FPGA, Filter, VHDL |
23 | Romanelli Lodron Zuim, José T. de Sousa, Claudionor José Nunes Coelho Jr. |
A fast SAT solver algorithm best suited to reconfigurable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 131-136, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
formal verification, SAT, CNF, DPLL |
23 | Xiaolue Lai, Jaijeet S. Roychowdhury |
A multilevel technique for robust and efficient extraction of phase macromodels of digitally controlled oscillators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 1017-1022, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
DCO, PPV, simulation, PLL, macromodel, VCO, DPLL |
21 | Lili Chen, Morteza Tavakoli Taba, Zainulabideen J. Khalifa, Andreia Cathelin, Ehsan Afshari |
A Fast Back-to-Lock DPLL-Based 192-210-GHz Chirp Generator With +5.9-dBm Peak Output Power for Sub-THz Imaging and Sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 59(5), pp. 1461-1474, May 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
21 | Zhi-Heng Kang, Shen-Iuan Liu |
A 1.6-GHz DPLL Using Feedforward Phase-Error Cancellation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(3), pp. 806-816, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Abdul Muqueem, Shanky Saxena, Govind Singh Patel |
An Ultra-Low-Power C-Band FMCW Transmitter Using a Fast Settling Fractional-N DPLL and Ring-Based Pulse Injection Locking Oscillator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 32(3), pp. 2350045:1-2350045:24, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Zirui Jin, Xiaoyu Shan, Ang Hu, Dongsheng Liu, Xuan Cheng, Jinsong Cui, Chengcheng Zhang, Jianming Lei |
A DTC-based Fractional-N DPLL using probability-density-shaping spur immunity and Q-noise reduction techniques for IoT applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 135, pp. 105753, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Marco Favorito |
Forward LTLf Synthesis: DPLL At Work. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2302.13825, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Dusan Guller |
A DPLL Procedure with Dichotomous Branching for Propositional Product Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2310.15445, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Hai Duong, Linhan Li, ThanhVu Nguyen, Matthew B. Dwyer |
A DPLL(T) Framework for Verifying Deep Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2307.10266, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Ping Lu, Bupesh Pandita, Minhan Chen |
Reference Clock Jitter Immunity by Accurate DPLL Bandwidth Control in a Multiple-link Die-to-Die Interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 66th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2023, Tempe, AZ, USA, August 6-9, 2023, pp. 614-618, 2023, IEEE, 979-8-3503-0210-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Jinghui Jiang, Zhenpei Huang, Qiao Xiang, Lu Tang 0004, Jiwu Shu |
Poster: P4-DPLL: Accelerating SAT Solving Using Switching ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCOMM ![In: Proceedings of the ACM SIGCOMM 2023 Conference, ACM SIGCOMM 2023, New York, NY, USA, 10-14 September 2023, pp. 1123-1125, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Waleed Madany, Yuncheng Zhang, Ashbir Aviat Fadila, Hongye Huang, Junjun Qiu, Atsushi Shirane, Kenichi Okada |
A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 49th IEEE European Solid State Circuits Conference, ESSCIRC 2023, Lisbon, Portugal, September 11-14, 2023, pp. 265-268, 2023, IEEE, 979-8-3503-0420-6. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Haoyang Shen, Hao Zheng, Daniel O'Hare, Deepu John, Barry Cardiff |
Correcting ADC jitter using DPLL timing error signal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: 21st IEEE Interregional NEWCAS Conference, NEWCAS 2023, Edinburgh, United Kingdom, June 26-28, 2023, pp. 1-5, 2023, IEEE, 979-8-3503-0024-6. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Woosong Jung, Hyojun Kim, Yeonggeun Song, Kwang-Hoon Lee, Deog-Kyoon Jeong |
A 0.991JS FFT-Based Fast-Locking, 0.82GHz-to-4.lGHz DPLL-Based lnput-Jitter-Filtering Clock Driver with Wide-Range Mode-Switching 8-Shaped LC Oscillator for DRAM Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2023, San Antonio, TX, USA, April 23-26, 2023, pp. 1-2, 2023, IEEE, 979-8-3503-9948-6. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Marco Favorito |
Forward LTLf Synthesis: DPLL At Work. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OVERLAY@AI*IA ![In: Short Paper Proceedings of the 5th Workshop on Artificial Intelligence and Formal Verification, Logic, Automata, and Synthesis hosted by the 22nd International Conference of the Italian Association for Artificial Intelligence (AIxIA 2023), Rome, Italy, November 7, 2023., pp. 67-72, 2023, CEUR-WS.org. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP BibTeX RDF |
|