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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 55 occurrences of 44 keywords
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Results
Found 31 publication records. Showing 31 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
188 | Markus Levy |
Using EEMBC Benchmarks to Understand Processor Behavior in Embedded Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 3-4, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
51 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose |
Soft vector processors vs FPGA custom hardware: measuring and reducing the gap. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 277, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
eembc, soft, viram, fpga, adaptable, vector, data parallel, processor, simd |
40 | Jason A. Poovey, Thomas M. Conte, Markus Levy, Shay Gal-On |
A Benchmark Characterization of the EEMBC Benchmark Suite. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 29(5), pp. 18-29, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
40 | Markus Levy |
EEMBC and the Purposes of Embedded Processor Benchmarking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2005, March 20-22, 2005, Austin, Texas, USA, Proceedings, pp. 1, 2005, IEEE Computer Society, 0-7803-8965-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
37 | Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito 0001 |
On the exploitation of loop-level parallelism in embedded applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 8(2), pp. 10:1-10:34, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
multithreading, Multi-cores, vectorization, libraries, programming models, thread-level speculation, parallel loops, system-on-chip (Soc) |
37 | Md. Mafijul Islam, Alexander Busck, Mikael Engbom, Simji Lee, Michel Dubois 0001, Per Stenström |
Loop-level Speculative Parallelism in Embedded Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2007 International Conference on Parallel Processing (ICPP 2007), September 10-14, 2007, Xi-An, China, pp. 3, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
37 | Thomas M. Conte |
Keynote: Insight, Not (Random) Numbers: An Embedded Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 3, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
37 | Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito 0001 |
Challenges in exploitation of loop parallelism in embedded applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 173-180, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multithreading, multi-cores, vectorization, libraries, programming models, thread-level speculation, parallel loops |
33 | Markus Levy |
Evaluating Digital Entertainment System Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 68-72, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
DENBench suite, digital media benchmarks, digital device performance, EEMBC, microprocessor systems, benchmarks, MPSoCs |
18 | Tobias J. K. Edler von Koch, Igor Böhm, Björn Franke |
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bit instructions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Proceedings of the CGO 2010, The 8th International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April 24-28, 2010, pp. 180-189, 2010, ACM, 978-1-60558-635-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
ARCompact, dual instruction set architecture, variable-length instructions, register allocation, code size, instruction selection |
18 | Daniel Jones 0005, Nigel P. Topham |
High Speed CPU Simulation Using LTU Dynamic Binary Translation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings, pp. 50-64, 2009, Springer, 978-3-540-92989-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
18 | Jaejin Lee, Junghyun Kim, Choonki Jang, Seungkyun Kim, Bernhard Egger 0002, Kwangsub Kim, Sangyong Han |
FaCSim: a fast and cycle-accurate architecture simulator for embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'08), Tucson, AZ, USA, June 12-13, 2008, pp. 89-100, 2008, ACM, 978-1-60558-104-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
virtual prototyping, architecture simulator, full-system simulation, simulator parallelization, cycle-accurate simulation |
18 | Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan |
Scaling Soft Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2008, 14-15 April 2008, Stanford, Palo Alto, California, USA, pp. 195-205, 2008, IEEE Computer Society, 978-0-7695-3307-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose |
VESPA: portable, scalable, and flexible FPGA-based vector processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 61-70, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
SPREE, VESPA, VIRAM, FPGA, custom, SIMD, vector, ASIP, microarchitecture, application specific, soft processor |
18 | Ciji Isen, Lizy Kurian John, Jung Pil Choi, Hyo Jung Song |
On the representativeness of embedded Java benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IISWC ![In: 4th International Symposium on Workload Characterization (IISWC 2008), Seattle, Washington, USA, September 14-16, 2008, pp. 153-162, 2008, IEEE Computer Society, 978-1-4244-2778-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Teruaki Sakata, Teppei Hirotsu, Hiromichi Yamada, Takeshi Kataoka |
A Cost-Effective Dependable Microcontroller Architecture with Instruction-Level Rollback for Soft Error Recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: The 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2007, 25-28 June 2007, Edinburgh, UK, Proceedings, pp. 256-265, 2007, IEEE Computer Society, 0-7695-2855-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Md. Mafijul Islam |
On the Limitations of Compilers to Exploit Thread-Level Parallelism in Embedded Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACIS-ICIS ![In: 6th Annual IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007), 11-13 July 2007, Melbourne, Australia, pp. 60-66, 2007, IEEE Computer Society, 0-7695-2841-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Ben L. Titzer, Joshua S. Auerbach, David F. Bacon, Jens Palsberg |
The ExoVM system for automatic VM and application reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation, San Diego, California, USA, June 10-13, 2007, pp. 352-362, 2007, ACM, 978-1-59593-633-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
VM design, VM modularity, pre-initialization, static compilation, embedded systems, static analysis, persistence, feature analysis, dead code elimination |
18 | Doosan Cho, Ilya Issenin, Nikil D. Dutt, Jonghee W. Yoon, Yunheung Paek |
Software controlled memory layout reorganization for irregular array access patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 179-188, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
energy consumption, data layout, scratch pad memory |
18 | Suman Mamidi, Michael J. Schulte, Daniel Iancu, C. John Glossner |
Architecture Support for Reconfigurable Multithreaded Processors in Programmable Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2007, Montréal, Québec, Canada, July 8-11, 2007, pp. 320-327, 2007, IEEE Computer Society, 978-1-4244-1026-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne |
ISEGEN: an iterative improvement-based ISE generation technique for fast customization of processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(7), pp. 754-762, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Aaron Smith, Jon Gibson, Bertrand A. Maher, Nicholas Nethercote, Bill Yoder, Doug Burger, Kathryn S. McKinley, James H. Burrill |
Compiling for EDGE Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Fourth IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2006), 26-29 March 2006, New York, New York, USA, pp. 185-195, 2006, IEEE Computer Society, 0-7695-2499-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | David Sheldon, Rakesh Kumar 0002, Roman L. Lysecky, Frank Vahid, Dean M. Tullsen |
Application-specific customization of parameterized FPGA soft-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 261-268, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Somayeh Sardashti, Hamid Reza Ghasemi, Omid Fatemi |
Muli-Issue Multi-Threaded Stream Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, ICME 2006, July 9-12 2006, Toronto, Ontario, Canada, pp. 2041-2044, 2006, IEEE Computer Society, 1-4244-0367-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne |
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 1246-1251, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Amir Hosein Kamalizad, Nozar Tabrizi, Nader Bagherzadeh, Akira Hatanaka |
A Programmable DSP Architecture for Wireless Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece, pp. 231-238, 2005, IEEE Computer Society, 0-7695-2407-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | David F. Bacon, Perry Cheng, David Grove |
Garbage collection for embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMSOFT ![In: EMSOFT 2004, September 27-29, 2004, Pisa, Italy, Fourth ACM International Conference On Embedded Software, Proceedings, pp. 125-136, 2004, ACM, 1-58113-860-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
mark-and-sweep, tracing, fragmentation, compaction |
18 | Partha Biswas, Vinay Choudhary, Kubilay Atasu, Laura Pozzi, Paolo Ienne, Nikil D. Dutt |
Introduction of local memory elements in instruction set extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 729-734, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
ad-hoc functional units, genetic algorithm, ASIPs, coprocessors, instruction set extensions, customizable processors |
18 | Jaegeun Oh, Seon Wook Kim, Chulwoo Kim |
OpenMP and Compilation Issue in Embedded Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WOMPAT ![In: OpenMP Shared Memory Parallel Programming, International Workshop on OpenMP Applications and Tools, WOMPAT 2003, Toronto, Canada, June 26-27, 2003, Proceedings, pp. 109-121, 2003, Springer, 3-540-40435-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Christoforos E. Kozyrakis, David A. Patterson 0001 |
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 35th Annual International Symposium on Microarchitecture, Istanbul, Turkey, November 18-22, 2002, pp. 283-293, 2002, ACM/IEEE Computer Society, 0-7695-1859-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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18 | Alan Weiss |
Benchmarking, Selection and Debugging of Microcontrollers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 492-498, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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