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Publication years (Num. hits)
1991-2006 (16) 2007-2016 (5)
Publication types (Num. hits)
article(10) inproceedings(11)
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Found 21 publication records. Showing 21 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
76Wei Hong II, Weikai Sun, Zhenhai Zhu, Hao Ji, Ben Song, Wayne Wei-Ming Dai A novel dimension reduction technique for the capacitance extraction of 3D VLSI interconnects. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF 3D VLSI interconnects, DRT, Dimension Reduction Technique, FastCap, SPICELINK, dielectric layers, parallel signal lines, VLSI, capacitance extraction
60Keith Nabors, Jacob K. White 0001 FastCap: a multipole accelerated 3-D capacitance extraction program. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF
60Weiping Shi, Jianguo Liu 0001, Naveen Kakani, Tiejun Yu A fast hierarchical algorithm for three-dimensional capacitanceextraction. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
40Yanpei Liu, Guilherme Cox, Qingyuan Deng, Stark C. Draper, Ricardo Bianchini FastCap: An Efficient and Fair Algorithm for Power Capping in Many-Core Systems. Search on Bibsonomy CoRR The full citation details ... 2016 DBLP  BibTeX  RDF
40Yanpei Liu, Guilherme Cox, Qingyuan Deng, Stark C. Draper, Ricardo Bianchini FastCap: An efficient and fair algorithm for power capping in many-core systems. Search on Bibsonomy ISPASS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
40Shu Yan, Vivek Sarin, Weiping Shi Fast 3-D Capacitance Extraction by Inexact Factorization and Reduction. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
40Shu Yan, Vivek Sarin, Weiping Shi Sparse transformations and preconditioners for 3-D capacitance extraction. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
40Joel R. Phillips, Jacob K. White 0001 A precorrected-FFT method for electrostatic analysis of complicated 3-D structures. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
20Wenwen Chai, Dan Jiao, Cheng-Kok Koh A direct integral-equation solver of linear complexity for large-scale 3D capacitance and impedance extraction. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF full wave, integral-equation-based methods, capacitance extraction, direct solver
20Abinash Roy, Masud H. Chowdhury Analysis of the impacts of signal rise/fall time and skew variations in coupled-RLC interconnects. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
20Nancy Ying Zhou, Zhuo Li 0001, Weiping Shi Fast Capacitance Extraction in Multilayer, Conformal and Embedded Dielectric using Hybrid Boundary Element Method. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
20Aditya Bansal, Bipul Chandra Paul, Kaushik Roy 0001 An Analytical Fringe Capacitance Model for Interconnects Using Conformal Mapping. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
20Michael D. Altman, Jaydeep P. Bardhan, Bruce Tidor, Jacob K. White 0001 FFTSVD: A Fast Multiscale Boundary-Element Method Solver Suitable for Bio-MEMS and Biomolecule Simulation. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
20Hao Gang Wang, Chi Hou Chan, Leung Tsang A new multilevel Green's function interpolation method for large-scale low-frequency EM simulations. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
20Dipanjan Gope, Vikram Jandhyala Oct-tree-based multilevel low-rank decomposition algorithm for rapid 3-D parasitic extraction. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
20Shu Yan, Vivek Sarin, Weiping Shi Sparse transformations and preconditioners for hierarchical 3-D capacitance extraction with multiple dielectrics. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF interconnect, iterative methods, preconditioning, capacitance extraction
20Zhaozhi Yang, Zeyi Wang, Shuzhou Fang A virtual 3-D multipole accelerated extractor for VLSI parasitic interconnect capacitance. Search on Bibsonomy ASP-DAC The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
20Yanhong Yuan, Prithviraj Banerjee A Parallel Implementation of a Fast Multipole Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputer. Search on Bibsonomy IPDPS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF fast multipole algorithm, parallel algorithms, distributed memory multiprocessors, Capacitance extraction
20Weiping Shi, Jianguo Liu 0001, Naveen Kakani, Tiejun Yu A Fast Hierarchical Algorithm for 3-D Capacitance Extraction. Search on Bibsonomy DAC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF reconstruction, emulation, visibility, functional simulation
20E. Aykut Dengi, Ronald A. Rohrer Boundary Element Method Macromodels for 2-D Hierachical Capacitance Extraction. Search on Bibsonomy DAC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF reconstruction, emulation, visibility, functional simulation
20U. Geigenmüller, N. P. van der Meijs Cartesian multipole based numerical integration for 3D capacitance extraction. Search on Bibsonomy ED&TC The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
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