Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
101 | Claudia I. Horta, José A. Lima |
Slicing and non-slicing, unified and rotation independent, algebraic representation of floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 265-, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
floorplan area optimization problem, rectangle envelope, nonoverlapping basic rectangles, floorplan topology, formal algebraic specification, SETS notation, VLSI physical design layout, module dimensions, arbitrarily complex composite floorplans, rotation-invariant single-expression formalism, generalized wheels floorplans, slicing representation, nonslicing representation, unified representation, topology-dimensionless description, floorplanning problem algorithms, algebraic specification, line segments, relative positioning |
91 | Shin-Ichi Nakano |
Enumerating Floorplans with n Rooms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISAAC ![In: Algorithms and Computation, 12th International Symposium, ISAAC 2001, Christchurch, New Zealand, December 19-21, 2001, Proceedings, pp. 107-115, 2001, Springer, 3-540-42985-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Graphs, Enumeration, Listing, Plane graphs |
87 | Parthasarathi Dasgupta, Susmita Sur-Kolay |
Slicible rectangular graphs and their optimal floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 6(4), pp. 447-470, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
graph dualization, nonslicible floorplans, slicible floorplans, heuristic search, planar graphs, Floorplanning |
64 | Yun-Chih Chang, Yao-Wen Chang, Guang-Ming Wu, Shu-Wei Wu |
B*-Trees: a new representation for non-slicing floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 458-463, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
64 | Peichen Pan, C. L. Liu 0001 |
Area minimization for floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(1), pp. 123-132, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
55 | Jia Wang 0003, Hai Zhou 0001 |
Exploring adjacency in floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 367-372, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
55 | Lei Cheng 0001, Liang Deng, Martin D. F. Wong |
Floorplanning for 3-D VLSI design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 405-411, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
55 | Bo Yao, Hongyu Chen, Chung-Kuan Cheng, Ronald L. Graham |
Revisiting floorplan representations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2001 International Symposium on Physical Design, ISPD 2001, Sonoma County, CA, USA, April 1-4, 2001, pp. 138-143, 2001, ACM, 1-58113-347-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
55 | Shmuel Wimer, Israel Koren, Israel Cederbaum |
Optimal aspect ratios of building blocks in VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(2), pp. 139-145, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
55 | Shmuel Wimer, Israel Koren, Israel Cederbaum |
Optimal Aspect Ratios of Building Blocks in VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 25th ACM/IEEE Conference on Design Automation, DAC '88, Anaheim, CA, USA, June 12-15, 1988., pp. 66-72, 1988, ACM. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP BibTeX RDF |
|
51 | Parthasarathi Dasgupta, Susmita Sur-Kolay |
Slicibility of rectangular graphs and floorplan optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 1997 International Symposium on Physical Design, ISPD 1997, Napa Valley, California, USA, April 14-16, 1997, pp. 150-155, 1997, ACM, 0-89791-927-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
graph dualization, nonslicible floorplans, slicible floorplans, very large scale integration, heuristic search, planar graphs, floorplanning |
50 | Zion Cien Shen, Chris C. N. Chu |
Bounds on the number of slicing, mosaic, and general floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(10), pp. 1354-1361, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
50 | Silke Salewski, Erich Barke |
An Upper Bound for 3D Slicing Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 567-572, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
50 | Helvio P. Peixoto, Margarida F. Jacome, Ander Royo |
A Tight Area Upper Bound for Slicing Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 280-, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Early area estimation, slicing floorplan, system level design |
50 | Peichen Pan, Weiping Shi, C. L. Liu 0001 |
Area minimization for hierarchical floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 1994, pp. 436-440, 1994, IEEE Computer Society / ACM, 0-89791-690-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
48 | J. T. Mowchenko, Y. Yang |
Optimizing wiring space in slicing floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), March 16-18, 1995, The State University of New York at Buffalo, USA, pp. 54-, 1995, IEEE Computer Society, 0-8186-7035-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
wiring space optimisation, slicing floorplans, net density, sibling rectangles, circuit modules, routed layouts, VLSI, heuristic, network routing, circuit layout CAD, circuit optimisation, integrated circuit layout, branch and bound algorithm, wiring, IC layout |
42 | Song Chen 0001, Takeshi Yoshimura |
On the Number of 3-D IC Floorplan Configurations and a Solution Perturbation Method with Good Convergence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1867-1870, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang 0003, Hsin-Hsien Ho |
Modem floorplanning with abutment and fixed-outline constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 6214-6217, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
42 | Bo Yao, Hongyu Chen, Chung-Kuan Cheng, Ronald L. Graham |
Floorplan representations: Complexity and connections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 8(1), pp. 55-80, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Baxter permutation, Floorplan representation, O-tree, mosaic floorplan, number of combinations, twin binary trees |
42 | D. F. Wong 0001, P. S. Sakhamuri |
Efficient Floorplan Area Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 26th ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA, June 25-29, 1989., pp. 586-589, 1989, ACM Press. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
40 | P. S. Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya |
VLSI floorplan generation and area optimization using AND-OR graph search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 370-375, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
VLSI floorplan generation, AND-OR graph search, rectangular dualization, minimum-area floorplan, optimal sizing, heuristic search method, top-down first phase, search effort, bottom-up polynomial-time algorithm, nonslicible floorplans, VLSI, graph theory, circuit layout CAD, circuit optimisation, integrated circuit interconnections, aspect ratios, area optimization, adjacency graph |
36 | Jai-Ming Lin, Yao-Wen Chang |
TCG: A transitive closure graph-based representation for general floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(2), pp. 288-292, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Jai-Ming Lin, Yao-Wen Chang |
TCG-S: orthogonal coupling of P*-admissible representations for general floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(6), pp. 968-980, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
36 | Jai-Ming Lin, Yao-Wen Chang |
TCG-S: orthogonal coupling of P*-admissible representations for general floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 842-847, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
36 | Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya |
Partitioning VLSI Floorplans by Staircase Channels for Global Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 59-64, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
maxflow-mincut, algorithms, complexity, partitioning, NP-completeness, Global routing |
36 | Weiping Shi |
A fast algorithm for area minimization of slicing floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(12), pp. 1525-1532, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
36 | Weiping Shi |
An optimal algorithm for area minimization of slicing floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1995, San Jose, California, USA, November 5-9, 1995, pp. 480-484, 1995, IEEE Computer Society / ACM, 0-8186-7213-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
floorplan, area optimization, area minimization |
36 | Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya |
A unified approach to topology generation and area optimization of general floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1995, San Jose, California, USA, November 5-9, 1995, pp. 712-715, 1995, IEEE Computer Society / ACM, 0-8186-7213-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
VLSI floorplanning, AND-OR graphs, placement, heuristic search |
28 | Chaomin Luo, Miguel F. Anjos, Anthony Vannelli |
Large-scale fixed-outline floorplanning design using convex optimization techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 198-203, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Pradeep Fernando, Srinivas Katkoori |
An Elitist Non-Dominated Sorting Based Genetic Algorithm for Simultaneous Area and Wirelength Minimization in VLSI Floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 337-342, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Love Singhal, Elaheh Bozorgzadeh |
Novel Multi-Layer floorplanning for Heterogeneous FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 613-616, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Chang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yiwen Wang 0003, Ching-Hwa Cheng |
Noise-Aware Floorplanning for Fast Power Supply Network Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 2028-2031, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Kristofer Vorwerk, Andrew A. Kennings, Doris T. Chen, Laleh Behjat |
Floorplan repair using dynamic whitespace management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 552-557, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
VLSI, placement, floorplanning, legalization |
28 | Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir |
STEFAL: A System Level Temperature- and Floorplan-Aware Leakage Power Estimator for SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 559-564, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Cara Winterbottom, Edwin H. Blake, James E. Gain |
Using Visualizations to Support Design and Debugging in Virtual Reality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVC (1) ![In: Advances in Visual Computing, Second International Symposium, ISVC 2006, Lake Tahoe, NV, USA, November 6-8, 2006 Proceedings, Part I, pp. 465-474, 2006, Springer, 3-540-48628-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Love Singhal, Elaheh Bozorgzadeh |
Multi-layer Floorplanning on a Sequence of Reconfigurable Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-8, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir |
Floorplan driven leakage power aware IP-based SoC design space exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 118-123, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
floorplan, leakage power, temperature |
28 | Rong Liu, Sheqin Dong, Xianlong Hong |
Fixed-outline floorplanning based on common subsequence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 156-159, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
common subsequence, floorplanning, fixed-outline |
28 | Jason Cong, Gabriele Nataneli, Michail Romesis, Joseph R. Shinnerl |
An area-optimality study of floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004, pp. 78-83, 2004, ACM, 1-58113-817-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
area partitioning, block packing, optimality, benchmarking, placement, floorplanning, aspect ratios |
28 | Martin D. F. Wong |
Reticle Floorplanning with Guaranteed Yield for Multi-Project Wafers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings, pp. 106-110, 2004, IEEE Computer Society, 0-7695-2231-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Hayward H. Chan, Igor L. Markov |
Practical slicing and non-slicing block-packing without simulated annealing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 282-287, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
block-packing, optimal, evaluation, branch-and-bound, floorplanning, slicing, hierarchical, large-scale, soft blocks |
28 | Yan Feng, Dinesh P. Mehta |
Constrained Floorplanning with Whitespace. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 969-974, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Shuo Zhou, Sheqin Dong, Chung-Kuan Cheng, Jun Gu |
ECBL: an extended corner block list with solution space including optimum placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2001 International Symposium on Physical Design, ISPD 2001, Sonoma County, CA, USA, April 1-4, 2001, pp. 150-155, 2001, ACM, 1-58113-347-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
28 | Sylvie Fontaine |
Spatial Cognition and the Processing of Verticality in Underground Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COSIT ![In: Spatial Information Theory: Foundations of Geographic Information Science, International Conference, COSIT 2001, Morro Bay, CA, USA, September 19-23, 2001, Proceedings, pp. 387-399, 2001, Springer, 3-540-42613-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
underground and urban environments, spatial cognition, verticality, navigational aids |
28 | Christine L. Valenzuela, Pearl Y. Wang |
A Genetic Algorithm for VLSI Floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPSN ![In: Parallel Problem Solving from Nature - PPSN VI, 6th International Conference, Paris, France, September 18-20, 2000, Proceedings, pp. 671-680, 2000, Springer, 3-540-41056-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
28 | Takayuki Yamanouchi, Kazuo Tamakashi, Takashi Kambe |
Hybrid floorplanning based on partial clustering and module restructuring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 478-483, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
slicing structure, clustering, placement, floorplanning |
26 | Steven A. Shafer |
A Framework for Creating and Using Maps of Privately Owned Spaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LoCA ![In: Location and Context Awareness, 4th International Symposium, LoCA 2009, Tokyo, Japan, May 7-8, 2009, Proceedings, pp. 174-191, 2009, Springer, 978-3-642-01720-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Indoor maps, Location-Awareness, Floorplans, Indoor location |
22 | Katsuhisa Yamanaka, Shin-Ichi Nakano |
Enumerating floorplans with walls. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Appl. Math. ![In: Discret. Appl. Math. 342, pp. 1-11, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
22 | Vahid Azizi 0003, Muhammad Usman 0010, Samuel S. Sohn, Mathew Schwartz, Seonghyeon Moon, Petros Faloutsos, Mubbasir Kapadia |
The role of latent representations for design space exploration of floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Simul. ![In: Simul. 99(11), pp. 1167-1179, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
22 | Luyu Jiang, Dantong Ouyang, Huisi Zhou, Naiyu Tian, Liming Zhang 0005 |
DPAHMA: a novel dual-population adaptive hybrid memetic algorithm for non-slicing VLSI floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 79(14), pp. 15496-15534, September 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
22 | Patrick Berggold, Stavros Nousias, Rohit Kumar Dubey, André Borrmann |
Towards predicting Pedestrian Evacuation Time and Density from Floorplans using a Vision Transformer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2306.15318, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
22 | Krishnendra Shekhawat, Rohit Lohani, Chirag Dasannacharya, Sumit Bisht, Sujay Rastogi |
Automated generation of floorplans with non-rectangular rooms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graph. Model. ![In: Graph. Model. 127, pp. 101175, May 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
22 | Tianxing Jin, Jiayan Zhuang, Jiangjian Xiao, Ningyuan Xu, Shihao Qin |
Reconstructing Floorplans from Point Clouds Using GAN. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Imaging ![In: J. Imaging 9(2), pp. 39, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
22 | Yu Yin, Will Hutchcroft, Naji Khosravan, Ivaylo Boyadzhiev, Yun Fu 0001, Sing Bing Kang |
Generating Topological Structure of Floorplans from Room Attributes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2204.12338, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Wai Cheong Tam, Eugene Yujun Fu, Jiajia Li, Xinyan Huang, Jian Chen, Michael Xuelin Huang |
A spatial temporal graph neural network model for predicting flashover in arbitrary building floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eng. Appl. Artif. Intell. ![In: Eng. Appl. Artif. Intell. 115, pp. 105258, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Vahid Azizi 0003, Muhammad Usman 0010, Honglu Zhou, Petros Faloutsos, Mubbasir Kapadia |
Graph-based generative representation learning of semantically and behaviorally augmented floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Vis. Comput. ![In: Vis. Comput. 38(8), pp. 2785-2800, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Jiahui Sun, Wenming Wu, Ligang Liu, Wenjie Min, Gaofeng Zhang, Liping Zheng |
WallPlan: synthesizing floorplans by learning to generate wall graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Graph. ![In: ACM Trans. Graph. 41(4), pp. 92:1-92:14, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Jiyan Jonas Schneider, Takahiro Hoshino |
Incremental Informational Value of Floorplans for Rent Price Prediction - Applications of Modern Computer Vision Techniques in Real-Estate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JSAI-isAI Workshops ![In: New Frontiers in Artificial Intelligence - JSAI-isAI 2022 Workshop, JURISIN 2022, and JSAI 2022 International Session, Kyoto, Japan, June 12-17, 2022, Revised Selected Papers, pp. 229-250, 2022, Springer, 978-3-031-29167-8. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Yu Yin, Will Hutchcroft, Naji Khosravan, Ivaylo Boyadzhiev, Yun Fu 0001, Sing Bing Kang |
Generating Topological Structure of Floorplans from Room Attributes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMR ![In: ICMR '22: International Conference on Multimedia Retrieval, Newark, NJ, USA, June 27 - 30, 2022, pp. 295-303, 2022, ACM, 978-1-4503-9238-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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22 | Deke Guo, Xiaoqiang Teng, Yulan Guo, Xiaolei Zhou 0001, Zhong Liu |
SiFi: Self-Updating of Indoor Semantic Floorplans for Annotated Objects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Internet Things ![In: ACM Trans. Internet Things 2(3), pp. 17:1-17:21, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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22 | Madhawa Vidanapathirana, Qirui Wu, Yasutaka Furukawa, Angel X. Chang, Manolis Savva |
Plan2Scene: Converting Floorplans to 3D Scenes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2106.05375, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
22 | Krishnendra Shekhawat, Rahil N. Jain, Sumit Bisht, Aishwarya Kondaveeti, Dipam Goswami |
Graph-based approach for enumerating floorplans based on users specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Artif. Intell. Eng. Des. Anal. Manuf. ![In: Artif. Intell. Eng. Des. Anal. Manuf. 35(4), pp. 438-459, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
22 | Madhawa Vidanapathirana, Qirui Wu, Yasutaka Furukawa, Angel X. Chang, Manolis Savva |
Plan2Scene: Converting Floorplans to 3D Scenes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CVPR ![In: IEEE Conference on Computer Vision and Pattern Recognition, CVPR 2021, virtual, June 19-25, 2021, pp. 10733-10742, 2021, Computer Vision Foundation / IEEE. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
22 | M. Shunmugathammal, C. Christopher Columbus, S. Anand |
A Novel B*tree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Circuits Syst. Signal Process. ![In: Circuits Syst. Signal Process. 39(2), pp. 900-918, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
22 | Krishnendra Shekhawat, Nitant Upasani, Sumit Bisht, Rahil N. Jain |
GPLAN: Computer-Generated Dimensioned Floorplans for given Adjacencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2008.01803, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
22 | Vahid Azizi 0003, Muhammad Usman 0010, Honglu Zhou, Petros Faloutsos, Mubbasir Kapadia |
Graph-Based Generative Representation Learning of Semantically and Behaviorally Augmented Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2012.04735, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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22 | Oscar Mendez Maldonado, Simon Hadfield, Nicolas Pugeault, Richard Bowden |
SeDAR: Reading Floorplans Like a Human - Using Deep Learning to Enable Human-Inspired Localisation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Comput. Vis. ![In: Int. J. Comput. Vis. 128(5), pp. 1286-1310, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
22 | Katsuhisa Yamanaka, Shin-Ichi Nakano |
Floorplans with Walls. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TAMC ![In: Theory and Applications of Models of Computation, 16th International Conference, TAMC 2020, Changsha, China, October 18-20, 2020, Proceedings., pp. 50-59, 2020, Springer, 978-3-030-59266-0. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
22 | Moustafa Elhamshary, Moustafa Alzantot, Moustafa Youssef 0001 |
JustWalk: A Crowdsourcing Approach for the Automatic Construction of Indoor Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Mob. Comput. ![In: IEEE Trans. Mob. Comput. 18(10), pp. 2358-2371, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
22 | Nitant Upasani, Krishnendra Shekhawat, Garv Sachdeva |
Automated Generation of Dimensioned Rectangular Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1910.00081, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
22 | Jiacheng Chen, Chen Liu 0012, Jiaye Wu, Yasutaka Furukawa |
Floor-SP: Inverse CAD for Floorplans by Sequential Room-wise Shortest Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1908.06702, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
22 | Jiacheng Chen, Chen Liu 0012, Jiaye Wu, Yasutaka Furukawa |
Floor-SP: Inverse CAD for Floorplans by Sequential Room-Wise Shortest Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCV ![In: 2019 IEEE/CVF International Conference on Computer Vision, ICCV 2019, Seoul, Korea (South), October 27 - November 2, 2019, pp. 2661-2670, 2019, IEEE, 978-1-7281-4803-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
22 | Wojciech Jaworski, Pawel Wilk, Mateusz Juszczak, Monika Wysoczanska, Andrew YongGwon Lee |
Towards automatic configuration of floorplans for Indoor Positioning System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPIN ![In: 2019 International Conference on Indoor Positioning and Indoor Navigation, IPIN 2019, Pisa, Italy, September 30 - October 3, 2019, pp. 1-7, 2019, IEEE, 978-1-7281-1788-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
22 | Chao Gao, Robert Harle |
Semi-Automated Signal Surveying Using Smartphones and Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Mob. Comput. ![In: IEEE Trans. Mob. Comput. 17(8), pp. 1952-1965, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
22 | Xiaoqiang Teng, Deke Guo, Yulan Guo, Xiang Zhao 0002, Zhong Liu |
SISE: Self-Updating of Indoor Semantic Floorplans for General Entities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Mob. Comput. ![In: IEEE Trans. Mob. Comput. 17(11), pp. 2646-2659, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
22 | Katsuhisa Yamanaka, Md. Saidur Rahman 0001, Shin-Ichi Nakano |
Enumerating Floorplans with Columns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(9), pp. 1392-1397, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
22 | Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal |
Early Routability Assessment in VLSI Floorplans: A Generalized Routing Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1810.12789, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
22 | Grazyna Slusarczyk |
Graph-based representation of design properties in creating building floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Aided Des. ![In: Comput. Aided Des. 95, pp. 24-39, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
22 | Seongyong Kim, Seula Park, Kiyun Yu |
Application of Style Transfer in the Vectorization Process of Floorplans (Short Paper). ![Search on Bibsonomy](Pics/bibsonomy.png) |
GIScience ![In: 10th International Conference on Geographic Information Science, GIScience 2018, August 28-31, 2018, Melbourne, Australia, pp. 39:1-39:6, 2018, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-083-5. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
22 | Chao Gao, Robert Harle |
Semi-automated Signal Surveying Using Smartphones and Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1711.06503, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
22 | Katsuhisa Yamanaka, Md. Saidur Rahman 0001, Shin-Ichi Nakano |
Floorplans with Columns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COCOA (1) ![In: Combinatorial Optimization and Applications - 11th International Conference, COCOA 2017, Shanghai, China, December 16-18, 2017, Proceedings, Part I, pp. 33-40, 2017, Springer, 978-3-319-71149-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
22 | Katsuhisa Yamanaka, Shin-Ichi Nakano |
Uniformly Random Generation of Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 99-D(3), pp. 624-629, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
22 | Divya Sharma, Chiranjoy Chattopadhyay, Gaurav Harit |
A unified framework for semantic matching of architectural floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPR ![In: 23rd International Conference on Pattern Recognition, ICPR 2016, Cancún, Mexico, December 4-8, 2016, pp. 2422-2427, 2016, IEEE, 978-1-5090-4847-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
22 | Jai-Ming Lin, Po-Yang Chiu, Yen-Fu Chang |
SAINT: handling module folding and alignment in fixed-outline floorplans for 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 35th International Conference on Computer-Aided Design, ICCAD 2016, Austin, TX, USA, November 7-10, 2016, pp. 131, 2016, ACM, 978-1-4503-4466-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
22 | Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernández 0001 |
On the convex formulation of area for slicing floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 50, pp. 74-80, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
22 | Katsuhisa Yamanaka, Shin-Ichi Nakano |
Another Optimal Binary Representation of Mosaic Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(6), pp. 1223-1224, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
22 | Yi-Jun Chang, Hsu-Chun Yen |
Constrained floorplans in 2D and 3D. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 607, pp. 320-336, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
22 | Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal |
A New Method for Defining Monotone Staircases in VLSI Floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2015 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015, Montpellier, France, July 8-10, 2015, pp. 107-112, 2015, IEEE Computer Society, 978-1-4799-8719-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
22 | Moustafa Elhamshary, Moustafa Youssef 0001 |
SemSense: Automatic construction of semantic indoor floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPIN ![In: 2015 International Conference on Indoor Positioning and Indoor Navigation, IPIN 2015, Banff, AB, Canada, October 13-16, 2015, pp. 1-11, 2015, IEEE, 978-1-4673-8402-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
22 | Stefan Felsner |
Exploiting Air-Pressure to Map Floorplans on Point Sets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Graph Algorithms Appl. ![In: J. Graph Algorithms Appl. 18(2), pp. 233-252, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Bryan Dawei He |
A simple optimal binary representation of mosaic floorplans and Baxter permutations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 532, pp. 40-50, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Hongxia Zhou, Chiu-Wing Sham, Hailong Yao |
Slicing Floorplans with Handling Symmetry and General Placement Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014, pp. 112-117, 2014, IEEE Computer Society, 978-1-4799-3763-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Javier de San Pedro, Jordi Cortadella, Antoni Roca 0001 |
A hierarchical approach for generating regular floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014, San Jose, CA, USA, November 3-6, 2014, pp. 655-662, 2014, IEEE, 978-1-4799-6277-8. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Andrei Asinowski, Gill Barequet, Mireille Bousquet-Mélou, Toufik Mansour, Ron Y. Pinter |
Orders Induced by Segments in Floorplans and (2 - 14 - 3, 3 - 41 - 2)-Avoiding Permutations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Electron. J. Comb. ![In: Electron. J. Comb. 20(2), pp. 35, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernández 0001 |
Area optimization on fixed analog floorplans using convex area functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013, pp. 1843-1848, 2013, EDA Consortium San Jose, CA, USA / ACM DL, 978-1-4503-2153-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Stefan Felsner |
Exploiting Air-Pressure to Map Floorplans on Point Sets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GD ![In: Graph Drawing - 21st International Symposium, GD 2013, Bordeaux, France, September 23-25, 2013, Revised Selected Papers, pp. 196-207, 2013, Springer, 978-3-319-03840-7. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Moustafa Alzantot, Moustafa Youssef 0001 |
CrowdInside: Automatic Construction of Indoor Floorplans ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1209.3794, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
22 | Gregory G. Faust, Runjie Zhang, Kevin Skadron, Mircea R. Stan, Brett H. Meyer |
ArchFP: Rapid prototyping of pre-RTL floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, pp. 183-188, 2012, IEEE, 978-1-4673-2657-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
22 | Moustafa Alzantot, Moustafa Youssef 0001 |
CrowdInside: automatic construction of indoor floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGSPATIAL/GIS ![In: SIGSPATIAL 2012 International Conference on Advances in Geographic Information Systems (formerly known as GIS), SIGSPATIAL'12, Redondo Beach, CA, USA, November 7-9, 2012, pp. 99-108, 2012, ACM, 978-1-4503-1691-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
22 | Bryan D. He |
Optimal Binary Representation of Mosaic Floorplans and Baxter Permutations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FAW-AAIM ![In: Frontiers in Algorithmics and Algorithmic Aspects in Information and Management - Joint International Conference, FAW-AAIM 2012, Beijing, China, May 14-16, 2012. Proceedings, pp. 1-12, 2012, Springer, 978-3-642-29699-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|