|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 4 occurrences of 4 keywords
|
|
|
Results
Found 4 publication records. Showing 4 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
66 | Wei Li, Dilip K. Banerji |
Routability Prediction for Hierarchical FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 256-259, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
42 | Alexander Barkalov 0001, Larysa Titarenko, Jacek Bieganowski |
Designing HFPGA-based FSMs with counters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: 24th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2017, Bydgoszcz, Poland, June 22-24, 2017, pp. 254-257, 2017, IEEE, 978-83-63578-12-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
42 | Kamil Mielcarek, Alexander Barkalov 0001, Larysa Titarenko |
Designing HFPGA-based Mealy FSMs with transformation of output functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: 24th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2017, Bydgoszcz, Poland, June 22-24, 2017, pp. 250-253, 2017, IEEE, 978-83-63578-12-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
36 | Michael Shyu, Yu-Dong Chang, Guang-Ming Wu, Yao-Wen Chang |
Generic Universal Switch Blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 311-314, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
HFPGA, logic block, switch block, programmable switch, universal switch block, dimension constraint, FPGA, routing, flexibility, routability |
Displaying result #1 - #4 of 4 (100 per page; Change: )
|
|