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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 27 occurrences of 21 keywords
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Results
Found 34 publication records. Showing 34 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
145 | Huandong Wang, Dan Tang, Xiang Gao, Yunji Chen |
An Enhanced HyperTransport Controller with Cache Coherence Support for Multiple-CMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NAS ![In: International Conference on Networking, Architecture, and Storage, NAS 2009, 9-11 July 2009, Zhang Jia Jie, Hunan, China, pp. 215-218, 2009, IEEE Computer Society, 978-0-7695-3741-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
137 | David Slogsnat, Alexander Giese, Mondrian Nüssle, Ulrich Brüning 0001 |
An open-source HyperTransport core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 1(3), pp. 14:1-14:21, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
HTX, HyperTransport, FPGA, prototyping, RTL |
118 | David Slogsnat, Alexander Giese, Ulrich Brüning 0001 |
A versatile, low latency HyperTransport core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007, pp. 45-52, 2007, ACM, 978-1-59593-600-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
HTX, HyperTransport, FPGA, prototyping, RTL |
88 | Heiner Litz, Holger Fröning, Ulrich Brüning 0001 |
A HyperTransport 3 Physical Layer Interface for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings, pp. 4-14, 2009, Springer, 978-3-642-00640-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
50 | Xiaojun Yang, Fei Chen, Hailiang Cheng, Ninghui Sun |
A HyperTransport-based personal parallel computer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: Proceedings of the 2008 IEEE International Conference on Cluster Computing, 29 September - 1 October 2008, Tsukuba, Japan, pp. 126-132, 2008, IEEE Computer Society, 978-1-4244-2640-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
50 | Fei Chen, Hailiang Cheng, Xiaojun Yang, Rui Liu |
Design and implementation of an effective HyperTransport core in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: Proceedings of the 2008 IEEE International Conference on Cluster Computing, 29 September - 1 October 2008, Tsukuba, Japan, pp. 437-443, 2008, IEEE Computer Society, 978-1-4244-2640-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
50 | David C. Keezer, Dany Minier, Patrice Ducharme |
Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 23(1), pp. 46-57, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
control structure reliability, multi-gigahertz testing, picosecond timing accuracy, jitter-tolerance testing, jitter injection, fault tolerance, testing |
50 | Ami Castonguay, Yvon Savaria |
Architecture of a hypertransport tunnel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
50 | Ami Castonguay, Yvon Savaria |
A HyperTransport Chip-to-Chip Interconnect Tunnel Developed Using SystemC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 8-10 June 2005, Montreal, Canada, pp. 264-266, 2005, IEEE Computer Society, 0-7695-2361-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
38 | Huandong Wang, Xiang Gao, Yunji Chen, Dan Tang, Weiwu Hu |
A multi-FPGA based platform for emulating a 100m-transistor-scale processor with high-speed peripherals (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 283, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
loongson, multi-fpga, fpga, evaluation, verification, emulation |
38 | Qiong Li, Guangming Liu, Yufeng Guo, Hengzhu Liu |
A New High-Performance Distributed Shared I/O System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPT ![In: Advanced Parallel Programming Technologies, 5th International Workshop, APPT 2003, Xiamen, China, September 17-19, 2003, Proceedings, pp. 41-49, 2003, Springer, 3-540-20054-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Alvin Leng Sun Loke, Bruce Andrew Doyle, Sanjeev K. Maheshwari, Dennis Michael Fischette, Charles Lin Wang, Tin Tin Wee, Emerson S. Fang |
An 8.0-Gb/s HyperTransport Transceiver for 32-nm SOI-CMOS Server Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 47(11), pp. 2627-2642, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
31 | Federico Silla |
HyperTransport. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Encyclopedia of Parallel Computing ![In: Encyclopedia of Parallel Computing, pp. 882-889, 2011, Springer, 978-0-387-09765-7. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
31 | Bruce Andrew Doyle, Alvin Leng Sun Loke, Sanjeev K. Maheshwari, Charles Lin Wang, Dennis Michael Fischette, Jeffrey G. Cooper, Sanjeev K. Aggarwal, Tin Tin Wee, Chad O. Lackey, Harishkumar S. Kedarnath, Michael M. Oshima, Gerry R. Talbot, Emerson S. Fang |
Extending HyperTransport™ technology to 8.0 Gb/s in 32-nm SOI-CMOS processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-SSCC ![In: IEEE Asian Solid-State Circuits Conference, A-SSCC 2011, Jeju, South Korea, November 14-16, 2011, pp. 133-136, 2011, IEEE, 978-1-4577-1784-0. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
31 | José Duato |
HyperTransport™ technology tutorial. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Chips Symposium ![In: 2009 IEEE Hot Chips 21 Symposium (HCS), Stanford, CA, USA, August 23-25, 2009, pp. 1-53, 2009, IEEE, 978-1-4673-8873-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Heiner Litz, Holger Fröning, Maximilian Thürmer, Ulrich Brüning 0001 |
An FPGA based verification platform for HyperTransport 3.x. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 19th International Conference on Field Programmable Logic and Applications, FPL 2009, August 31 - September 2, 2009, Prague, Czech Republic, pp. 631-634, 2009, IEEE, 978-1-4244-3892-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Joseph Antony, Pete P. Janes, Alistair P. Rendell |
Exploring Thread and Memory Placement on NUMA Architectures: Solaris and Linux, UltraSPARC/FirePlane and Opteron/HyperTransport. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, Proceedings, pp. 338-352, 2006, Springer, 3-540-68039-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Christian Sauer 0001, Matthias Gries, José Ignacio Gómez, Scott J. Weber, Kurt Keutzer |
Developing a Flexible Interface for RapidIO, Hypertransport, and PCI-Express. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 129-134, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Heiner Litz, Maximilian Thürmer, Ulrich Brüning 0001 |
TCCluster: A Cluster Architecture Utilizing the Processor Host Interface as a Network Interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: Proceedings of the 2010 IEEE International Conference on Cluster Computing, Heraklion, Crete, Greece, 20-24 September, 2010, pp. 9-18, 2010, IEEE Computer Society, 978-1-4244-8373-0. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
HyperTransport, AMD, Opteron, interconnect, HPC, Low latency, high bandwidth |
29 | Mondrian Nüssle, Benjamin Geib, Holger Fröning, Ulrich Brüning 0001 |
An FPGA-Based Custom High Performance Interconnection Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 113-118, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
hypertransport, network, interconnect, switching, crossbar |
19 | Rainer Buchty, Mario Kicherer, David Kramer, Wolfgang Karl |
An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings, pp. 227-236, 2009, Springer, 978-3-642-03137-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Kai Wang, Xiaomin Li, Xuejun An, Ninghui Sun |
Gemini NI: An Integration of Two Network Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NAS ![In: International Conference on Networking, Architecture, and Storage, NAS 2009, 9-11 July 2009, Zhang Jia Jie, Hunan, China, pp. 439-446, 2009, IEEE Computer Society, 978-0-7695-3741-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Panyong Zhang, Can Ma, Jie Ma, Qiang Li, Dan Meng |
HPPNET: A novel network for HPC and its implication for communication software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Kangtao Kendall Chuang, Sudhakar Yalamanchili, Ada Gavrilovska, Karsten Schwan |
ShareStreams-V: A Virtualized QoS Packet Scheduling Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2008, 14-15 April 2008, Stanford, Palo Alto, California, USA, pp. 265-268, 2008, IEEE Computer Society, 978-0-7695-3307-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Jason Cong |
A new generation of C-base synthesis tool and domain-specific computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings, pp. 386, 2008, IEEE, 978-1-4244-2596-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Heiner Litz, Holger Fröning, Mondrian Nüssle, Ulrich Brüning 0001 |
VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2008 International Conference on Parallel Processing, ICPP 2008, September 8-12, 2008, Portland, Oregon, USA, pp. 238-245, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Pat Conway, Bill Hughes |
The AMD Opteron Northbridge Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 27(2), pp. 10-21, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
system topology, northbridge, scalability, microarchitecture, point-to-point networking |
19 | Nathan Woods |
Integrating FPGAs in high-performance computing: the architecture and implementation perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007, pp. 132, 2007, ACM, 978-1-59593-600-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
compute acceleration, high-performance computinghigh-performance computing, reconfigurable computing, co-processor |
19 | Fong Pong, Nian-Feng Tzeng, Koray Öner, Chun Ning, Kwong-Tak Chui, Manoj Ekbote, Yanping Lu |
Communication performance of a modular high-bandwidth multiprocessor system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-8, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Rajesh Kota, Rich Oehler |
Horus: Large-Scale Symmetric Multiprocessing for Opteron Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 25(2), pp. 30-40, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Computer System Implementation Multiprocessor Systems |
19 | Baosheng Wang, Andy Kuo, Touraj Farahmand, André Ivanov, Yong B. Cho, Sassan Tabatabaei |
A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 21(6), pp. 621-630, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
timing specifications testing, test environment, tester OTA and yield, high-speed interconnect testing, yield analysis |
19 | Lloyd Dickman, Greg Lindahl, Dave Olson, Jeff Rubin, Jeff Broughton |
PathScale InfiniPath: A First Look. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Interconnects ![In: 13th Annual IEEE Symposium on High Performance Interconnects (HOTIC 2005), 17-19 August 2005, Stanford, CA, USA, pp. 163-165, 2005, IEEE Computer Society, 0-7695-2449-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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19 | Chetana N. Keltcher, Kevin J. McGrath, Ardsher Ahmed, Pat Conway |
The AMD Opteron Processor for Multiprocessor Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 23(2), pp. 66-76, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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19 | Baosheng Wang, Yong B. Cho, Sassan Tabatabaei, André Ivanov |
Yield, Overall Test Environment Timing Accuracy, and Defect Level Trade-Offs for High-Speed Interconnect Device Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, pp. 348-353, 2003, IEEE Computer Society, 0-7695-1951-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Timing specifications testing, Test Environment, Tester OTA and yield, High-speed interconnect testing, Yield analysis |
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