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Publication types (Num. hits)
article(268) book(1) incollection(3) inproceedings(2314) phdthesis(13) proceedings(40)
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Found 2639 publication records. Showing 2639 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
120Wangyuan Zhang, Xin Fu, Tao Li 0006, José A. B. Fortes An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures. Search on Bibsonomy ISPASS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF thread-aware reliability optimization, microarchitecture vulnerability, simultaneous multithreaded architecture, semiconductor transient fault, microprocessor reliability, processor throughput, soft error vulnerability analysis, SPEC CPU 2000 benchmark, microarchitecture structure, microarchitecture reliability profile, fetch policy, thread-level parallelism, multithreading architecture
114John Kim Low-cost router microarchitecture for on-chip networks. Search on Bibsonomy MICRO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF router microarchitecture, complexity, on-chip network
91Kenneth Hoste, Lieven Eeckhout Comparing Benchmarks Using Key Microarchitecture-Independent Characteristics. Search on Bibsonomy IISWC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
82Changbo Long, Lucanus J. Simonson, Weiping Liao, Lei He 0001 Microarchitecture Configurations and Floorplanning Co-Optimization. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
73Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu, Siva Kumar Sastry Hari, Sarita V. Adve Accurate microarchitecture-level fault modeling for studying hardware faults. Search on Bibsonomy HPCA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
72Victor V. Zyuban, Peter M. Kogge Inherently Lower-Power High-Performance Superscalar Architectures. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2001 DBLP  DOI  BibTeX  RDF Low power microarchitecture, multicluster architecture, energy-efficient configurations, energy models
71Chang-Burm Cho, Wangyuan Zhang, Tao Li 0006 Informed Microarchitecture Design Space Exploration Using Workload Dynamics. Search on Bibsonomy MICRO The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
70Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen A Buffer-Oriented Methodology for Microarchitecture Validation. Search on Bibsonomy J. Electron. Test. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF processor validation, superscalar microarchitecture, design validation
63Wen-mei W. Hwu, Yale N. Patt Exploiting horizontal and vertical concurrency via the HPSm microprocessor. Search on Bibsonomy MICRO The full citation details ... 1987 DBLP  DOI  BibTeX  RDF
60Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, James C. Hoe Statistical sampling of microarchitecture simulation. Search on Bibsonomy ACM Trans. Model. Comput. Simul. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Microarchitecture simulation, SPEC CPU2000 simulation, cold-start bias, simulation sampling, statistical sampling
60Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose Application-specific customization of soft processor microarchitecture. Search on Bibsonomy FPGA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Nios, RTL generation, SPREE, FPGA, customization, embedded processor, ASIP, microarchitecture, application specific, soft processor
60Stamatis Vassiliadis, Leonel Sousa, Georgi Gaydadjiev The Midlifekicker Microarchitecture Evaluation Metric. Search on Bibsonomy ASAP The full citation details ... 2005 DBLP  DOI  BibTeX  RDF pipeline, microarchitecture, ILP
59Balakrishnan Iyer, Ramesh Karri, Israel Koren Phantom redundancy: a high-level synthesis approach for manufacturability. Search on Bibsonomy ICCAD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF fabrication-time reconfigurability, functional unit failure, microarchitecture synthesis, phantom redundancy, genetic algorithm, high level synthesis, high-level synthesis, redundancy, logic design, reconfigurable architectures, manufacturability, microarchitecture, circuit CAD
54Gabriel H. Loh, Samantika Subramaniam, Yuejian Xie Zesto: A cycle-level simulator for highly detailed microarchitecture exploration. Search on Bibsonomy ISPASS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
54Kapil Vaswani, Matthew J. Thazhuthaveetil, Y. N. Srikant, P. J. Joseph Microarchitecture Sensitive Empirical Models for Compiler Optimizations. Search on Bibsonomy CGO The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
54Xin Fu, James Poe, Tao Li, José A. B. Fortes Characterizing Microarchitecture Soft Error Vulnerability Phase Behavior. Search on Bibsonomy MASCOTS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
54Diana Marculescu, Emil Talpes Variability and energy awareness: a microarchitecture-level perspective. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF GALS design, power consumption, variability
54Roland E. Wunderlich, James C. Hoe In-system FPGA prototyping of an itanium microarchitecture. Search on Bibsonomy FPGA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
54Roland E. Wunderlich, James C. Hoe In-System FPGA Prototyping of an Itanium Microarchitecture. Search on Bibsonomy ICCD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
54Jared C. Smolens, Jangwoo Kim, James C. Hoe, Babak Falsafi Efficient Resource Sharing in Concurrent Error Detecting Superscalar Microarchitectures. Search on Bibsonomy MICRO The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
54David Morano, Alireza Khalafi, David R. Kaeli, Augustus K. Uht Realizing high IPC through a scalable memory-latency tolerant multipath microarchitecture. Search on Bibsonomy SIGARCH Comput. Archit. News The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
54Ho-Seop Kim, James E. Smith 0001 An Instruction Set and Microarchitecture for Instruction Level Distributed Processing. Search on Bibsonomy ISCA The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
54Eric Rotenberg Using variable-MHz microprocessors to efficiently handle uncertainty in real-time systems. Search on Bibsonomy MICRO The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
54Trung A. Diep, Christopher Nelson, John Paul Shen Performance Evaluation of the PowerPC 620 Microarchitecture. Search on Bibsonomy ISCA The full citation details ... 1995 DBLP  DOI  BibTeX  RDF PowerPC
52Xin Fu, Tao Li 0006, José A. B. Fortes NBTI tolerant microarchitecture design in the presence of process variation. Search on Bibsonomy MICRO The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
52Wangyuan Zhang, Tao Li 0006 Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology. Search on Bibsonomy MICRO The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
52Tzvetan S. Metodi, Darshan D. Thaker, Andrew W. Cross A Quantum Logic Array Microarchitecture: Scalable Quantum Data Movement and Computation. Search on Bibsonomy MICRO The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
52Greg Semeraro, David H. Albonesi, Steve Dropsho, Grigorios Magklis, Sandhya Dwarkadas, Michael L. Scott Dynamic frequency and voltage control for a multiple clock domain microarchitecture. Search on Bibsonomy MICRO The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
52Fred J. Pollack New Microarchitecture Challenges in the Coming Generations of CMOS Process Technologies. Search on Bibsonomy MICRO The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
52Yale N. Patt Microarchitecture choices (implementation of the VAX). Search on Bibsonomy MICRO The full citation details ... 1989 DBLP  DOI  BibTeX  RDF VAX
52James E. Wilson, Stephen W. Melvin, Michael Shebanow, Wen-mei W. Hwu, Yale N. Patt On tuning the microarchitecture of an HPS implementation of the VAX. Search on Bibsonomy MICRO The full citation details ... 1987 DBLP  DOI  BibTeX  RDF
51Yuchun Ma, Yongxiang Liu, Eren Kursun, Glenn Reinman, Jason Cong Investigating the effects of fine-grain three-dimensional integration on microarchitecture design. Search on Bibsonomy ACM J. Emerg. Technol. Comput. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF 3D packing, microarchitecture, 3D integration, thermal
51Pedro Ángel Castillo Valdivieso, G. Fernández, Juan Julián Merelo Guervós, José Luis Bernier, Antonio Miguel Mora, Juan Luis Jiménez Laredo, Pablo García-Sánchez Evolving Machine Microprograms: Application to the CODE2 Microarchitecture. Search on Bibsonomy DCAI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF evolutionary computation techniques, optimization, computer architecture, microarchitecture, microprogramming, automatic design
51Vidyasagar Nookala, David J. Lilja, Sachin S. Sapatnekar Temperature-aware floorplanning of microarchitecture blocks with IPC-power dependence modeling and transient analysis. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF floorplanning, microarchitecture, transient analysis
51Peter Yiannacouras, Jonathan Rose, J. Gregory Steffan The microarchitecture of FPGA-based soft processors. Search on Bibsonomy CASES The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Nios, RTL generation, SPREE, application specic tradeoff, FPGA, pipeline, exploration, embedded processor, ASIP, microarchitecture, soft processor
45Christophe Dubach, Timothy M. Jones 0001, Edwin V. Bonilla, Grigori Fursin, Michael F. P. O'Boyle Portable compiler optimisation across embedded programs and microarchitectures using machine learning. Search on Bibsonomy MICRO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF architecture/compiler co-design, machine learning, design-space exploration
45Vimal K. Reddy, Eric Rotenberg Coverage of a microarchitecture-level fault check regimen in a superscalar processor. Search on Bibsonomy DSN The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
45Xin Fu, Tao Li, José A. B. Fortes Combined circuit and microarchitecture techniques for effective soft error robustness in SMT processors. Search on Bibsonomy DSN The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
45Yogesh S. Mahajan, Sharad Malik Automating Hazard Checking in Transaction-Level Microarchitecture Models. Search on Bibsonomy FMCAD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
45Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe Statistical sampling of microarchitecture simulation. Search on Bibsonomy IPDPS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
45Thomas Lamotte, Françoise Peyrin, Jean-Marc Dinten A prior model for bone microarchitecture reconstruction with a very limited number of projections. Search on Bibsonomy ICIP (3) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
45Andrey V. Zykov, Elias Mizan, Margarida F. Jacome, Gustavo de Veciana, Ajay Subramanian High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trade-offs. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF manotechnologies, reliability-delay trade-offs, performance optimization, fault tolerant microarchitectures
45Kevin Skadron, Mircea R. Stan, Karthik Sankaranarayanan, Wei Huang 0004, Sivakumar Velusamy, David Tarjan Temperature-aware microarchitecture: Modeling and implementation. Search on Bibsonomy ACM Trans. Archit. Code Optim. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Dynamic compact thermal models, fetch gating, dynamic voltage scaling, feedback control, dynamic thermal management
45Xinping Zhu, Wei Qin, Sharad Malik Modeling operation and microarchitecture concurrency for communication architectures with application to retargetable simulation. Search on Bibsonomy CODES+ISSS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF on-chip communication architecture, simulator synthesis, multiprocessor system, packet-switching network, design exploration, bus, retargetable simulation
45Yuan Chou, Brian Fahs, Santosh G. Abraham Microarchitecture Optimizations for Exploiting Memory-Level Parallelism. Search on Bibsonomy ISCA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
45Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, James C. Hoe SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling. Search on Bibsonomy ISCA The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
45Nels Vander Zanden, Daniel Gajski MILO: A Microarchitecture and Logic Optimizer. Search on Bibsonomy DAC The full citation details ... 1988 DBLP  BibTeX  RDF
44Zhonglei Wang, Antonio Sánchez, Andreas Herkersdorf SciSim: a software performance estimation framework using source code instrumentation. Search on Bibsonomy WOSP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF debugging information, software performance estimation, source code instrumentation, microarchitecture
44James Burns, Jean-Luc Gaudiot SMT Layout Overhead and Scalability. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF layout area estimation, microarchitecture trade-off, processor architecture, SMT
44Yiannakis Sazeides Modeling Value Speculation. Search on Bibsonomy HPCA The full citation details ... 2002 DBLP  DOI  BibTeX  RDF microarchitecture modeling, speculation, value prediction, value speculation
44Victor V. Zyuban Unified architecture level energy-efficiency metric. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2002 DBLP  DOI  BibTeX  RDF performance, architecture, energy-efficiency, metric, power, energy, microarchitecture
43Bryan Black, Murali Annavaram, Ned Brekelbaum, John DeVale, Lei Jiang, Gabriel H. Loh, Don McCaule, Patrick Morrow, Donald W. Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Paul Shen, Clair Webb Die Stacking (3D) Microarchitecture. Search on Bibsonomy MICRO The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
43Chen-Yong Cher, T. N. Vijaykumar Skipper: a microarchitecture for exploiting control-flow independence. Search on Bibsonomy MICRO The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
43Rahul Razdan, Michael D. Smith 0001 A high-performance microarchitecture with hardware-programmable functional units. Search on Bibsonomy MICRO The full citation details ... 1994 DBLP  DOI  BibTeX  RDF automatic instruction set design, compile-time optimization, general-purpose microarchitectures, logic synthesis, programmable logic
43Edil S. T. Fernandes Microarchitecture modelling through ADL. Search on Bibsonomy MICRO The full citation details ... 1988 DBLP  BibTeX  RDF
42Daniel Schwartz-Narbonne, Carven Chan, Yogesh S. Mahajan, Sharad Malik Supporting RTL flow compatibility in a microarchitecture-level design framework. Search on Bibsonomy CODES+ISSS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF microarchitecture level, transactions, formal models, hierarchical design, hardware resources
42Ronny Ronen, Antonio González 0001 Guest Editors' Introduction: Micro's Top Picks from the Microarchitecture Conferences. Search on Bibsonomy IEEE Micro The full citation details ... 2007 DBLP  DOI  BibTeX  RDF programmable architecture, performance evaluation, fault tolerance, microarchitecture, multicore systems, wireless protocols
42Niti Madan, Rajeev Balasubramonian Leveraging 3D Technology for Improved Reliability. Search on Bibsonomy MICRO The full citation details ... 2007 DBLP  DOI  BibTeX  RDF redundant multi-threading, 3D die-stacking, dynamic timing errors, power-efficient microarchitecture, on-chip temperature, reliability, soft errors, parameter variation
42Grigorios Magklis, Pedro Chaparro, José González 0002, Antonio González 0001 Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF MCD, energy efficiency, DVS, microarchitecture, GALS
42Sarita V. Adve, Pia N. Sanda Guest Editors' Introduction: Reliability-Aware Microarchitecture. Search on Bibsonomy IEEE Micro The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Reliability-aware microarchitecture, reliability management, soft errors, CMOS scaling
42Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe TurboSMARTS: accurate microarchitecture simulation sampling in minutes. Search on Bibsonomy SIGMETRICS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF checkpointed microarchitecture simulation, simulation sampling
42Vidyasagar Nookala, Ying Chen, David J. Lilja, Sachin S. Sapatnekar Microarchitecture-aware floorplanning using a statistical design of experiments approach. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF floorplanning, microarchitecture, wire pipelining
42Jason Cong, Ashok Jagannathan, Glenn Reinman, Michail Romesis Microarchitecture evaluation with physical planning. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF microarchitecture evaluation, physical planning
37Xin Fu, Tao Li, José A. B. Fortes Soft error vulnerability aware process variation mitigation. Search on Bibsonomy HPCA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
37Domingo Benitez, Juan C. Moure, Dolores Rexachs, Emilio Luque Evaluation of the field-programmable cache: performance and energy consumption. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2006 DBLP  DOI  BibTeX  RDF adaptive processors, reconfigurable cache memory, static and dynamic energy consumption, performance evaluation, run-time adaptation
37Alex Orailoglu, Ramesh Karri Coactive scheduling and checkpoint determination during high level synthesis of self-recovering microarchitectures. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
35Frederico Pratas, Georgi Gaydadjiev, Mladen Berekovic, Leonel Sousa, Stefanos Kaxiras Low power microarchitecture with instruction reuse. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2008 DBLP  DOI  BibTeX  RDF loop reusing technique, reorder buffer optimization, superscalar processor, power reduction
35Kenneth Hoste, Lieven Eeckhout Microarchitecture-Independent Workload Characterization. Search on Bibsonomy IEEE Micro The full citation details ... 2007 DBLP  DOI  BibTeX  RDF workload characterization, modeling techniques, measurement techniques, performance attributes
35Stijn Eyerman, Lieven Eeckhout, James E. Smith 0001 Studying Compiler-Microarchitecture Interactions through Interval Analysis. Search on Bibsonomy PACT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
35Yogesh S. Mahajan, Carven Chan, Ali Alphan Bayazit, Sharad Malik, Wei Qin Verification Driven Formal Architecture and Microarchitecture Modeling. Search on Bibsonomy MEMOCODE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
35Rong Ji, Xianjun Zeng, Liang Chen, Junfeng Zhang The Implementation and Design of a Low-Power Clock Distribution Microarchitecture. Search on Bibsonomy IEEE NAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
35Fei Guo, Yan Solihin, Li Zhao 0002, Ravishankar R. Iyer 0001 A Framework for Providing Quality of Service in Chip Multi-Processors. Search on Bibsonomy MICRO The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
35Olivier Rochecouste, Gilles Pokam, André Seznec A case for a complexity-effective, width-partitioned microarchitecture. Search on Bibsonomy ACM Trans. Archit. Code Optim. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Power analysis
35Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu 0001, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. Search on Bibsonomy MICRO The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Diana Marculescu, Emil Talpes Energy Awareness and Uncertainty in Microarchitecture-Level Design. Search on Bibsonomy IEEE Micro The full citation details ... 2005 DBLP  DOI  BibTeX  RDF gate length, on-chip temperature variations, variability metric, Energy awareness
35Weiping Liao, Joseph M. Basile, Lei He 0001 Microarchitecture-level leakage reduction with data retention. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Moinuddin K. Qureshi, Onur Mutlu, Yale N. Patt Microarchitecture-Based Introspection: A Technique for Transient-Fault Tolerance in Microprocessors. Search on Bibsonomy DSN The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Jaume Abella 0001, Antonio González 0001 Inherently Workload-Balanced Clustered Microarchitecture. Search on Bibsonomy IPDPS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Lei Wang 0003 Error-tolerance memory Microarchitecture via Dynamic Multithreading. Search on Bibsonomy ICCD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Ethan Schuchman, T. N. Vijaykumar Rescue: A Microarchitecture for Testability and Defect Tolerance. Search on Bibsonomy ISCA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Minglong Shao, Anastassia Ailamaki, Babak Falsafi DBmbench: fast and accurate database workload representation on modern microarchitecture. Search on Bibsonomy CASCON The full citation details ... 2005 DBLP  BibTeX  RDF
35Juanjo Noguera, Rosa M. Badia Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Adaptable architectures and microarchitectures, runtime support for dynamic reconfiguration, dynamic scheduling
35Yoav Almog, Roni Rosner, Naftali Schwartz, Ari Schmorak Specialized Dynamic Optimizations for High-Performance Energy-Efficient Microarchitecture. Search on Bibsonomy CGO The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
35Anne Bracy, Prashant Prahlad, Amir Roth Dataflow Mini-Graphs: Amplifying Superscalar Capacity and Bandwidth. Search on Bibsonomy MICRO The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
35Kevin Skadron, Mircea R. Stan, Wei Huang 0004, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan Temperature-Aware Microarchitecture. Search on Bibsonomy ISCA The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
35Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan Checkpoint Processing and Recovery: Towards Scalable Large Instruction Window Processors. Search on Bibsonomy MICRO The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
35Ranjit Jhala, Kenneth L. McMillan Microarchitecture Verification by Compositional Model Checking. Search on Bibsonomy CAV The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
35Brian Fahs, Satarupa Bose, Matthew M. Crum, Brian Slechta, Francesco Spadini, Tony Tung, Sanjay J. Patel, Steven S. Lumetta Performance characterization of a hardware mechanism for dynamic optimization. Search on Bibsonomy MICRO The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
35David M. Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. Search on Bibsonomy IEEE Micro The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
35Eric Rotenberg, Steve Bennett, James E. Smith 0001 A Trace Cache Microarchitecture and Evaluation. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1999 DBLP  DOI  BibTeX  RDF multiple branch prediction, superscalar processors, Instruction cache, trace cache, instruction fetching
34José Manuel Colmenar, Noelia Morón, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo Modelling Asynchronous Systems using Probability Distribution Functions. Search on Bibsonomy PDP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF modelling, asynchronous, microarchitecture
34Pedro Ángel Castillo Valdivieso, G. Fernández, Antonio Mora García, Juan Julián Merelo Guervós, José Luis Bernier, Alberto Prieto Evolving machine microprograms. Search on Bibsonomy GECCO The full citation details ... 2008 DBLP  DOI  BibTeX  RDF evolutionary computation techniques, optimization, computer architecture, microarchitecture, microprogramming, automatic design
34Xianfeng Li, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra 0001, Xu Cheng 0001 A Retargetable Software Timing Analyzer Using Architecture Description Language. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF retargetable software timing analyzer, static WCET analysis, program path analysis, microarchitecture modeling, graph-based execution models, pipeline model, real-time systems, architecture description language, worst case execution time, embedded processors, branch prediction, schedulability analysis
34Oleg Bessonov, Dominique Fougère, Bernard Roux Analysis of Architecture and Design of Linear Algebra Kernels for Superscalar Processors. Search on Bibsonomy PaCT The full citation details ... 2003 DBLP  DOI  BibTeX  RDF linear algebra kernels, LINPACK benchmark, performance measurements, instruction level parallelism, cache memories, microarchitecture, out-of-order processors
34Nitzan Weinberg, David Nagle Dynamic Elimination of Pointer-Expressions. Search on Bibsonomy IEEE PACT The full citation details ... 1998 DBLP  DOI  BibTeX  RDF pointer-expression, sphinx, sub-expression, SPECint95, memory address, performance analysis, compiler, locality, speech recognition, dynamic, microprocessor, mpeg, cache memory, microarchitecture, jpeg, value, spatial, memory bandwidth, data reuse, temporal, pointer, conditional execution
33Gerasimos Gerogiannis, Josep Torrellas Micro-Armed Bandit: Lightweight & Reusable Reinforcement Learning for Microarchitecture Decision-Making. Search on Bibsonomy MICRO The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
33Chen Bai, Jiayi Huang 0001, Xuechao Wei, Yuzhe Ma, Sicheng Li, Hongzhong Zheng, Bei Yu 0001, Yuan Xie 0001 ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis. Search on Bibsonomy MICRO The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
33Joshua J. Yi Microarchitecture Patents Over Time and Interesting Early Microarchitecture Patents. Search on Bibsonomy IEEE Micro The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
33Jaeguk Ahn, Jiho Kim, Hans Kasan, Zhixian Jin, Leila Delshadtehrani, WonJun Song, Ajay Joshi, John Kim Network-on-Chip Microarchitecture-based Covert Channel in GPUs. Search on Bibsonomy MICRO The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
33Vasileios Tsoutsouras, Orestis Kaparounakis, Bilgesu Arif Bilgin, Chatura Samarakoon, James Timothy Meech, Jan Heck, Phillip Stanley-Marbell The Laplace Microarchitecture for Tracking Data Uncertainty and Its Implementation in a RISC-V Processor. Search on Bibsonomy MICRO The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
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