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Searching for Micropipelines with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1989-2001 (16) 2002-2017 (13)
Publication types (Num. hits)
article(10) inproceedings(19)
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The graphs summarize 56 occurrences of 39 keywords

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Found 29 publication records. Showing 29 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
79O. A. Petlin, Stephen B. Furber Scan testing of micropipelines. Search on Bibsonomy VTS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF asynchronous VLSI circuit design, AMULET1 microprocessor, scan test technique, data processing blocks, combinational processing logic, state holding elements, test generation techniques, VLSI, logic testing, delays, integrated circuit testing, design for testability, logic design, asynchronous circuits, fault location, integrated circuit design, microprocessor chips, delay faults, boundary scan testing, computer testing, test patterns, single stuck-at faults, micropipelines
59O. A. Petlin, Stephen B. Furber Built-In Self-Testing of Micropipelines. Search on Bibsonomy ASYNC The full citation details ... 1997 DBLP  DOI  BibTeX  RDF Built-in self-test, Design for test, Asynchronous design, Micropipelines
53Oliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-Fat Chan A New Control Circuit for Asynchronous Micropipelines. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2001 DBLP  DOI  BibTeX  RDF zero-overhead, dual-rail coding, Asynchronous design, micropipeline
53Chih-Ming Chang, Shih-Lien Lu Design of a static MIMD data flow processor using micropipelines. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
48Rajat Subhra Chakraborty, Swarup Bhunia A study of asynchronous design methodology for robust CMOS-nano hybrid system design. Search on Bibsonomy ACM J. Emerg. Technol. Comput. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF CMOS-nano co-design, dual-rail circuits, logic degradation, nano-scale crossbar, Asynchronous design, robust design, micropipelines
48Robert B. Reese, Mitchell A. Thornton, Cherrice Traver A Coarse-Grain Phased Logic CPU. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2005 DBLP  DOI  BibTeX  RDF asynchronous, pipelined processor, Automatic synthesis, self-timed, micropipelines
48Craig Farnsworth, David A. Edwards, Jianwei Liu, Shiv S. Sikand A hybrid asynchronous system design environment. Search on Bibsonomy ASYNC The full citation details ... 1995 DBLP  DOI  BibTeX  RDF hybrid asynchronous system design environment, hybrid design scheme, asynchronous circuit synthesis, Tangram silicon complier, synchronous design techniques, concurrency, high level synthesis, asynchronous circuits, power reduction, performance gains, micropipelines
42Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein Self-Resetting Latches for Asynchronous Micro-Pipelines. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
32Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee Energy-efficient and high performance 2-phase asynchronous micropipelines. Search on Bibsonomy MWSCAS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
32Haider Alrudainy, Andrey Mokhov, Fei Xia, Alex Yakovlev Ultra-Low Energy Data Driven Computing Using Asynchronous Micropipelines and Nano-Electro-Mechanical Relays. Search on Bibsonomy ISVLSI The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
32Thomas Polzer, Andreas Steininger SET propagation in micropipelines. Search on Bibsonomy PATMOS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
32Antonio Cerone, George J. Milne A Methodology for the Formal Analysis of Asynchronous Micropipelines. Search on Bibsonomy FMCAD The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
32Jo C. Ebergen, Scott Fairbanks, Ivan E. Sutherland Predicting Performance of Micropipelines Using Charlie Diagrams. Search on Bibsonomy ASYNC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
32Stephen B. Furber, Jianwei Liu Dynamic logic in four-phase micropipelines. Search on Bibsonomy ASYNC The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
32Kees van Berkel 0001, Arjan Bink Single-track handshake signaling with application to micropipelines and handshake circuits. Search on Bibsonomy ASYNC The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
32Volker Schöber, Thomas Kiel An Asynchronous Scan Path Concept for Micropipelines using the Bundled Data Convention. Search on Bibsonomy ITC The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
32Shih-Lien Lu Implementation of micropipelines in enable/disable CMOS differential logic. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
32Ajay Khoche, Erik Brunvand Testing micropipelines. Search on Bibsonomy ASYNC The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
32Ivan E. Sutherland Micropipelines. Search on Bibsonomy Commun. ACM The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
27Steven M. Nowick, Montek Singh High-Performance Asynchronous Pipelines: An Overview. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF elastic circuits, latch controllers, pipelines, asynchronous, dynamic logic, design and test, micropipelines
27Recep O. Ozdag, Peter A. Beerel High-Speed QDI Asynchronous Pipelines. Search on Bibsonomy ASYNC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF conditional split, conditional join, QDI, pipelines, asynchronous, dynamic logic, joins, non-linear, fine-grain, micropipelines, forks
21Raghid Shreih, Maitham Shams Implementation of asynchronous pipeline circuits in multi-threshold CMOS technologies. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF c-element, gasp, low power, pipeline, asynchronous, multi-threshold
21Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
21Delong Shang, Frank P. Burns, Alexandre V. Bystrov, Albert Koelmans, Danil Sokolov, Alexandre Yakovlev A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits. Search on Bibsonomy PATMOS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
21Matthew L. King, Kewal K. Saluja Testing Micropipelined Asynchronous Circuits. Search on Bibsonomy ITC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
21Gregg N. Hoyer, Gin Yee, Carl Sechen Locally clocked pipelines and dynamic logic. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
21Tony Werner, Venkatesh Akella An Asynchronous Superscalar Architecture for Exploiting Instruction-Level Parallelism. Search on Bibsonomy ASYNC The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
21Sun-Yen Tan, Stephen B. Furber, Wen-Fang Yen The Design of an Asynchronous VHDL Synthesizer. Search on Bibsonomy DATE The full citation details ... 1998 DBLP  DOI  BibTeX  RDF Synthesis, VHDL, Asynchronous
21Stephen B. Furber, Paul Day Four-phase micropipeline latch control circuits. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
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