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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 22 occurrences of 20 keywords
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Results
Found 20 publication records. Showing 20 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
119 | Jung-Hoon Lee |
Next High Performance and Low Power Flash Memory Package Structure. |
J. Comput. Sci. Technol. |
2007 |
DBLP DOI BibTeX RDF |
NAND-type, NOR-type, memory localities, buffer or cache memory, flash memory |
53 | Yea-Ling Horng, Jing-Reng Huang, Tsin-Yuan Chang |
A realistic fault model for flash memories. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
NAND circuits, faulty behavior classification, NAND-type flash memory, SPICE models, flash cell models, circuit-level faulty behavior simulation, testing, fault model, fault modeling, fault simulation, flash memories, flash memories, circuit analysis computing, SPICE, integrated memory circuits |
42 | Kun-Jin Lin, Cheng-Wen Wu |
A Low-Power CAM Design for LZ Data Compression. |
IEEE Trans. Computers |
2000 |
DBLP DOI BibTeX RDF |
LZ77 algorithm, data compression, low power design, Associative memory, content addressable memory, semiconductor memory |
32 | Amitava Majumdar 0001, Sarma B. K. Vrudhula |
Analysis of signal probability in logic circuits using stochastic models. |
IEEE Trans. Very Large Scale Integr. Syst. |
1993 |
DBLP DOI BibTeX RDF |
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32 | Wen-Tzeng Huang, Chun-Ta Chen, Yen-Sheng Chen, Chin-Hsing Chen |
A Compression Layer for NAND Type Flash Memory Systems. |
ICITA (1) |
2005 |
DBLP DOI BibTeX RDF |
NandFlash, X-RL, Embedded system, Compression Algorithm |
25 | Yen-Jen Chang, Yuan-Hong Liao |
Hybrid-Type CAM Design for Both Power and Performance Efficiency. |
IEEE Trans. Very Large Scale Integr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
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24 | Jihyun In, Ilhoon Shin, Hyojun Kim |
SWL: a search-while-load demand paging scheme with NAND flash memory. |
LCTES |
2007 |
DBLP DOI BibTeX RDF |
page fault handler, parallelization, NAND flash memory, demand paging, page replacement |
19 | Se Jin Kwon, Arun Ranjitkar, Young-Bae Ko, Tae-Sun Chung |
FTL algorithms for NAND-type flash memories. |
Des. Autom. Embed. Syst. |
2011 |
DBLP DOI BibTeX RDF |
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19 | Dae Man Han |
Fast erase algorithm using flash translation layer in NAND-type flash memory. |
IEEE Trans. Consumer Electron. |
2011 |
DBLP DOI BibTeX RDF |
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19 | Seongjae Cho, Jung Hoon Lee, Yoon Kim, Jang-Gn Yun, Hyungcheol Shin, Byung-Gook Park |
Simulation Study on Dependence of Channel Potential Self-Boosting on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices. |
IEICE Trans. Electron. |
2010 |
DBLP DOI BibTeX RDF |
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19 | Seunghwan Hyun, Sehwan Lee, Sungyong Ahn, Kern Koh |
Improving the Demand Paging Performance with NAND-type Flash Memory. |
ICCSA Workshops |
2008 |
DBLP DOI BibTeX RDF |
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19 | Jung-Hoon Lee, Gi-Ho Park, Shin-Dug Kim |
A new NAND-type flash memory package with smart buffer system for spatial and temporal localities. |
J. Syst. Archit. |
2005 |
DBLP DOI BibTeX RDF |
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19 | Keun Soo Yim, Kern Koh, Hyokyung Bahn |
A Compressed Page Management Scheme for NAND-Type Flash Memory. |
VLSI |
2003 |
DBLP BibTeX RDF |
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19 | Motoki Tokumasu, Hiroshige Fujii, Masako Ohta, Tsunealu Fuse, Atsushi Kameyama |
A new reduced clock-swing flip-flop: NAND-type keeper flip-flop (NDKFF). |
CICC |
2002 |
DBLP DOI BibTeX RDF |
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17 | Yen-Jen Chang, Yuan-Hong Liao, Shanq-Jang Ruan |
Improve CAM power efficiency using decoupled match line scheme. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
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15 | Amol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan, Yuan Xie 0001, Mary Jane Irwin |
Variation Analysis of CAM Cells. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
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15 | Mu-Hsien Hsu, Yu-Tsao Hsing, Jen-Chieh Yeh, Cheng-Wen Wu |
Fault-Pattern Oriented Defect Diagnosis for Flash Memory. |
MTDT |
2006 |
DBLP DOI BibTeX RDF |
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15 | Johannes Grad, James E. Stine |
New algorithms for carry propagation. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
carry propagate addition, conditional sum adder, hybrid adder, ling adder, pseudo-complements, reed adder, domino logic, carry-skip adder |
15 | Kuo-Liang Cheng, Jen-Chieh Yeh, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu |
RAMSES-FT: A Fault Simulator for Flash Memory Testing and Diagnostics. |
VTS |
2002 |
DBLP DOI BibTeX RDF |
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13 | Keun Soo Yim, Jihong Kim 0001, Kern Koh |
A fast start-up technique for flash memory based computing systems. |
SAC |
2005 |
DBLP DOI BibTeX RDF |
fast booting, fast mounting, metadata snapshot, flash memory |
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