Search results for "PPSFP"

Found 10 publication records. Showing 10 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
95	Chul Young Lee, D. M. H. Walker	PROBE: A PPSFP Simulator for Resistive Bridging Faults.	VTS	2000	DBLP DOI BibTeX RDF	PPSFP, fault model, fault simulation, bridging fault, resistive bridging faults
69	Byung S. So, Charles R. Kime	A fault simulation method: Parallel pattern critical path tracing.	J. Electron. Test.	1993	DBLP DOI BibTeX RDF	parallel pattern simulation, single fault propagation, fault simulation, Critical path tracing
65	Firas Khadour, Xiaoling Sun	Fast Signature Simulation for PPSFP Simulators.	DFT	1999	DBLP DOI BibTeX RDF
52	Michael A. Kochte, Marcel Schaal, Hans-Joachim Wunderlich, Christian G. Zoellin	Efficient fault simulation on many-core processors.	DAC	2010	DBLP DOI BibTeX RDF	PPSFP, parallel fault simulation, many-core processors
52	Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang, Cheng-Liang Tsai	Combination Of Automatic Test Pattern Generation And Built-In Intermediate Voltage Sensing For Detecting CMOS Bridging Faults.	Asian Test Symposium	1996	DBLP DOI BibTeX RDF	CMOS bridging faults detection, ATPG system, built-in intermediate voltage sensing, BIFEST system, PODEM-like process, PPSFP-based process, logic monitoring, gate threshold ranges, Byzantine General's Command Problem, feedback bridging faults, parallel pattern single fault propagation, fault modelling, fault simulation, fault coverage, greedy algorithm, CMOS logic circuits
46	Vinod Narayanan, Vijay Pitchumani	Fault simulation on massively parallel SIMD machines algorithms, implementations and results.	J. Electron. Test.	1992	DBLP DOI BibTeX RDF	parallel algorithms, parallel processing, Fault simulation
29	Piet Engelke, Bernd Becker 0001, Michel Renovell, Jürgen Schlöffel, Bettina Braitling, Ilia Polian	SUPERB: Simulator utilizing parallel evaluation of resistive bridges.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	PPSFP, SPPFP, fault mapping, Resistive bridging faults, bridging fault simulation
23	Hugo Cheung, Sandeep K. Gupta	Accurate modeling and fault simulation of Byzantine resistive bridges.	ICCD	2007	DBLP DOI BibTeX RDF
23	Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang	BIFEST: a built-in intermediate fault effect sensing and test generation system for CMOS bridging faults.	ACM Trans. Design Autom. Electr. Syst.	1999	DBLP DOI BibTeX RDF
23	Vinod Narayanan, Vijay Pitchumani	A Massively Parallel Algorithm for Fault Simulation on the Connection Machine.	DAC	1989	DBLP DOI BibTeX RDF