Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
122 | Jie Liu, Junan Lu, Xiaoqun Wu |
Bridge the gap between the PWL Lorenz and PWL Chen's system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICARCV ![In: 8th International Conference on Control, Automation, Robotics and Vision, ICARCV 2004, Kunming, China, 6-9 December 2004, Proceedings, pp. 1368-1373, 2004, IEEE, 0-7803-8653-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
109 | Jun Chen 0008, Lei He 0001 |
Piecewise linear model for transmission line with capacitive loading and ramp input. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(6), pp. 928-937, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
91 | Víctor Manuel Jimenez-Fernandez, Luis Hernández-Martínez, Arturo Sarmiento-Reyes |
A method for finding the DC solution regions in piecewise-linear networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
79 | Jerzy J. Dabrowski, Andrzej Pulka |
Experiences with Modeling of Analog and Mixed A/D Systems Based on PWL Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 790-791, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
72 | Víctor Manuel Jimenez-Fernandez, Luis Hernández-Martínez, Arturo Sarmiento-Reyes |
Decomposed piecewise-linear models by hyperplanes unbending. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
72 | Jeyran Hezavei, Narayanan Vijaykrishnan, Mary Jane Irwin |
A comparative study of power efficient SRAM designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000, pp. 117-122, 2000, ACM, 1-58113-251-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
low power, decoder, SRAM |
61 | Martin Di Federico, Pedro Julián, Tomaso Poggi, Marco Storace |
A Simplicial PWL Integrated Circuit Realization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 685-688, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
55 | Alicia Manthe, Zhao Li, C.-J. Richard Shi |
Symbolic analysis of analog circuits with hard nonlinearity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 542-545, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
PWL, circuit nonlinearity, symbolic analysis |
54 | M. S. Bhat 0001, S. Rekha, H. S. Jamadagni |
Extrinsic Analog Synthesis Using Piecewise Linear Current-Mode Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 51-56, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
54 | Jun Chen 0008, Lei He 0001 |
Modeling of coplanar waveguide for buffered clock tree. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 367-372, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
54 | Pedro Julián, Radu Dogaru, Leon O. Chua |
Exploiting piecewise linear features: multinested and simplicial cellular neural/nonlinear networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 650-653, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
43 | Jose L. Figueroa, Juan E. Cousseau, Rui J. P. de Figueiredo |
A piecewise linear dynamical functional artificial neural network (PWL-DFANN) for nonlinear adaptive time series prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 29-32, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
43 | Marco Storace, Pedro Julián, Mauro Parodi |
Towards the circuit implementation of the Hodgkin-Huxley neuron model: A PWL approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 823-826, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
43 | Pedro Julián, Alfredo C. Desages, Belén D'Amico |
Orthonormal high level canonical PWL functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 511-514, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
36 | Gabriel H. Loh, Daniel A. Jiménez |
Modulo Path History for the Reduction of Pipeline Overheads in Path-based Neural Branch Predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 36(2), pp. 267-286, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Computer architecture, Branch prediction |
36 | Luigi Iannelli, Francesco Vasca |
Computation of limit cycles and forced oscillations in discrete-time piecewise linear feedback systems through a complementarity approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDC ![In: Proceedings of the 47th IEEE Conference on Decision and Control, CDC 2008, December 9-11, 2008, Cancún, Mexico, pp. 1169-1174, 2008, IEEE, 978-1-4244-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
36 | Sudip K. Mazumder, Kaustuva Acharya, Muhammad Tahir 0002 |
Network reconfiguration of distributed controlled homogenous power inverter network using composite Lyapunov function based reachability bound. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCSC ![In: Proceedings of the 2007 Summer Computer Simulation Conference, SCSC 2007, San Diego, California, USA, July 16-19, 2007, pp. 76-87, 2007, Simulation Councils, Inc., 1-56555-316-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
piecewise linear systems, reaching conditions, switching power converters, linear matrix inequality, Markov-chain model, Lyapunov stability |
36 | Pablo Echevarria, M. Victoria Martínez, Javier Echanobe, Inés del Campo, José Manuel Tarela |
Digital Hardware Implementation of High Dimensional Fuzzy Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WILF ![In: Applications of Fuzzy Sets Theory, 7th International Workshop on Fuzzy Logic and Applications, WILF 2007, Camogli, Italy, July 7-10, 2007, Proceedings, pp. 245-252, 2007, Springer, 978-3-540-73399-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
36 | Kiyotaka Yamamura, Takehisa Kitakawa |
Finding all solutions of piecewise-linear resistive circuits using the simplex method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 642-645, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
36 | Lorenzo Repetto, Marco Storace, Mauro Parodi |
A procedure for the piecewise-linear approximation of the resistive part of a cellular nonlinear network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 583-586, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
36 | Victor M. Preciado |
Piecewise-Linear Approximation of Any Smooth Output Function on the Cellular Neural Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICANN ![In: Artificial Neural Networks - ICANN 2002, International Conference, Madrid, Spain, August 28-30, 2002, Proceedings, pp. 462-467, 2002, Springer, 3-540-44074-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | José Luis Echenausía-Monroy, S. Jafari, Guillermo Huerta-Cuéllar, Héctor Eduardo Gilardi Velázquez |
Predicting the Emergence of Multistability in a Monoparametric PWL System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Bifurc. Chaos ![In: Int. J. Bifurc. Chaos 32(14), pp. 2250206:1-2250206:13, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
25 | Yufei Zhang 0003 |
Data for an efficient PWL memristor model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2022 |
DOI RDF |
|
25 | Ernesto Zambrano-Serrano, Jesús M. Muñoz-Pacheco, Fernando E. Serrano, Luis Abraham Sánchez-Gaspariano, Christos K. Volos |
Experimental verification of the multi-scroll chaotic attractors synchronization in PWL arbitrary-order systems using direct coupling and passivity-based control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 81, pp. 56-70, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
25 | Fei Lyu 0002, Zhelong Mao, Jin Zhang, Yu Wang 0161, Yuanyong Luo |
PWL-Based Architecture for the Logarithmic Computation of Floating-Point Numbers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 29(7), pp. 1470-1474, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
25 | Ning Wang 0015, Guoshan Zhang, Houzhen Li |
Parametric Control for Multi-Scroll Attractor Generation via Nested Sine-PWL Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(3), pp. 1033-1037, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
25 | Anirban Dutta, Ashishkumar Prabhakar Gudmalwar, Ch. V. Rama Rao |
Performance analysis of ASR system in hybrid DNN-HMM framework using a PWL euclidean activation function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Frontiers Comput. Sci. ![In: Frontiers Comput. Sci. 15(4), pp. 154705, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
25 | Vantruong Nguyen, Jueping Cai, Linyu Wei, Jie Chu |
Neural Networks Probability-Based PWL Sigmoid Function Approximation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 103-D(9), pp. 2023-2026, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
25 | Yan Fu, Deming Kong, Haiyun Xin, Meihua Bi, Shi Jia, Kuo Zhang, Weisheng Hu, Hao Hu |
Computationally Efficient 120 Gb/s/λ PWL Equalized 2D-TCM-PAM8 in Dispersion Unmanaged DML-DD System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OFC ![In: Optical Fiber Communications Conference and Exhibition, OFC 2020, San Diego, CA, USA, March 8-12, 2020, pp. 1-3, 2020, IEEE, 978-1-9435-8071-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
25 | Andres Anzo-Hernández, Eric Campos-Cantón, Matthew Nicol |
Itinerary synchronization between PWL systems coupled with unidirectional links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Commun. Nonlinear Sci. Numer. Simul. ![In: Commun. Nonlinear Sci. Numer. Simul. 70, pp. 102-124, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
25 | Bahar Youssefi, Alexander J. Leigh, Mitra Mirhassani, Q. M. Jonathan Wu |
Tunable Neuron With PWL Approximation Based on the Minimum Operator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 66-II(2), pp. 387-391, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
25 | Carlos Hernández-Mejía, Delia Torres-Muñoz |
PWL Window Function for Nonlinear Memristive Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONIELECOMP ![In: International Conference on Electronics, Communications and Computers, CONIELECOMP 2019, Cholula, Mexico, February 27 - March 1, 2019, pp. 9-13, 2019, IEEE, 978-1-7281-1145-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
25 | Mohammad Radpour, Sayed Masoud Sayedi |
SystemC-AMS modeling of photodiode based on PWL technique to be used in energy harvesting CMOS image sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 60, pp. 48-55, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
25 | Oscar J. Cinco-Izquierdo, Maria Teresa Sanz, Luis Hernández 0005, Carlos Aristoteles De la Cruz-Blas |
CMOS current-mode PWL implementation using MAX and MIN operators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017, pp. 1-4, 2017, IEEE, 978-1-4673-6853-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
25 | Ernesto Zambrano-Serrano, Jesús M. Muñoz-Pacheco, Eric Campos-Cantón |
Circuit synthesis of an incommensurate fractional order multi-scroll PWL chaotic system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MOCAST ![In: 6th International Conference on Modern Circuits and Systems Technologies, MOCAST 2017, Thessaloniki, Greece, May 4-6, 2017, pp. 1-4, 2017, IEEE, 978-1-5090-4386-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
25 | D. Moro-Frías, Carlos Aristoteles De la Cruz-Blas, María Teresa Sanz-Pascual |
PWL Current-Mode CMOS Exponential Circuit Based on Maximum Operator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 62-II(12), pp. 1169-1173, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
25 | Fu-Hsin Chen, Ming-Chang Yang, Yuan-Hao Chang 0001, Tei-Wei Kuo |
PWL: a progressive wear leveling to minimize data migration overheads for nand flash devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015, pp. 1209-1212, 2015, ACM, 978-3-9815370-4-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
25 | Luis Benadero, Vanessa Moreno-Font, Abdelali El Aroudi |
Unfolding nonsmooth bifurcation Patterns in a 1-d PWL Map as a Model of a Single-inductor Two-output DC-DC Switching Converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Bifurc. Chaos ![In: Int. J. Bifurc. Chaos 23(3), 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
25 | M. H. McCullough, Herbert H. C. Iu, B. Muthuswamy |
Chaotic behaviour in a three element memristor based circuit using fourth order polynomial and PWL nonlinearity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013, pp. 2743-2746, 2013, IEEE, 978-1-4673-5760-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
25 | Stefano Pastore, Amedeo Premoli |
A unified set-theoretic approach to the analysis of PWL resistive circuits and composite N-ports. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 39(8), pp. 801-822, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
25 | Junaid M. Khan, Shuning Wang |
Lattice PWL Modeling of separable Convex Functions and its Application to the Vehicle following Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Technol. Control. ![In: Inf. Technol. Control. 40(1), pp. 59-70, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
25 | Laura Gardini, Fabio Tramontana |
Border Collision bifurcations in 1D PWL Map with One Discontinuity and Negative Jump: Use of the First Return Map. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Bifurc. Chaos ![In: Int. J. Bifurc. Chaos 20(11), pp. 3529-3547, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
25 | Martin Di Federico, Pedro Julián, Pablo Sergio Mandolesi, Andreas G. Andreou |
PWL cores for nonlinear array processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France, pp. 3312-3316, 2010, IEEE, 978-1-4244-5308-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
25 | D. Moro-Frías, María Teresa Sanz-Pascual, Carlos Aristoteles De la Cruz-Blas |
Linear-in-dB Variable Gain Amplifier with PWL exponential gain control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France, pp. 2824-2827, 2010, IEEE, 978-1-4244-5308-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
25 | Ehsan Rasekh, Iman Rasekh, Mohammad Eshghi |
PWL approximation of hyperbolic tangent and the first derivative for VLSI implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the 23rd Canadian Conference on Electrical and Computer Engineering, CCECE 2010, Calgary, Alberta, Canada, 2-5 May, 2010, pp. 1-4, 2010, IEEE, 978-1-4244-5376-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
25 | Stefan LeBel, Luis Rodrigues |
PWL and PWA ℋ∞ controller synthesis for uncertain PWA slab systems: LMI approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Control ![In: Int. J. Control 82(3), pp. 482-492, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Stefano Pastore |
Fast and Efficient Search for All DC Solutions of PWL Circuits by Means of Oversized Polyhedra. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(10), pp. 2270-2279, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Daniele Linaro, Marco Righero, Mario Biey, Marco Storace |
Synchronization Properties in Networks of Hindmarsh-Rose Neurons and their PWL Approximations with Linear Symmetric Coupling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan, pp. 1685-1688, 2009, IEEE, 978-1-4244-3827-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Shukai Duan, Lidan Wang 0001 |
Circuitry Implementation for a Simple Delayed Chaotic Neural Model with PWL Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNC (3) ![In: Fourth International Conference on Natural Computation, ICNC 2008, Jinan, Shandong, China, 18-20 October 2008, Volume 3, pp. 451-454, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Daniele Linaro, Marco Storace |
A method based on a genetic algorithm to find PWL approximations of multivariate nonlinear functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 336-339, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Marco Storace, Federico Bizzarri |
Towards Accurate PWL Approximations of Parameter-Dependent Nonlinear Dynamical Systems With Equilibria and Limit Cycles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(3), pp. 620-631, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Eduardo Mojica-Nava, Alain Gauthier, Naly Rakoto-Ravalontsalama |
Probing Control for PWL Approximation of Nonlinear Cellular Growth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCA ![In: Proceedings of the IEEE International Conference on Control Applications, CCA 2007, Singapore, October 1-3, 2007, pp. 140-145, 2007, IEEE, 978-1-4244-0442-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Federico Bizzarri, Daniele Linaro, Marco Storace |
PWL approximation of the Hindmarsh-Rose neuron model in view of its circuit implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECCTD ![In: 18th European Conference on Circuit Theory and Design, ECCTD 2007, Seville, Spain, August 26-30, 2007, pp. 878-881, 2007, IEEE, 978-1-4244-1341-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Alessio Boggiano, Simone Delfitto, Tomaso Poggi, Marco Storace |
FPGA implementation of a new scheme for the circuit realization of PWL functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECCTD ![In: 18th European Conference on Circuit Theory and Design, ECCTD 2007, Seville, Spain, August 26-30, 2007, pp. 874-877, 2007, IEEE, 978-1-4244-1341-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Dan Sui, Chong Jin Ong |
Computation of Polytopal Invariant Sets of PWL Systems with Bounded Disturbances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACC ![In: American Control Conference, ACC 2007, New York, NY, USA, 9-13 July, 2007., pp. 4655-4659, 2007, IEEE, 1-4244-0988-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Marco Bergami, Federico Bizzarri, Andrea Carlevaro, Marco Storace |
Structurally Stable PWL Approximation of Nonlinear Dynamical Systems Admitting Limit Cycles: An Example. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(10), pp. 2759-2766, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Enis Günay, Mustafa Alçi |
n-Double Scrolls in SC-CNN Circuit via diode-Based PWL Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Bifurc. Chaos ![In: Int. J. Bifurc. Chaos 16(4), pp. 1023-1033, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Lorenzo Repetto, Mauro Parodi, Marco Storace |
A procedure for the computation of accurate PWL approximations of non-linear dynamical systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 34(2), pp. 237-248, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Dan Sui, Chong Jin Ong |
Outer Approximation of the Minimal Disturbance Invariant Set of PWL Systems with Bounded Disturbances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICARCV ![In: Ninth International Conference on Control, Automation, Robotics and Vision, ICARCV 2006, Singapore, 5-8 December 2006, Proceedings, pp. 1-5, 2006, IEEE, 1-4244-0341-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Junaid M. Khan, Shuning Wang |
Automatic cruise control modeling- a lattice PWL approximation approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITSC ![In: IEEE Intelligent Transportation Systems Conference, ITSC 2006, Toronto, Ontario, Canada, 17-20 September 2006, pp. 1370-1375, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Andrea de Bono, Lucio Badiali |
PWL 1.0 Personal WaveLab: an object-oriented workbench for seismogram analysis on Windows systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Geosci. ![In: Comput. Geosci. 31(1), pp. 55-64, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Marco Storace, Mauro Parodi |
Towards analog implementations of PWL two-dimensional non-linear functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 33(2), pp. 147-160, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Ion Necoara, Bart De Schutter, Ton J. J. van den Boom, Johannes Hellendoorn |
Robustly stabilizing MPC for perturbed PWL systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDC/ECC ![In: 44th IEEE IEEE Conference on Decision and Control and 8th European Control Conference Control, CDC/ECC 2005, Seville, Spain, 12-15 December, 2005, pp. 3759-3764, 2005, IEEE, 0-7803-9567-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Mauro Gaggero, Mauro Parodi, Marco Storace |
Multiresolution PWL approximations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECCTD ![In: Proceedings of the 2005 European Conference on Circuit Theory and Design, ECCTD 2005, Cork, Ireland, August 29th - September 1st 2005, pp. 393-396, 2005, IEEE, 0-7803-9066-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Oscar De Feo, Marco Storace |
PWL identification of dynamical systems: some examples. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 665-668, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
25 | Luigi Fortuna, Alessandro Rizzo, Maria Gabriella Xibilia |
Modeling Complex Dynamics via Extended PWL-Based CNNs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Bifurc. Chaos ![In: Int. J. Bifurc. Chaos 13(11), pp. 3273-3286, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Marco Storace, Oscar De Feo |
PWL approximation of dynamical systems: an example. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 654-657, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Stefano Pastore, Amedeo Premoli |
DC analysis of PWL electric networks and sub-networks by means of set theory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 658-661, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Jerzy J. Dabrowski |
Efficient post-layout timing verification via RLC trees and explicit PWL timing integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2002 9th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2002, Dubrovnik, Croatia, September 15-18, 2002, pp. 689-692, 2002, IEEE, 0-7803-7596-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Mauro Forti, Luca Pancioni, Santina Rocchi, Valerio Vignoli |
Accurate CMOS implementation of PWL CNN neuron activations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 221-224, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Lluís Alsedà, Miguel Antonio del Río, José Ángel Rodríguez |
A Note on the Totally Transitive Graph Maps stability of PWL Cellular. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Bifurc. Chaos ![In: Int. J. Bifurc. Chaos 11(3), pp. 841-844, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Mauro Forti, Alberto Tesi |
A New Method to Analyze Complete stability of PWL Cellular Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Bifurc. Chaos ![In: Int. J. Bifurc. Chaos 11(3), pp. 655-676, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Federico Bizzarri, Marco Storace, Laura Gardini, Renzo Lupini |
Bifurcation Analysis of a PWL Chaotic Circuit Based on Hysteresis through a One-Dimensional Map. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Bifurc. Chaos ![In: Int. J. Bifurc. Chaos 11(7), pp. 1911-1928, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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25 | Mario Biey, Marco Gilli, Ivan A. Maio, Amedeo Premoli |
Fast and accurate analysis of one‐dimensional arrays of dynamic PWL cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 29(5), pp. 455-467, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Federico Bizzarri, Marco Storace |
2-D bifurcation diagram of an oscillator based on PWL hysteresis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 807-810, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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25 | Pedro Julián, Belén D'Amico, Alfredo C. Desages |
A model reduction procedure for high level canonical PWL functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings, pp. 705-708, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Marco Storace, Mauro Parodi |
On the representation of static hysteresis curves by a PWL ladder circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 26(2), pp. 167-177, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
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25 | Nathalie Plaziac, Chon-Tam LeDinh, Jean-Pierre Adoul |
PWL nonlinear adaptive filter via RLS and NLMS algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 45(5), pp. 1364-1367, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
25 | Wenzhe Li, Ji-Nan Lin, Rolf Unbehauen |
On description of impulsive noise removal using PWL filter model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '97, Munich, Germany, April 21-24, 1997, pp. 2801-2804, 1997, IEEE Computer Society, 0-8186-7919-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
25 | Mauro Parodi, Marco Storace, Silvano Cincotti |
Static and dynamic hysteretic features in a PWL circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 24(2), pp. 183-199, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
25 | S. Ahmadi, Louiza Sellami, Robert W. Newcomb |
A CMOS PWL Fuzzy Membership Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30 - May 3, 1995, pp. 2321-2324, 1995, IEEE, 0-7803-2570-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
25 | Mauro Parodi, Marco Storace, Silvano Cincotti |
A PWL ladder circuit which exhibits hysteresis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 22(6), pp. 513-526, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
25 | Ji-Nan Lin, Rolf Unbehauen |
Canonical PWL network and multilayer perceptron-like networks: A unified view. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1993 IEEE International Symposium on Circuits and Systems, ISCAS 1993, Chicago, Illinois, USA, May 3-6, 1993, pp. 2588-2591, 1993, IEEE, 0-7803-1281-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP BibTeX RDF |
|
18 | Yigang He, Wenji Zhu |
Fault Diagnosis of Nonlinear Analog Circuits Using Neural Networks and Multi-Space Transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISNN (3) ![In: Advances in Neural Networks - ISNN 2009, 6th International Symposium on Neural Networks, ISNN 2009, Wuhan, China, May 26-29, 2009, Proceedings, Part III, pp. 714-723, 2009, Springer, 978-3-642-01512-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Bilinear Transformation, Space Transformation, Neural Network, Fault Diagnosis, Analog Circuits |
18 | Vladimir Havel, Karel K. Vlcek |
Computation of a nonlinear squashing function in digital neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008, pp. 18-21, 2008, IEEE Computer Society, 978-1-4244-2276-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Pavel Horsky |
LC Oscillator Driver for Safety Critical Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 159-164, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Jie Liu, Junan Lu, Xiaoqun Wu |
Dynamical analysis for the compound structure of Chen's system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICARCV ![In: 8th International Conference on Control, Automation, Robotics and Vision, ICARCV 2004, Kunming, China, 6-9 December 2004, Proceedings, pp. 2250-2253, 2004, IEEE, 0-7803-8653-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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18 | Jintae Kim, Jaeseo Lee, Lieven Vandenberghe |
Techniques for improving the accuracy of geometric-programming based analog circuit design optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 863-870, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Haihua Su, Sachin S. Sapatnekar, Sani R. Nassif |
Optimal decoupling capacitor sizing and placement for standard-cell layout designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(4), pp. 428-436, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Alicia Manthe, Zhao Li, C.-J. Richard Shi, Kartikeya Mayaram |
Symbolic Analysis of Nonlinear Analog Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 11108-11109, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Gianluca Giustolisi, Alessandro Rizzo |
CMOS implementation of an extended CNN cell to deal with complex dynamics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 761-764, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Haihua Su, Sachin S. Sapatnekar, Sani R. Nassif |
An algorithm for optimal decoupling capacitor sizing and placement for standard cell layouts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of 2002 International Symposium on Physical Design, ISPD 2002, Del Mar, CA, USA, April 7-10, 2002, pp. 68-73, 2002, ACM, 1-58113-460-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
adjoint sensitivity, optimization, placement, ASICs, decoupling capacitor, power grid noise |
18 | Premal Buch, Ernest S. Kuh |
SYMPHONY: A Fast Mixed Signal Simulator for BiMOS Analog/Digital Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 403-407, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|