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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 129 occurrences of 98 keywords
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Results
Found 144 publication records. Showing 144 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
75 | Pawel Gepner, David L. Fraser, Michal Filip Kowalik |
Second Generation Quad-Core Intel Xeon Processors Bring 45 nm Technology and a New Level of Performance to HPC Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCS (1) ![In: Computational Science - ICCS 2008, 8th International Conference, Kraków, Poland, June 23-25, 2008, Proceedings, Part I, pp. 417-426, 2008, Springer, 978-3-540-69383-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
quad-core processors, parallel processing, benchmarks, HPC, multi-core processors |
75 | Pawel Gepner, David L. Fraser, Michal Filip Kowalik |
Performance Evolution and Power Benefits of Cluster System Utilizing Quad-Core and Dual-Core Intel Xeon Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPAM ![In: Parallel Processing and Applied Mathematics, 7th International Conference, PPAM 2007, Gdansk, Poland, September 9-12, 2007, Revised Selected Papers, pp. 20-28, 2007, Springer, 978-3-540-68105-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
dual-core processors, quad-core processors, parallel processing, benchmarks, HPC, multi-core processors |
59 | Kevin J. Barker, Kei Davis, Adolfy Hoisie, Darren J. Kerbyson, Michael Lang 0003, Scott Pakin, José Carlos Sancho |
Experiences in scaling scientific applications on current-generation quad-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
57 | José Carlos Sancho, Darren J. Kerbyson |
Analysis of double buffering on two different multicore architectures: Quad-core Opteron and the Cell-BE. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-12, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
54 | Subhash Saini, Andrey Naraikin, Rupak Biswas, David Barkai, Timothy Sandstrom |
Early performance evaluation of a "Nehalem" cluster using scientific and engineering applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE Conference on High Performance Computing, SC 2009, November 14-20, 2009, Portland, Oregon, USA, 2009, ACM, 978-1-60558-744-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
42 | John C. Linford, Adrian Sandu |
Optimizing large scale chemical transport models for multicore platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SpringSim ![In: Proceedings of the 2008 Spring Simulation Multiconference, SpringSim 2008, Ottawa, Canada, April 14-17, 2008, pp. 369-376, 2008, SCS/ACM, 1-56555-319-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
IBM cell broadband engine, Intel quad-core xeon, time splitting, scalability, multicore, domain decomposition, chemical transport model |
39 | Sadaf R. Alam, Richard F. Barrett, Heike Jagode, Jeffery A. Kuehn, Stephen W. Poole, Ramanan Sankaran |
Impact of Quad-Core Cray XT4 System and Software Stack on Scientific Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2009 Parallel Processing, 15th International Euro-Par Conference, Delft, The Netherlands, August 25-28, 2009. Proceedings, pp. 334-344, 2009, Springer, 978-3-642-03868-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
37 | Pavan Yalamanchili, Sumod K. Mohan, Tarek M. Taha |
Implementing a hierarchical Bayesian visual cortex model on multi-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Southeast Regional Conference ![In: Proceedings of the 47th Annual Southeast Regional Conference, 2009, Clemson, South Carolina, USA, March 19-21, 2009, 2009, ACM, 978-1-60558-421-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
performance, measurement, experimentation |
36 | Rich Oehler |
Computer science - architecture - Re-inventing the x86 architecture: quad-core and beyond. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, November 11-17, 2006, Tampa, FL, USA, pp. 65, 2006, ACM Press, 0-7695-2700-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Viren Kumar, James P. Delgrande |
Optimal Multicore Scheduling: An Application of ASP Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LPNMR ![In: Logic Programming and Nonmonotonic Reasoning, 10th International Conference, LPNMR 2009, Potsdam, Germany, September 14-18, 2009. Proceedings, pp. 604-609, 2009, Springer, 978-3-642-04237-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
clingo, edge cover, scheduling, multicore, ASP |
34 | Huanyu Ge, Haikun Jia, Wei Deng 0001, Ruichang Ma, Zhihua Wang 0001, Baoyong Chi |
19.5 A 13.7-to-41.5GHz 214.1dBc/Hz FoMT Quad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 356-358, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
33 | Aamir Shafi, Jawad Manzoor |
Towards efficient shared memory communications in MPJ express. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-7, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
33 | William Lloyd Bircher, Lizy K. John |
Analysis of dynamic power management on multi-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 22nd Annual International Conference on Supercomputing, ICS 2008, Island of Kos, Greece, June 7-12, 2008, pp. 327-338, 2008, ACM, 978-1-60558-158-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
ACPI, performance, operating system, power management, multi-core |
31 | Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Rubén González 0001, Daniel A. Jiménez, Mateo Valero |
A Flexible Heterogeneous Multi-Core Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 13-24, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Qi Zhang, Yurong Chen 0001, Yimin Zhang 0002, Yinlong Xu |
SIFT implementation and optimization for multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Håkon Ording Bugge |
An evaluation of Intel's core i7 architecture using a comparative approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Sci. Res. Dev. ![In: Comput. Sci. Res. Dev. 23(3-4), pp. 203-209, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
SPEC MPI2007, Nehalem, iCore7, Harpertown, Quad-Core, QuickPath Interconnect, Moore’s Law, Benchmarking, Stream, Micro-benchmarks |
27 | Jungyul Pyo, Youngmin Shin, Hoi-Jin Lee, Sung-il Bae, Min-Su Kim, Kwangil Kim, Ken Shin, Yohan Kwon, Heungchul Oh, Jaeyoung Lim, Dong-Wook Lee, Jongho Lee, Inpyo Hong, Kyungkuk Chae, Heon-Hee Lee, Sung-Wook Lee, Seongho Song, Chunghee Kim, Jin-Soo Park, Heesoo Kim, Sunghee Yun, Ukrae Cho, Jae Cheol Son, Sungho Park |
23.1 20nm high-K metal-gate heterogeneous 64b quad-core CPUs and hexa-core GPU for high-performance and energy-efficient mobile application processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015, pp. 1-3, 2015, IEEE, 978-1-4799-6223-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
27 | Gregory M. Rose, Kalle Lyytinen |
The Quad-Core Model of Information Systems Innovation: Identifying and Confirming the Role of Novel Technological Frames as a Supra-Innovation Core - The Case of Internet Induced IT Innovation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIS ![In: Proceedings of the International Conference on Information Systems, ICIS 2001, December 16-19, 2001, New Orleans, Louisiana, USA, pp. 419-424, 2001, Association for Information Systems. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
24 | Ashley M. DeFlumere, Sadaf R. Alam |
Exploring multi-core limitations through comparison of contemporary systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Richard Tapia Celebration of Diversity in Computing Conference ![In: Proceedings of the Richard Tapia Celebration of Diversity in Computing Conference 2009: Intellect, Initiatives, Insight, and Innovations, Portland, Oregon, USA, April 1-4, 2009, pp. 75-80, 2009, ACM, 978-1-60558-217-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
performance evaluation and analysis, benchmarking, multi-core processor |
24 | Sadaf R. Alam, Pratul K. Agarwal, Scott S. Hampton, Hong Ong |
Experimental Evaluation of Molecular Dynamics Simulations on Multi-core Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2008, 15th International Conference, Bangalore, India, December 17-20, 2008. Proceedings, pp. 131-141, 2008, Springer, 978-3-540-89893-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Performance, Multicore, HPC, Molecular Dynamics Simulation |
24 | Inchoon Yeo, Chih Chun Liu, Eun Jung Kim 0001 |
Predictive dynamic thermal management for multicore systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 734-739, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
temperature |
24 | Pedro Chaparro, José González 0002, Grigorios Magklis, Qiong Cai, Antonio González 0001 |
Understanding the Thermal Implications of Multi-Core Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(8), pp. 1055-1065, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Activity Migration, Dynamic Voltage, Multi-Core Architectures, Frequency Scaling, Dynamic Thermal Management |
21 | Surendra Byna, Jiayuan Meng, Anand Raghunathan, Srimat T. Chakradhar, Srihari Cadambi |
Best-effort semantic document search on GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GPGPU ![In: Proceedings of 3rd Workshop on General Purpose Processing on Graphics Processing Units, GPGPU 2010, Pittsburgh, Pennsylvania, USA, March 14, 2010, pp. 86-93, 2010, ACM, 978-1-60558-935-0. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
best-effort computing, dependency relaxation, supervised semantic indexing, GPGPU, CUDA, document search |
21 | Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
Cache-aware partitioning of multi-dimensional iteration spaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SYSTOR ![In: Proceedings of of SYSTOR 2009: The Israeli Experimental Systems Conference 2009, Haifa, Israel, May 4-6, 2009, pp. 15, 2009, ACM, 978-1-60558-623-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
partitioning, parallel loops, iteration space |
21 | John C. Linford, John Michalakes, Manish Vachharajani, Adrian Sandu |
Multi-core acceleration of chemical kinetics for simulation and prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE Conference on High Performance Computing, SC 2009, November 14-20, 2009, Portland, Oregon, USA, 2009, ACM, 978-1-60558-744-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
chemical kinetics, kinetic preprocessor, open-MP, multi-core, cell broadband engine, NVIDIA CUDA, atmospheric modeling |
21 | Ralph K. Cavin III, James A. Hutchby, Victor V. Zhirnov, Joe E. Brewer, George Bourianoff |
Emerging Research Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 41(5), pp. 33-37, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
21 | Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
Cache-aware iteration space partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2008, Salt Lake City, UT, USA, February 20-23, 2008, pp. 269-270, 2008, ACM, 978-1-59593-795-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
load balancing, caches |
20 | Haikun Jia, Pingda Guan, Wei Deng 0001, Zhihua Wang 0001, Baoyong Chi |
A Low-Phase-Noise Quad-Core Millimeter-Wave Fundamental VCO Using Circular Triple-Coupled Transformer in 65-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(2), pp. 371-385, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Chao Li, Jinhua Guo, Pei Qin, Quan Xue |
A Wideband Mode-Switching Quad-Core VCO Using Compact Multi-Mode Magnetically Coupled LC Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(7), pp. 1959-1972, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Yaqian Sun, Wei Deng 0001, Haikun Jia, Yejun He, Zhihua Wang 0001, Baoyong Chi |
A Compact and Low Phase Noise Square-Geometry Quad-Core Class-F VCO Using Parallel Inductor-Sharing Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(10), pp. 2861-2873, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Pingda Guan, Haikun Jia, Wei Deng 0001, Ruichang Ma, Huabing Liao, Zhihua Wang 0001, Baoyong Chi |
A 25.0-to-35.9GHz Dual-Layer Quad-Core Dual-Mode VCO with 189.1dBc/Hz FoM and 200.2dBc/Hz FoMT at 1MHz Offset in 65nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2023, San Antonio, TX, USA, April 23-26, 2023, pp. 1-2, 2023, IEEE, 979-8-3503-9948-6. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Xiangxun Zhan, Jun Yin 0001, Pui-In Mak, Rui Paulo Martins |
A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid- State Circuits Conference, ISSCC 2023, San Francisco, CA, USA, February 19-23, 2023, pp. 148-149, 2023, IEEE, 978-1-6654-9016-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Sriram Balamurali, Giovanni Mangraviti, Cheng-Hsueh Tsai, Piet Wambacq, Jan Craninckx |
Design and Analysis of 55-63-GHz Fundamental Quad-Core VCO With NMOS-Only Stacked Oscillator in 28-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 57(7), pp. 1997-2010, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Satyam Shukla, Kailash Chandra Ray |
A Low-Overhead Reconfigurable RISC-V Quad-Core Processor Architecture for Fault-Tolerant Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 10, pp. 44136-44146, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Yiyang Shu, Huizhen Jenny Qian, Xun Luo |
A 2-D Mode-Switching Quad-Core Oscillator Using E-M Mixed-Coupling Resonance Boosting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(6), pp. 1711-1721, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Shuxin Ming, Jin Zhou 0001 |
A 19 GHz Circular-Geometry Quad-Core Tail-Filtering Class-F VCO with -115 dBc/Hz Phase Noise at 1 MHz Offset in 65-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021, pp. 303-306, 2021, IEEE, 978-1-6654-3751-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Sriram Balamurali, Giovanni Mangraviti, Cheng-Hsueh Tsai, Piet Wambacq, Jan Craninckx |
A 55-63 GHz fundamental Quad-Core VCO with NMOS-only stacked oscillator in 28 nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021, pp. 295-298, 2021, IEEE, 978-1-6654-3751-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Haikun Jia, Wei Deng 0001, Pingda Guan, Zhihua Wang 0001, Baoyong Chi |
A 60GHz 186.5dBc/Hz FoM Quad-Core Fundamental VCO Using Circular Triple-Coupled Transformer with No Mode Ambiguity in 65nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 298-300, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Hemanth Prabhu, Liang Liu 0002, Farhana Sheikh, Ove Edfors |
A 1070 pJ/b 169 Mb/s Quad-core Digital Baseband SoC for Distributed and Cooperative Massive MIMO in 28 nm FD-SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, pp. 1-2, 2021, IEEE, 978-4-86348-780-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Javad Bagherzadeh, Vishishtha Bothra, Disha Gujar, Sugandha Gupta, Jinal Shah |
Quad-Core RSA Processor with Countermeasure Against Power Analysis Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2009.03468, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
20 | Anirban Chakraborty 0004, Ayan Banerjee 0003 |
Modular and parallel VLSI architecture of multi-dimensional quad-core GA co-processor for real time image/video processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 65, pp. 180-195, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Charlotte Frenkel, Jean-Didier Legat, David Bol |
MorphIC: A 65-nm 738k-Synapse/mm2 Quad-Core Binary-Weight Digital Neuromorphic Processor With Stochastic Spike-Driven Online Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Biomed. Circuits Syst. ![In: IEEE Trans. Biomed. Circuits Syst. 13(5), pp. 999-1010, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Charlotte Frenkel, Jean-Didier Legat, David Bol |
MorphIC: A 65-nm 738k-Synapse/mm2 Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1904.08513, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
20 | Charlotte Frenkel, Jean-Didier Legat, David Bol |
A 65-nm 738k-Synapse/mm2 Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | David Murphy, Hooman Darabi |
A 27-GHz Quad-Core CMOS Oscillator With No Mode Ambiguity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 53(11), pp. 3208-3216, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Yatao Peng, Jun Yin 0001, Pui-In Mak, Rui Paulo Martins |
Low-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 53(11), pp. 3232-3242, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | J. Rimmelspacher, Robert Weigel, Amelie Hagelauer, Vadim Issakov |
A Quad-Core 60 GHz Push-Push 45 nm SOI CMOS VCO with -101.7 dBc/Hz Phase Noise at 1 MHz offset, 19 % Continuous FTR and -187 dBc/Hz FoMT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, Germany, September 3-6, 2018, pp. 138-141, 2018, IEEE, 978-1-5386-5404-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Fabio Padovan, Fabio Quadrelli, Matteo Bassi, Marc Tiebout, Andrea Bevilacqua |
A quad-core 15GHz BiCMOS VCO with -124dBc/Hz phase noise at 1MHz offset, -189dBc/Hz FOM, and robust to multimode concurrent oscillations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018, pp. 376-378, 2018, IEEE, 978-1-5090-4940-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Andreas de Blanche, Thomas Lundqvist |
Disallowing Same-program Co-schedules to Improve Efficiency in Quad-core Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COSH/VisorHPC@HiPEAC ![In: Proceedings of the Joined Workshops COSH 2017 and VisorHPC 2017, COSH/VisorHPC@HiPEAC 2017, Stockholm, Sweden, January 24, 2017., pp. 13-20, 2017, TUM Library, 978-3-00-055564-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Benjamin Schwaller, Barath Ramesh, Alan D. George |
Investigating TI KeyStone II and quad-core ARM Cortex-A53 architectures for on-board space processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPEC ![In: 2017 IEEE High Performance Extreme Computing Conference, HPEC 2017, Waltham, MA, USA, September 12-14, 2017, pp. 1-7, 2017, IEEE, 978-1-5386-3472-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Abdurrachman Mappuji, Nazrul Effendy, Muhamad Mustaghfirin, Fandy Sondok, Rara Priska Yuniar, Sheptiani Putri Pangesti |
Study of Raspberry Pi 2 Quad-core Cortex A7 CPU Cluster as a Mini Supercomputer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1612.07128, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
20 | Qian Liang, Jinhui Wang, Peiyuan Wan, Ligang Hou, Na Gong |
DCPG: Double-control power gating technique for a 28 nm Cortex™-A9 MPCore Quad-core processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8483-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Alice Wang, Tsung-Yao Lin, Shichin Ouyang, Wei-Hung Huang, Jidong Wang, Shu-Hsin Chang, Sheng-Ping Chen, Chun-Hsiung Hu, J. C. Tai, Koan-Sin Tan, Meng-Nan Tsou, Ming-Hsien Lee, Gordon Gammie, Chi-Wei Yang, Chih-Chieh Yang, Yeh-Chi Chou, Shih-Hung Lin, Wuan Kuo, Chi-Jui Chung, Lee-Kee Yong, Chia-Wei Wang, Kin Hooi Dia, Cheng-Hsing Chien, You-Ming Tsao, N. K. Singh, Rolf Lagerquist, Chih-Cheng Chen, Uming Ko |
10.3 heterogeneous multi-processing quad-core CPU and dual-GPU design for optimal performance, power, and thermal tradeoffs in a 28nm mobile application processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2014 IEEE International Conference on Solid-State Circuits Conference, ISSCC 2014, Digest of Technical Papers, San Francisco, CA, USA, February 9-13, 2014, pp. 180-181, 2014, IEEE, 978-1-4799-0918-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Se-Hyun Yang, Jungyul Pyo, Youngmin Shin, Jae Cheol Son |
A 1.6 GHz quad-core application processor manufactured in 32 nm high-k metal gate process for smart mobile devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Commun. Mag. ![In: IEEE Commun. Mag. 51(4), pp. 94-98, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Roswan Ismail, Nor Asilah Wati Abdul Hamid, Mohamed Othman, Rohaya Latip |
Performance Analysis of Message Passing Interface Collective Communication on Intel Xeon Quad-Core Gigabit Ethernet and InfiniBand Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. ![In: J. Comput. Sci. 9(4), pp. 455-462, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Shuai Wang, Jun Han 0003, Yang Li, Yifan Bo, Xiaoyang Zeng |
A 920MHz quad-core cryptography processor accelerating parallel task processing of public-key algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, CICC 2013, San Jose, CA, USA, September 22-25, 2013, pp. 1-4, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Youngmin Shin, Ken Shin, Prashant Kenkare, Rajesh Kashyap, Hoi-Jin Lee, Dongjoo Seo, Brian Millar, Yohan Kwon, Ravi Iyengar, Min-Su Kim, Ahsan Chowdhury, Sung-il Bae, Inpyo Hong, Wookyeong Jeong, Aaron Lindner, Ukrae Cho, Keith Hawkins, Jae-Cheol Son, Seung Ho Hwang |
28nm high- metal-gate heterogeneous quad-core CPUs for high-performance and energy-efficient mobile application processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2013, San Francisco, CA, USA, February 17-21, 2013, pp. 154-155, 2013, IEEE, 978-1-4673-4515-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Minsoo Kim, Joon Ho Song, Do Hyung Kim 0002, Shihwa Lee |
Hybrid partitioned H.264 full high definition decoder on embedded quad-core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 58(3), pp. 1038-1044, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
20 | Minsoo Kim, Joon Ho Song, Do Hyung Kim 0002, Shihwa Lee |
Hybrid partitioned H.264 full high definition decoder on embedded quad-core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE ![In: IEEE International Conference on Consumer Electronics, ICCE 2012, Las Vegas, NV, USA, January 13-16, 2012, pp. 279-280, 2012, IEEE, 978-1-4577-0230-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
20 | Xiaojing Yin, Yongxin Zhu 0001, Liang Xia, Jingwei Ye, Tian Huang, Yuzhuo Fu, Meikang Qiu |
Efficient Implementation of Thermal-Aware Scheduler on a Quad-core Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TrustCom ![In: IEEE 10th International Conference on Trust, Security and Privacy in Computing and Communications, TrustCom 2011, Changsha, China, 16-18 November, 2011, pp. 1076-1082, 2011, IEEE Computer Society, 978-1-4577-2135-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
20 | Qiuming Luo, Chang Kong, Ye Cai, Gang Liu 0028 |
Performance Evaluation of OpenMP Constructs and Kernel Benchmarks on a Loongson-3A Quad-Core SMP System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDCAT ![In: 12th International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2011, Gwangju, Korea, October 20-22, 2011, pp. 191-196, 2011, IEEE Computer Society, 978-0-7695-4564-6. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
20 | Bao-Xia Fan, Liang Yang, Jiang-Mei Wang, Ru Wang, Bin Xiao 0006, Ying Xu, Dong Liu, Ji-Ye Zhao |
Physical Implementation of the 1GHz Godson-3 Quad-Core Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 25(2), pp. 192-199, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
20 | Hiroki Noguchi, Junichi Tani, Yusuke Shimai, Masanori Nishino, Shintaro Izumi, Hiroshi Kawaguchi 0001, Masahiko Yoshimoto |
A 34.7-mW quad-core MIQP solver processor for robot control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2010, San Jose, California, USA, 19-22 September, 2010, Proceedings, pp. 1-4, 2010, IEEE, 978-1-4244-5758-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
20 | Blaine A. Stackhouse, Sal Bhimji, Chris Bostak, Dave Bradley, Brian S. Cherkauer, Jayen Desai, Erin Francom, Mike Gowan, Paul E. Gronowski, Dan Krueger, Charles Morganti, Steve Troyer |
A 65 nm 2-Billion Transistor Quad-Core Itanium Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 44(1), pp. 18-31, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
20 | Kedarnath J. Balakrishnan, Grady Giles, James Wingfield |
Test Access Mechanism in the Quad-Core AMD Opteron Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 26(1), pp. 52-59, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
20 | Mingze Bai, Yusheng Dou, Hong Tang, Shixin Sun |
Performance of LAMMPS Code on Intel Quad-Core Xeon. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NPC ![In: NPC 2009, Sixth IFIP International Conference on Network and Parallel Computing, Gold Coast, Australia, October 19-21, 2009, pp. 156-160, 2009, IEEE Computer Society, 978-0-7695-3837-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Performance LAMMPS multi-core |
20 | Binu P. John, Pradeep S. Nair, Eugene John, Fred W. Hudson |
Performance Measurement of Single, Dual and Quad Core Machines Using SPEC CPU2006. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDES ![In: Proceedings of the 2009 International Conference on Computer Design, CDES 2009, July 13-16, 2009, Las Vegas Nevada, USA, pp. 143-149, 2009, CSREA Press, 1-60132-096-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
20 | Andrew Allen, Jay Desai, Frank Verdico, Ferd Anderson, David Mulvihill, Dan Krueger |
Dynamic frequency-switching clock system on a quad-core Itanium® processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2009, Digest of Technical Papers, San Francisco, CA, USA, 8-12 February, 2009, pp. 62-63, 2009, IEEE, 978-1-4244-3458-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
20 | Pawel Gepner, David L. Fraser, Michal Filip Kowalik |
Evaluating Performance of New Quad-Core Intel®Xeon®5500 Family Processors for HPC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPAM (1) ![In: Parallel Processing and Applied Mathematics, 8th International Conference, PPAM 2009, Wroclaw, Poland, September 13-16, 2009. Revised Selected Papers, Part I, pp. 1-10, 2009, Springer, 978-3-642-14389-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
20 | Kevin J. Barker, Kei Davis, Adolfy Hoisie, Darren J. Kerbyson, Michael Lang 0003, Scott Pakin, José Carlos Sancho |
A Performance Evaluation of the Nehalem Quad-Core Processor for Scientific Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Parallel Process. Lett. ![In: Parallel Process. Lett. 18(4), pp. 453-469, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Blaine A. Stackhouse, Brian S. Cherkauer, Michael K. Gowan, Paul E. Gronowski, Chris Lyles |
A 65nm 2-Billion-Transistor Quad-Core Itanium® Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008, pp. 92-93, 2008, IEEE, 978-1-4244-2010-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Dan Krueger, Erin Francom, Jack Langsdorf |
Circuit Design for Voltage Scaling and SER Immunity on a Quad-Core Itanium® Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008, pp. 94-95, 2008, IEEE, 978-1-4244-2010-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Jie Chen 0010, William A. Watson III |
Software Barrier Performance on Dual Quad-Core Opterons. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NAS ![In: Proceedings of The 2008 IEEE International Conference on Networking, Architecture, and Storage, NAS 2008, June 12-14, 2008, Chongqing, China, pp. 303-309, 2008, IEEE Computer Society, 978-0-7695-3187-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Abdul Waheed, Jianxun Jason Ding, Jingnan Yao, Laxmi N. Bhuyan |
Performance Characterization of a Dual Quad-Core Based Application Oriented Networking System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NAS ![In: Proceedings of The 2008 IEEE International Conference on Networking, Architecture, and Storage, NAS 2008, June 12-14, 2008, Chongqing, China, pp. 295-302, 2008, IEEE Computer Society, 978-0-7695-3187-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Tim Wood 0001, Grady Giles, Chris Kiszely, Martin Schuessler, Daniela Toneva, Joel Irby, Michael Mateja |
The Test Features of the Quad-Core AMD Opteron- Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2008 IEEE International Test Conference, ITC 2008, Santa Clara, California, USA, October 26-31, 2008, pp. 1-10, 2008, IEEE Computer Society, 978-1-4244-2403-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Georgi I. Radulov, Patrick J. Quinn, Hans Hegt, Arthur H. M. van Roermund |
A flexible 12-bit self-calibrated quad-core current-steering DAC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008, pp. 25-28, 2008, IEEE, 978-1-4244-2342-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | J. Dorsey, S. Searles, Michael Ciraula, S. Johnson, N. Bujanos, D. Wu, M. Braganza, S. Meyers, E. Fang, R. Kumar |
An Integrated Quad-Core Opteron Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007, pp. 102-103, 2007, IEEE, 1-4244-0853-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Wei Li, Daniel Blakely, Scott Van Sooy, Keven Dunn, David Kidd, Robert Rogenmoser, Dian Zhou |
LVS verification across multiple power domains for a quad-core microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(2), pp. 490-500, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
LVS, multi-core microprocessor, physical verification |
19 | Michela Becchi, Surendra Byna, Srihari Cadambi, Srimat T. Chakradhar |
Data-aware scheduling of legacy kernels on heterogeneous platforms with distributed memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2010: Proceedings of the 22nd Annual ACM Symposium on Parallelism in Algorithms and Architectures, Thira, Santorini, Greece, June 13-15, 2010, pp. 82-91, 2010, ACM, 978-1-4503-0079-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
accelerators, distributed memory, multi-core processors, runtime, heterogeneous platforms |
19 | Sander van der Maar, Kees Joost Batenburg, Jan Sijbers |
Experiences with Cell-BE and GPU for Tomography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings, pp. 298-307, 2009, Springer, 978-3-642-03137-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Pascal Vezolle, Stéphane Vialle, Xavier Warin |
Large scale experiment and optimization of a distributed stochastic control algorithm. Application to energy management problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-8, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Vikas Aggarwal, Yogish Sabharwal, Rahul Garg 0001, Philip Heidelberger |
HPCC Random Access benchmark for next generation supercomputers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-11, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Georgios Tournavitis, Zheng Wang 0001, Björn Franke, Michael F. P. O'Boyle |
Towards a holistic approach to auto-parallelization: integrating profile-driven parallelism detection and machine-learning based mapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 2009 ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2009, Dublin, Ireland, June 15-21, 2009, pp. 177-187, 2009, ACM, 978-1-60558-392-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
auto-parallelization, machine-learning based parallelism mapping, profile-driven parallelism detection, openmp |
19 | Noriko Takagi, Hiroshi Sasaki 0001, Masaaki Kondo, Hiroshi Nakamura |
Cooperative shared resource access control for low-power chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009, pp. 177-182, 2009, ACM, 978-1-60558-684-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
low power, chip multiprocessors, cache partitioning, dvfs, resource conflict |
19 | Rogelio Serrano, Juan J. Tapia, Oscar Montiel, Roberto Sepúlveda, Patricia Melin |
High Performance Parallel Programming of a GA Using Multi-core Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Soft Computing for Hybrid Intelligent Systems ![In: Soft Computing for Hybrid Intelligent Systems, pp. 307-314, 2008, Springer, 978-3-540-70811-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Qian Diao, Justin J. Song |
Prediction of CPU idle-busy activity pattern. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 16-20 February 2008, Salt Lake City, UT, USA, pp. 27-36, 2008, IEEE Computer Society, 978-1-4244-2070-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Lei Li 0005, Wenjie Fu, Fan Guo 0006, Todd C. Mowry, Christos Faloutsos |
Cut-and-stitch: efficient parallel learning of linear dynamical systems on smps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KDD ![In: Proceedings of the 14th ACM SIGKDD International Conference on Knowledge Discovery and Data Mining, Las Vegas, Nevada, USA, August 24-27, 2008, pp. 471-479, 2008, ACM, 978-1-60558-193-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
optimization, Kalman Filters, multi-core, OpenMP, Expectation Maximization (EM), linear dynamical systems |
19 | Subhash Saini, Dale Talcott, Dennis C. Jespersen, M. Jahed Djomehri, Haoqiang Jin, Rupak Biswas |
Scientific application-based performance comparison of SGI Altix 4700, IBM POWER5+, and SGI ICE 8200 supercomputers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE Conference on High Performance Computing, SC 2008, November 15-21, 2008, Austin, Texas, USA, pp. 7, 2008, IEEE/ACM, 978-1-4244-2835-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Andrew A. Chien |
Pervasive parallel computing: an historic opportunity for innovation in programming and architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 12th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2007, San Jose, California, USA, March 14-17, 2007, pp. 160, 2007, ACM, 978-1-59593-602-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Jilong Kuang, Laxmi N. Bhuyan |
LATA: a latency and throughput-aware packet processing system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 36-41, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multicore architecture, packet processing, parallel-pipelining |
16 | Moinuddin K. Qureshi |
Adaptive Spill-Receive for robust high-performance caching in CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 14-18 February 2009, Raleigh, North Carolina, USA, pp. 45-54, 2009, IEEE Computer Society, 978-1-4244-2932-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Philipp Kegel, Maraike Schellmann, Sergei Gorlatch |
Using OpenMP vs. Threading Building Blocks for Medical Imaging on Multi-cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2009 Parallel Processing, 15th International Euro-Par Conference, Delft, The Netherlands, August 25-28, 2009. Proceedings, pp. 654-665, 2009, Springer, 978-3-642-03868-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Philip J. Vardon, Ioana Banicescu, Peter John Cleall, Hywel R. Thomas, Roger N. Philp |
Coupled thermo-hydro-mechanical modelling: A new parallel approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-9, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Babak Salamat, Todd Jackson, Andreas Gal, Michael Franz |
Orchestra: intrusion detection using parallel execution and monitoring of program variants in user-space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroSys ![In: Proceedings of the 2009 EuroSys Conference, Nuremberg, Germany, April 1-3, 2009, pp. 33-46, 2009, ACM, 978-1-60558-482-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
multi-variant execution, intrusion detection, vulnerability, multi-core processors, process monitoring |
16 | Matthew Curtis-Maury, Ankur Shah, Filip Blagojevic, Dimitrios S. Nikolopoulos, Bronis R. de Supinski, Martin Schulz 0001 |
Prediction models for multi-dimensional power-performance optimization on many cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008, Toronto, Ontario, Canada, October 25-29, 2008, pp. 250-259, 2008, ACM, 978-1-60558-282-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
dynamic concurrency throttling |
16 | Bingsheng He, Wenbin Fang, Qiong Luo 0001, Naga K. Govindaraju, Tuyong Wang |
Mars: a MapReduce framework on graphics processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008, Toronto, Ontario, Canada, October 25-29, 2008, pp. 260-269, 2008, ACM, 978-1-60558-282-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
GPGPU, MapReduce, data parallelism, graphics processor, multi-core processors, web analysis |
16 | John E. Savage, Mohammad Zubair |
A unified model for multicore architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFMT ![In: Proceedings of the 1st international forum on Next-generation multicore/manycore technologies, IFMT 2008, Cairo, Egypt, November 24-25, 2008, pp. 9, 2008, ACM, 978-1-60558-407-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multicore, memory hierarchy |
16 | Benjamin C. Lee, Jamison D. Collins, Hong Wang 0003, David M. Brooks |
CPR: Composable performance regression for scalable multiprocessor models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), November 8-12, 2008, Lake Como, Italy, pp. 270-281, 2008, IEEE Computer Society, 978-1-4244-2836-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Duo Li, Sheldon X.-D. Tan, Murli Tirumala |
Architecture-level thermal behavioral characterization for multi-core microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 456-461, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Fan Zhang 0092, Gang Wang 0001, Xiaoguang Liu 0001, Guangyi Sun, Xin Zhao, Jing Liu 0010, Guizhang Lu |
An Improved Parallel Implementation of 3-D DRIE Simulation on Multi-core Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: 10th IEEE International Conference on High Performance Computing and Communications, HPCC 2008, 25-27 Sept. 2008, Dalian, China, pp. 891-896, 2008, IEEE Computer Society, 978-0-7695-3352-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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