Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
131 | Neil Kettle, Andy King, Tadeusz Strzemecki |
Widening ROBDDs with Prime Implicants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for the Construction and Analysis of Systems, 12th International Conference, TACAS 2006 Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2006, Vienna, Austria, March 25 - April 2, 2006, Proceedings, pp. 105-119, 2006, Springer, 3-540-33056-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
ROBDD, widening, approximation, abstract interpretation |
130 | Rajeev Murgai, Jawahar Jain, Masahiro Fujita |
Efficient Scheduling Techniques for ROBDD Construction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India, pp. 394-401, 1999, IEEE Computer Society, 0-7695-0013-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
97 | Mehdi Mohammadi, Hossein Pazhoumand-dar, Mohsen Soryani, Hossein Moeinzadeh |
HS-ROBDD: an efficient variable order binary decision diagram. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO (Companion) ![In: Genetic and Evolutionary Computation Conference, GECCO 2009, Proceedings, Montreal, Québec, Canada, July 8-12, 2009, Companion Material, pp. 2115-2118, 2009, ACM, 978-1-60558-505-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
binary decision diagram (bdd) |
97 | Michael Langberg, Amir Pnueli, Yoav Rodeh |
The ROBDD Size of Simple CNF Formulas. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHARME ![In: Correct Hardware Design and Verification Methods, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings, pp. 363-377, 2003, Springer, 3-540-20363-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
75 | Maxim Teslenko, Andrés Martinelli, Elena Dubrova |
Bound-Set Preserving ROBDD Variable Orderings May Not Be Optimum. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(2), pp. 236-237, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
ROBDD, bound set, variable ordering |
68 | Karl S. Brace, Richard L. Rudell, Randal E. Bryant |
Efficient Implementation of a BDD Package. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 40-45, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
63 | Amit Narayan, Adrian J. Isles, Jawahar Jain, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
Reachability analysis using partitioned-ROBDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 388-393, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
ROBDD, Verification, Partitioning, Reachability, FSM, Symbolic, Sequential, Traversal |
63 | Christoph Scholl 0001, S. Melchior, Günter Hotz, Paul Molitor |
Minimizing ROBDD sizes of incompletely specified Boolean functionsby exploiting strong symmetries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: European Design and Test Conference, ED&TC '97, Paris, France, 17-20 March 1997, pp. 229-234, 1997, IEEE Computer Society, 0-8186-7786-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
51 | Sharon Van Schaick, Kenneth B. Kent |
Analysis of Variable Reordering on the QMDD Representation of Quantum Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany, pp. 347-352, 2007, IEEE Computer Society, 0-7695-2978-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
51 | Heraldo Maciel França Madeira, Junior Barrera |
Incremental Evaluation of BDD-Represented Set Operators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIBGRAPI ![In: 13th Brazilian Symposium on Computer Graphics and Image Processing (SIBGRAPI 2000), 17-20 October 2000, Gramado (RS), Brazil, pp. 308-315, 2000, IEEE Computer Society, 0-7695-0878-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
translation invariant operators, locally defined set operators, 2D discrete W-operators, 3D discrete W-operators, reduced ordered binary decision diagram, equivalence proof, mathematical morphology, mathematical morphology, formal language, vocabulary, morphological operators |
51 | Amit Narayon |
Recent Advances in BDD Based Representations for Boolean Functions: A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India, pp. 408-, 1999, IEEE Computer Society, 0-7695-0013-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
46 | Amit Narayan, Sunil P. Khatri, Jawahar Jain, Masahiro Fujita, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
A study of composition schemes for mixed apply/compose based construction of ROBDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 249-253, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
mixed apply/compose based construction, ROBDD, reduced ordered binary decision diagram, time-memory tradeoff, graph theory, composition, decomposition, heuristic algorithm, circuit CAD, circuit CAD, network synthesis, top down method, bottom up method |
34 | Wes Masri |
Exploiting the empirical characteristics of program dependences for improved forward computation of dynamic slices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Empir. Softw. Eng. ![In: Empir. Softw. Eng. 13(4), pp. 369-399, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Forward computation, Program analysis, Program debugging, Memoization, Dynamic slicing, Program dependence |
34 | Liudong Xing |
An Efficient Binary-Decision-Diagram-Based Approach for Network Reliability and Sensitivity Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Syst. Man Cybern. Part A ![In: IEEE Trans. Syst. Man Cybern. Part A 38(1), pp. 105-115, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri |
A Structured ASIC Design Approach Using Pass Transistor Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1787-1790, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Sang-Young Cho, Minna Lee, Yoojin Chung |
A Microcanonical Optimization Algorithm for BDD Minimization Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEA/AIE ![In: New Trends in Applied Artificial Intelligence, 20th International Conference on Industrial, Engineering and Other Applications of Applied Intelligent Systems, IEA/AIE 2007, Kyoto, Japan, June 26-29, 2007, Proceedings, pp. 992-1001, 2007, Springer, 978-3-540-73322-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Neil Kettle, Andy King |
An anytime symmetry detection algorithm for ROBDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 243-248, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Akhilesh Shrestha, Liudong Xing, Hong Liu 0019 |
Infrastructure Communication Reliability of Wireless Sensor Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DASC ![In: Second International Symposium on Dependable Autonomic and Secure Computing (DASC 2006), 29 September - 1 October 2006, Indianapolis, Indiana, USA, pp. 250-257, 2006, IEEE Computer Society, 0-7695-2539-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Xiangyu Zhang 0001, Rajiv Gupta 0001, Youtao Zhang |
Efficient Forward Computation of Dynamic Slices Using Reduced Ordered Binary Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE ![In: 26th International Conference on Software Engineering (ICSE 2004), 23-28 May 2004, Edinburgh, United Kingdom, pp. 502-511, 2004, IEEE Computer Society, 0-7695-2163-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Doru P. Munteanu, Víctor Suñé, Rosa Rodríguez-Montañés, Juan A. Carrasco |
A Combinatorial Method for the Evaluation of Yield of Fault-Tolerant Systems-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2003 International Conference on Dependable Systems and Networks (DSN 2003), 22-25 June 2003, San Francisco, CA, USA, Proceedings, pp. 563-572, 2003, IEEE Computer Society, 0-7695-1952-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Vladimir Zolotov, Rajendran Panda, Chanhee Oh |
False-Noise Analysis Using Resolution Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 3rd International Symposium on Quality of Electronic Design, ISQED 2002, San Jose, CA, USA, March 18-21, 2002, pp. 437-442, 2002, IEEE Computer Society, 0-7695-1561-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
34 | Christoph Scholl 0001, Bernd Becker 0001, Andreas Brogle |
The multiple variable order problem for binary decision diagrams: theory and practical application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 85-90, 2001, ACM, 0-7803-6634-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
34 | Christoph Scholl 0001, Dirk Möller, Paul Molitor, Rolf Drechsler |
BDD minimization using symmetries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(2), pp. 81-100, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Toral Shah, Anzhela Yu. Matrosova, Masahiro Fujita, Virendra Singh |
Multiple Stuck-at Fault Testability Analysis of ROBDD Based Combinational Circuit Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 34(1), pp. 53-65, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
29 | Toral Shah, Anzhela Yu. Matrosova, Virendra Singh |
Test pattern generation to detect multiple faults in ROBDD based combinational circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 23rd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2017, Thessaloniki, Greece, July 3-5, 2017, pp. 211-212, 2017, IEEE, 978-1-5386-0352-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
29 | Toral Shah, Anzhela Yu. Matrosova, Binod Kumar 0001, Masahiro Fujita, Virendra Singh |
Testing multiple stuck-at faults of ROBDD based combinational circuit design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 18th IEEE Latin American Test Symposium, LATS 2017, Bogotá, Colombia, March 13-15, 2017, pp. 1-6, 2017, IEEE, 978-1-5386-0415-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
29 | Akram Kalaee, Vahid Rafe |
An Optimal Solution for Test Case Generation Using ROBDD Graph and PSO Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Qual. Reliab. Eng. Int. ![In: Qual. Reliab. Eng. Int. 32(7), pp. 2263-2279, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
29 | Toral Shah, Virendra Singh, Anzhela Yu. Matrosova |
ROBDD based path delay fault testable combinational circuit synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: 2016 IEEE East-West Design & Test Symposium, EWDTS 2016, Yerevan, Armenia, October 14-17, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-5090-0693-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
29 | Tongdian Wang, Huibing Zhao, Linfu Zhu |
Satisfiability verification of engineering data safety rules of balise based on ROBDD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITSC ![In: 19th IEEE International Conference on Intelligent Transportation Systems, ITSC 2016, Rio de Janeiro, Brazil, November 1-4, 2016, pp. 2386-2391, 2016, IEEE, 978-1-5090-1889-5. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
29 | Masahiko Sakai, Hidetomo Nabeshima |
Construction of an ROBDD for a PB-Constraint in Band Form and Related Techniques for PB-Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 98-D(6), pp. 1121-1127, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Anzhela Yu. Matrosova, Eugeniy Mitrofanov, Toral Shah |
Multiple stuck-at fault testability of a combinational circuit derived by covering ROBDD nodes by Invert-And-Or sub-circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: 2015 IEEE East-West Design & Test Symposium, EWDTS 2015, Batumi, Georgia, September 26-29, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4673-7776-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Yi-Hang Chen, Yang Chen, Juinn-Dar Huang |
ROBDD-based area minimization synthesis for reconfigurable single-electron transistor arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-DAT ![In: VLSI Design, Automation and Test, VLSI-DAT 2015, Hsinchu, Taiwan, April 27-29, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-6275-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Toral Shah, Anzhela Yu. Matrosova, Virendra Singh |
PDF testability of a combinational circuit derived by covering ROBDD nodes using Invert-And-Or circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VDAT ![In: 19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015, pp. 1-2, 2015, IEEE Computer Society, 978-1-4799-1743-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Alexey Ignatiev, Alexander A. Semenov |
DPLL+ROBDD Derivation Applied to Inversion of Some Cryptographic Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2011 - 14th International Conference, SAT 2011, Ann Arbor, MI, USA, June 19-22, 2011. Proceedings, pp. 76-89, 2011, Springer, 978-3-642-21580-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
29 | Ondrej Lhoták, Stephen Curial, José Nelson Amaral |
An Optimal Encoding to Represent a Single Set in an ROBDD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 59(4), pp. 574-575, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
set representation, Binary decision diagram, binary encoding |
29 | Juan A. Carrasco, Víctor Suñé |
An ROBDD-Based Combinatorial Method for the Evaluation of Yield of Defect-Tolerant Systems-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 17(2), pp. 207-220, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Neil Kettle |
Anytime algorithms for ROBDD symmetry detection and approximation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2008 |
RDF |
|
29 | Anjela Yu. Matrosova, Ekaterina Loukovnikova, Sergei Ostanin, Alexandra Zinchuk, Ekaterina Nikolaeva |
Test Generation for Single and Multiple Stuck-at Faults of a Combinational Circuit Designed by Covering Shared ROBDD with CLBs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 26-28 September 2007, Rome, Italy., pp. 206-214, 2007, IEEE Computer Society, 0-7695-2885-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Mohamed Raseen, P. W. Chandana Prasad, Ali Assi 0001 |
An efficient estimation of the ROBDD's complexity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 39(3), pp. 211-228, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Ulf Milanese |
Zur Implementierung eines ROBDD-basierten Systems für die Manipulation und Visualisierung von Relationen. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2003 |
RDF |
|
29 | Barbara Leoniuk |
ROBDD-basierte Implementierung von Relationen und relationalen Operationen mit Anwendungen. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2001 |
RDF |
|
29 | Roberto Bagnara, Peter Schachte |
Factorizing Equivalent Variable Pairs in ROBDD-Based Implementations of Pos. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPIA-GULP-PRODE ![In: 1998 Joint Conference on Declarative Programming, APPIA-GULP-PRODE'98, A Coruña, Spain, July 20-23, 1998, pp. 227-240, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP BibTeX RDF |
|
29 | Roberto Bagnara, Peter Schachte |
Factorizing Equivalent Variable Pairs in ROBDD-Based Implementations of Pos. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AMAST ![In: Algebraic Methodology and Software Technology, 7th International Conference, AMAST '98, Amazonia, Brasil, January 4-8, 1999, Proceedings, pp. 471-485, 1998, Springer, 3-540-65462-3. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
29 | Jawahar Jain, Amit Narayan, C. Coelho 0001, Sunil P. Khatri, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton, Masahiro Fujita |
Decomposition Techniques for Efficient ROBDD Construction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, First International Conference, FMCAD '96, Palo Alto, California, USA, November 6-8, 1996, Proceedings, pp. 419-434, 1996, Springer, 3-540-61937-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
29 | Shih-Chieh Chang, David Ihsin Cheng, Malgorzata Marek-Sadowska |
Minimizing ROBDD Size of Incompletely Specified Multiple Output Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDAC-ETC-EUROASIC ![In: EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28 - March 3, 1994, Paris, France, pp. 620-624, 1994, IEEE Computer Society, 0-8186-5410-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
29 | Pi-Yu Chung, Ibrahim N. Hajj, Janak H. Patel |
Efficient Variable Ordering Heuristics for Shared ROBDD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1993 IEEE International Symposium on Circuits and Systems, ISCAS 1993, Chicago, Illinois, USA, May 3-6, 1993, pp. 1690-1693, 1993, IEEE, 0-7803-1281-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP BibTeX RDF |
|
17 | Jenny Leung, Jozsef Dudas, Glenn H. Chapman, Israel Koren, Zahava Koren |
Quantitative Analysis of In-Field Defects in Image Sensor Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 26-28 September 2007, Rome, Italy., pp. 526-534, 2007, IEEE Computer Society, 0-7695-2885-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Chunjie Duan, Kanupriya Gulati, Sunil P. Khatri |
Memory-based crosstalk canceling CODECs for on-chip buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Jaco van de Pol, Olga Tveretina |
A BDD-Representation for the Logic of Equality and Uninterpreted Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: Mathematical Foundations of Computer Science 2005, 30th International Symposium, MFCS 2005, Gdansk, Poland, August 29 - September 2, 2005, Proceedings, pp. 769-780, 2005, Springer, 3-540-28702-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Liudong Xing, Akhilesh Shrestha |
Distributed Computer Systems Reliability Considering Imperfect Coverage and Common-Cause Failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS (2) ![In: 11th International Conference on Parallel and Distributed Systems, ICPADS 2005, Fuduoka, Japan, July 20-22, 2005, pp. 453-457, 2005, IEEE Computer Society, 0-7695-2281-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Kameshwar Chandrasekar, Michael S. Hsiao |
Forward image computation with backtracing ATPG and incremental state-set construction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 254-259, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
model checking, ATPG, image computation, ZBDDs |
17 | Herng-Jer Lee, Ming-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng |
Applications of tree/link partitioning for moment computations of general lumped RLC networks with resistor loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 713-716, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Peter Hawkins, Vitaly Lagoon, Peter J. Stuckey |
Set Bounds and (Split) Set Domain Propagation Using ROBDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Australian Conference on Artificial Intelligence ![In: AI 2004: Advances in Artificial Intelligence, 17th Australian Joint Conference on Artificial Intelligence, Cairns, Australia, December 4-6, 2004, Proceedings, pp. 706-717, 2004, Springer, 3-540-24059-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | P. W. Chandana Prasad, M. Maria Dominic, Ashutosh Kumar Singh |
Improved Variable Ordering for ROBDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICADL ![In: Digital Libraries: Technology and Management of Indigenous Knowledge for Global Access, 6th International Conference on Asian Digital Libraries, ICADL 2003, Kuala Lumpur, Malaysia, December 8-12, 2003, Proceedings, pp. 544-547, 2003, Springer, 3-540-20608-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Shinobu Nagayama, Tsutomu Sasao |
Compact Representations of Logic Functions using Heterogeneous MDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 16-19 May 2003, Tokyo, Japan, pp. 247-252, 2003, IEEE Computer Society, 0-7695-1918-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Vladimir Zolotov |
False-noise analysis using logic implications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 7(3), pp. 474-498, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
circuit logic, VLSI (very large scale integration), noise analysis |
17 | Vitaly Lagoon, Peter J. Stuckey |
Precise pair-sharing analysis of logic programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPDP ![In: Proceedings of the 4th international ACM SIGPLAN conference on Principles and practice of declarative programming, October 6-8, 2002, Pittsburgh, PA, USA (Affiliated with PLI 2002), pp. 99-108, 2002, ACM. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
program analysis, sharing |
17 | Alfonso San Miguel Aguirre, Moshe Y. Vardi |
Random 3-SAT and BDDs: The Plot Thickens Further. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CP ![In: Principles and Practice of Constraint Programming - CP 2001, 7th International Conference, CP 2001, Paphos, Cyprus, November 26 - December 1, 2001, Proceedings, pp. 121-136, 2001, Springer, 3-540-42863-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Sofiène Tahar, Xiaoyu Song, Eduard Cerny, Zijian Zhou 0001, Michel Langevin, Otmane Aït Mohamed |
Modeling and formal verification of the Fairisle ATM switch fabricusing MDGs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(7), pp. 956-972, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Pankaj Chauhan, Pallab Dasgupta, P. P. Chakrabarti 0001 |
Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India, pp. 324-, 1999, IEEE Computer Society, 0-7695-0013-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | D. Michael Miller |
An improved method for computing a generalized spectral coefficient. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(3), pp. 233-238, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Roberto Bagnara |
A Reactive Implementation of Pos Using ROBDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLILP ![In: Programming Languages: Implementations, Logics, and Programs, 8th International Symposium, PLILP'96, Aachen, Germany, September 24-27, 1996, Proceedings, pp. 107-121, 1996, Springer, 3-540-61756-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Amit Narayan, Jawahar Jain, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli |
Partitioned ROBDDs - a compact, canonical and efficiently manipulable representation for Boolean functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 547-554, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Boolean space, Partitioned ROBDDs, complex industrial circuits, manipulable representation, reduced ordered binary decision diagrams, Boolean functions |
17 | Michel Langevin, Sofiène Tahar, Zijian Zhou 0001, Xiaoyu Song, Eduard Cerny |
Behavioral Verification of an ATM Switch Fabric using Implicit Abstract State Enumeration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 20-26, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Dennis Dams, Rob Gerth, Gert Döhmen, Ronald Herrmann, Peter Kelb, Hergen Pargmann |
Model Checking Using Adaptive State and Data Abstraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 6th International Conference, CAV '94, Stanford, California, USA, June 21-23, 1994, Proceedings, pp. 455-467, 1994, Springer, 3-540-58179-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
ACTL, state partitioning, model checking, abstract interpretation, binary decision diagrams (BDDs) |
17 | Pranav Ashar, Matthew Cheong |
Efficient breadth-first manipulation of binary decision diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 1994, pp. 622-627, 1994, IEEE Computer Society / ACM, 0-89791-690-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
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