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Publication types (Num. hits)
article(7338) book(22) data(1) incollection(68) inproceedings(13188) phdthesis(411) proceedings(73)
Venues (Conferences, Journals, ...)
CoRR(917) FPL(904) ReConFig(900) ARC(699) ACM Trans. Reconfigurable Tech...(505) ReCoSoC(411) IEEE Access(378) FCCM(372) ERSA(343) IPDPS(303) ISCAS(285) Int. J. Reconfigurable Comput.(268) DATE(253) IEEE Trans. Very Large Scale I...(225) FPT(222) FPGA(200) More (+10 of total 2266)
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Found 21101 publication records. Showing 21101 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
77Lars Bauer, Muhammad Shafique 0001, Jörg Henkel MinDeg: a performance-guided replacement policy for run-time reconfigurable accelerators. Search on Bibsonomy CODES+ISSS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF extensible embedded processor, reconfigurable computing, kernel, accelerator, replacement, run-time adaptation
66Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen Reconfigurable Discrete Wavelet Transform Processor for Heterogeneous Reconfigurable Multimedia Systems. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF heterogeneous reconfigurable multimedia systems, energy efficiency, reconfigurable computing, discrete wavelet transform, lifting scheme
63Fengbin Qi, Xianyi Zhang, Shanshan Wang, Xingquan Mao RCC: A New Programming Language for Reconfigurable Computing. Search on Bibsonomy HPCC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
63Ronald Scrofano, Viktor K. Prasanna A Performance model for accelerating scientific applications on reconfigurable computers. Search on Bibsonomy FPGA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
61Mahmood Fazlali, Mohammad K. Fallah, Mahdy Zolghadr, Ali Zakerolhosseini A New Datapath Merging Method for Reconfigurable System. Search on Bibsonomy ARC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Datapath Merging, Maximum Weighted Clique Algorithm, High Level Synthesis, Reconfigurable Computing
54Mounir Hamdi, J. Tong, C. W. Kin Fast sorting algorithms on reconfigurable array of processors with optical buses. Search on Bibsonomy ICPADS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF reconfigurable array of processors, optical buses, parallel algorithms, parallel architectures, sorting, reconfigurable architectures, optical interconnections, system buses, sorting algorithms, reconfigurable array, reconfigurable arrays, parallel sorting algorithm
54Katherine Compton, Scott Hauck Reconfigurable computing: a survey of systems and software. Search on Bibsonomy ACM Comput. Surv. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF field-programmable, manual design, FPGA, reconfigurable computing, reconfigurable architectures, reconfigurable systems, Automatic design
54Francisco Barat, Rudy Lauwereins Reconfigurable Instruction Set Processors: A Survey. Search on Bibsonomy IEEE International Workshop on Rapid System Prototyping The full citation details ... 2000 DBLP  DOI  BibTeX  RDF dynamically reconfigurable instruction set processor, reconfigurable functional unit, application specific instructions, reconfigurable computing
54Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi CODA-R: a reconfigurable testbed for real-time parallel computation. Search on Bibsonomy RTCSA The full citation details ... 1997 DBLP  DOI  BibTeX  RDF CODA-R, reconfigurable testbed, real-time parallel computation, reconfigurable field programmable gate arrays, total execution time, prototype reconfigurable real-time parallel system, real-time parallel architecture, field programmable gate arrays, real-time system, processing elements, computing engine
54Francisco Barat, Rudy Lauwereins, Geert Deconinck Reconfigurable Instruction Set Processors from a Hardware/Software Perspective. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Reconfigurable instruction set processor overview, compiler, microprocessor, reconfigurable logic
54Ronald Scrofano, Maya B. Gokhale, Frans Trouw, Viktor K. Prasanna Accelerating Molecular Dynamics Simulations with Reconfigurable Computers. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Physics, Reconfigurable hardware, Distributed architectures, Chemistry
54Ali Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich Task scheduling for heterogeneous reconfigurable computers. Search on Bibsonomy SBCCI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF hardware preemption, scheduling, FPGA, placement, reconfigurable computing, partial reconfiguration
50Pao-Ann Hsiung, Chao-Sheng Lin, Chih-Feng Liao Perfecto: A systemc-based design-space exploration framework for dynamically reconfigurable architectures. Search on Bibsonomy ACM Trans. Reconfigurable Technol. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF scheduling, performance evaluation, partitioning, placement, design-space exploration, Reconfigurable systems
49Kang Sun, Jun Zheng, Yuanyuan Li, Xuezeng Pan Design of a Simulator for Mesh-Based Reconfigurable Architectures. Search on Bibsonomy NPC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF simulator, reconfigurable computing, dynamic reconfiguration, reconfigurable mesh
49Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis Partitioning Methodology for Heterogeneous Reconfigurable Functional Units. Search on Bibsonomy J. Supercomput. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF heterogeneous reconfigurable architectures, coarse-grain reconfigurable hardware, scheduling, FPGA, partitioning, performance improvements
49Mauricio Ayala-Rincón, Carlos H. Llanos, Ricardo P. Jacobi, Reiner W. Hartenstein Prototyping time- and space-efficient computations of algebraic operations over dynamically reconfigurable systems modeled by rewriting-logic. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Term Rewriting Systems (TRS), algebraic manipulation, dynamically reconfigurable systems, Fast Fourier Transform (FFT), reconfigurable computing, systolic arrays, rewriting-logic
49Ali Akoglu, Aravind Dasu, Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan Pattern Recognition Tool to Detect Reconfigurable Patterns in MPEG4 Video Processing. Search on Bibsonomy IPDPS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF reconfigurable media processor, recurring pattern analyzer, mobile multimedia processing, partition, dynamic reconfiguration, reconfigurable architectures, data flow graph, control flow graph, MPEG4, hardware software co-design, hardware software partitioning, routing architecture
49Hartej Singh, Ming-Hau Lee, Guangming Lu, Fadi J. Kurdahi, Nader Bagherzadeh, Eliseu M. Chaves Filho MorphoSys: An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive Applications. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2000 DBLP  DOI  BibTeX  RDF reconfigurable cell array, bit-correlation, dynamic reconfiguration, Single Instruction Multiple Data, multimedia applications, video compression, MPEG-2, Reconfigurable systems, data encryption, target recognition
49Jinguo Liu, Yuechao Wang, Bin Li 0001, Shugen Ma, Dalong Tan Center-configuration selection technique for the reconfigurable modular robot. Search on Bibsonomy Sci. China Ser. F Inf. Sci. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF center-configuration, configuration network, reconfiguration cost matrix, center-configuration coefficient, modular robot, reconfigurable robot
49Giovanni Agosta, Francesco Bruschi, Marco D. Santambrogio, Donatella Sciuto A Data Oriented Approach to the Design of Reconfigurable Stream Decoders. Search on Bibsonomy ESTIMedia The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
47Richard B. Kujoth, Chi-Wei Wang, Derek B. Gottlieb, Jeffrey J. Cook, Nicholas P. Carter A reconfigurable unit for a clustered programmable-reconfigurable processor. Search on Bibsonomy FPGA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF FPGA, technology scaling, reconfigurable processor
45Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis The Molen compiler for reconfigurable processors. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF FPGA, reconfigurable computing, Instruction scheduling
45I-Hsuan Huang, Chih-Chun Wang, Shih-Min Chu, Cheng-Zen Yang Function-Level Multitasking Interface Design in an Embedded Operating System with Reconfigurable Hardware. Search on Bibsonomy EUC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF hardware function, FPGA-based computer, ?C/OS, Reconfigurable computing, multitasking
45Carl Ebeling, Chris Fisher, Guanbin Xing, Manyuan Shen, Hui Liu 0011 Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Data communications devices, application studies resulting in better multiple-processor systems, reconfigurable hardware, wireless systems, special-purpose and application-based systems, adaptable architectures, heterogeneous (hybrid) systems, design studies, signal processing systems
45Nicolas Ventroux, Stéphane Chevobbe, Frédéric Blanc 0001, Thierry Collette An Auto-adaptative Reconfigurable Architecture for the Control. Search on Bibsonomy Asia-Pacific Computer Systems Architecture Conference The full citation details ... 2004 DBLP  DOI  BibTeX  RDF adaptative reconfigurable architecture, control parallelism, dynamic reconfiguration
45Francisco Barat, Murali Jayapala, Pieter Op de Beeck, Geert Deconinck Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors. Search on Bibsonomy ASP-DAC/VLSI Design The full citation details ... 2002 DBLP  DOI  BibTeX  RDF coarse grained logic, code generation, software pipelining, vliw, reconfigurable processor, spatial computation
45Alan A. Bertossi, Alessandro Mei A Residue Number System on Reconfigurable Mesh with Applications to Prefix Sums and Approximate String Matching. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF string matching with $k$ mismatches, VLSI, residue number system, reconfigurable mesh, prefix sums, Number representation
44Jochen Strunk, Toni Volkmer, Klaus Stephan, Wolfgang Rehm, Heiko Schick Impact of run-time reconfiguration on design and speed - A case study based on a grid of run-time reconfigurable modules inside a FPGA. Search on Bibsonomy IPDPS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
44Li-Hsun Chen, Oscal T.-C. Chen, Ruey-Ling Ma A high-efficiency reconfigurable digital signal processor for multimedia computing. Search on Bibsonomy ISCAS (2) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
41Shih-Lien Lu, Peter Yiannacouras, Taeweon Suh, Rolf Kassa, Michael Konow A Desktop Computer with a Reconfigurable Pentium®. Search on Bibsonomy ACM Trans. Reconfigurable Technol. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Pentium®, simulator, model, FPGA, architecture, operating system, reconfigurable, emulator, exploration, accelerator, processor
40Saad AlKasabi, Salim Hariri Performance analysis of a high-speed dynamically reconfigurable LAN. Search on Bibsonomy LCN The full citation details ... 1995 DBLP  DOI  BibTeX  RDF dynamically reconfigurable LAN, reconfigurable switch, highspeed multi-link ring local area network, switch reconfigurability, multi-link ring network, M/M/n, M/D/n, virtual channel occupancy probabilities, infinite state Markov model, finite state Markov model, OPNET tool, packet transfer time, virtual channel flow, performance evaluation, field programmable gate arrays, performance analysis, local area networks, reconfigurable architectures, wormhole routing, network performance, queuing systems, interconnection topologies, system throughput
40Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis Compiler assisted architectural exploration for coarse grained reconfigurable arrays. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF coarse-grained reconfigurable arrays, reconfigurable computing, modulo scheduling, architectural exploration
40David R. Martinez, Tyler J. Moeller, Ken Teitelbaum Application of Reconfigurable Computing to a High Performance Front-End Radar Signal Processor. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF VLSI rader signal processor, front end high performance filtering, digital filtering mapped to reconfigurable computing, commercial FPGA hardware, reconfigurable hardware
40Akihiro Matsuura, Akira Nagoya Summation Algorithms on Constrained Reconfigurable Meshes. Search on Bibsonomy ISPAN The full citation details ... 1999 DBLP  DOI  BibTeX  RDF constrained reconfigurable mesh, Bit summation, parallel algorithm, reconfigurable mesh
40Koji Nakano, Stephan Olariu An Efficient Algorithm for Row Minima Computations on Basic Reconfigurable Meshes. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF Monotone matrices, totally monotone matrices, row minima, basic reconfigurable meshes, cellular system design, VLSI design, search problems, reconfigurable meshes, facility location problems
40Lizyamma Kurian, Daniel Brewer, Eugene John Design of a highly reconfigurable interconnect for array processors. Search on Bibsonomy VLSI Design The full citation details ... 1995 DBLP  DOI  BibTeX  RDF reconfigurable interconnect, static-RAM programming technology, faulty elements, fault-tolerance, parallel architectures, fault tolerant computing, multiprocessor interconnection networks, network topology, reconfigurable architectures, array processors, interconnection topologies, mesh topologies
40Kuen-Cheng Chiang, Zhi-Wei Chen, Jean Jyh-Jiun Shann Design and implementation of a reconfigurable hardware for secure embedded systems. Search on Bibsonomy AsiaCCS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF secured embedded system, AES, RSA, reconfigurable architecture, DES, processing element
40Ronald Scrofano, Viktor K. Prasanna Molecular dynamics - Preliminary investigation of advanced electrostatics in molecular dynamics on reconfigurable computers. Search on Bibsonomy SC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF FPGA, reconfigurable, molecular dynamics, electrostatics
40Russell Tessier, Wayne P. Burleson Reconfigurable Computing for Digital Signal Processing: A Survey. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF FPGA, survey, reconfigurable computing, signal processing
40Venkatavasu Bokka, Himabindu Gurla, Stephan Olariu, James L. Schwing Constant-Time Algorithms for Constrained Triangulations on Reconfigurable Meshes. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF Computer-aided manufacturing, constrained triangulations, constant time algorithms, robotics, CAD, VLSI design, reconfigurable meshes, computer-aided geometric design
40Tatsuya Hayashi, Koji Nakano, Stephan Olariu An O((log log n)2) Time Algorithm to Compute the Convex Hull of Sorted Points on Reconfigurable Meshes. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF pattern recognition, mobile computing, image processing, Convex hulls, morphology, reconfigurable meshes
40Ittetsu Taniguchi, Kyoko Ueda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai Task Partitioning Oriented Architecture Exploration Method for Dynamic Reconfigurable Architectures. Search on Bibsonomy VLSI-SoC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
40Wesley Peck, Erik K. Anderson, Jason Agron, Jim Stevens, Fabrice Baijot, David Andrews 0001 Hthreads: A Computational Model for Reconfigurable Devices. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
40Wenyin Fu, Katherine Compton A Simulation Platform for Reconfigurable Computing Research. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
40Wenyin Fu, Katherine Compton An Execution Environment for Reconfigurable Computing. Search on Bibsonomy FCCM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
40Christian Haubelt Design Space Exploration for Distributed Hardware Reconfigurable Systems. Search on Bibsonomy FPL The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
38Reiner W. Hartenstein, Jürgen Becker 0001, Michael Herz, Rainer Kress 0002, Ulrich Nageldinger A Synthesis System For Bus-Based Wavefront Array Architectures. Search on Bibsonomy ASAP The full citation details ... 1996 DBLP  DOI  BibTeX  RDF synthesis system, bus-based wavefront array architectures, datapath synthesis system, reconfigurable datapath architecture, internal data bus, automatic mapping, datapath units, high speed datapaths, parallel architectures, rapid prototyping, reconfigurable architectures, software prototyping, fine grained parallelism, data manipulations
37Vikas Aggarwal, Alan D. George, Kishore Yalamanchili, Changil Yoon, Herman Lam, Greg Stitt Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+. Search on Bibsonomy HPRCTA@SC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF parallel programming, programming language, reconfigurable computing, productivity, portability, programming model
37Katarzyna Leijten-Nowak, Jef L. van Meerbergen Embedded Reconfigurable Logic Core for DSP Applications. Search on Bibsonomy FPL The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
37Eylon Caspi, Michael Chu, Randy Huang, Joseph Yeh, John Wawrzynek, André DeHon Stream Computations Organized for Reconfigurable Execution (SCORE). Search on Bibsonomy FPL The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
37David Robinson, Patrick Lysaght Verification of Dynamically Reconfigurable Logic. Search on Bibsonomy FPL The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
36Esam El-Araby, Iván González 0004, Tarek A. El-Ghazawi Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing. Search on Bibsonomy ACM Trans. Reconfigurable Technol. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF field programmable gate arrays (FPGA), High performance computing, reconfigurable computing, dynamic partial reconfiguration
35Swarup Bhunia, Massood Tabib-Azar, Daniel G. Saab Ultralow-Power Reconfigurable Computing with Complementary Nano-Electromechanical Carbon Nanotube Switches. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF reconfigurable instant-on system, ultralow-power reconfigurable computing, complementary nanoelectromechanical carbon nanotube switches, coplanar carbon nanotubes, low operation voltages, built-in energy storage, CNEMS, stable on-off state, latching mechanism, nonvolatile memory-mode operation, CMOS transistors, system development, leakage current
35Grigoris Dimitroulakos, Michalis D. Galanis, Nikos Kostaras, Costas E. Goutis A unified evaluation framework for coarse grained reconfigurable array architectures. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2007 DBLP  DOI  BibTeX  RDF coarse-grained reconfigurable arrays, reconfigurable romputing, Modulo scheduling, architectural exploration
35Zhining Huang, Sharad Malik, Nahri Moreano, Guido Araujo The design of dynamically reconfigurable datapath coprocessors. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF coarse-grain reconfigurable fabric, reconfigurable datapath, Loop pipelining, interconnection design, datapath synthesis
35Hossam A. ElGindy, Lachlan Wetherall A simple Voronoi diagram algorithm for a reconfigurable mesh. Search on Bibsonomy IPPS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF Voronoi diagram algorithm, planar points, worst case running, communication diameter, scheduling, load balancing, computational geometry, reconfigurable architectures, reconfigurable mesh
35Andreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild Reconfigurable Processing Units vs. Reconfigurable Interconnects. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
35Minghui Wang, Shugen Ma, Bin Li 0001, Yuechao Wang Configuration representation and reconfiguration optimization for the reconfigurable robots with independent manipulation. Search on Bibsonomy Sci. China Ser. F Inf. Sci. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF reconfigurable robots with independent manipulation, configuration representation, reconfiguration optimization
35Like Yan, Gang Wang, Tianzhou Chen The input-aware dynamic adaptation of area and performance for reconfigurable accelerator. Search on Bibsonomy FPGA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF dynamic adaption, reconfigurable system, loop unrolling, loop accelerator
35Jinguo Liu, Shugen Ma, Yuechao Wang, Bin Li 0001 Network-based reconfiguration routes for a self-reconfigurable robot. Search on Bibsonomy Sci. China Ser. F Inf. Sci. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF reconfiguration route, network-based reconfiguration, configuration network, modular robot, self-reconfigurable robot
35Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi Compiling custom instructions onto expression-grained reconfigurable architectures. Search on Bibsonomy CASES The full citation details ... 2008 DBLP  DOI  BibTeX  RDF horizontal microprogramming, compilers, instruction set extensions, coarse-grained reconfigurable architectures, data-flow architectures
35Valeri Kirischian, Vadim Geurkov, Lev Kirischian A multi-mode video-stream processor with cyclically reconfigurable architecture. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2008 DBLP  DOI  BibTeX  RDF cost-performance ratio, video-stream processor, FPGA, computer architecture, reconfigurable computing, dynamic reconfiguration, pre-fetching, temporal partitioning
35Ling Zhuo, Viktor K. Prasanna Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF computations on matrices, field-programmable gate arrays, parallel algorithms, Scientific computing, reconfigurable hardware
35Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun, Shiva Navab, Kang L. Wang The spin-wave nanoscale reconfigurable mesh and the labeling problem. Search on Bibsonomy ACM J. Emerg. Technol. Comput. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF nanoscale architectures, image processing, reconfigurable mesh, Spin waves
35Esben Hallundbæk Østergaard, Kristian Kassow, Richard A. Beck, Henrik Hautop Lund Design of the ATRON lattice-based self-reconfigurable robot. Search on Bibsonomy Auton. Robots The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Design, Robotics, Morphology, Mechanics, Self-reconfigurable
35Wei Xu, Shigang Wang, An-Lin Wang, Guobao Wang Towards an Efficient Self-organizing Reconfiguration Method for Self-reconfigurable Robots. Search on Bibsonomy J. Intell. Robotic Syst. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF descriptive model, metamorphic rules, self-organizing, modular robots, self-reconfigurable robots
35Yuki Yamagata, Kenichi Ichino, Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki, Masayuki Satoh, Hiroyuki Itabashi, Takashi Murai, Nobuyuki Otsuka Implementation of Memory Tester Consisting of SRAM-Based Reconfigurable Cells. Search on Bibsonomy Asian Test Symposium The full citation details ... 2003 DBLP  DOI  BibTeX  RDF SRAM test, SRAM-based reconfigurable cell, memory tester, marching test
35Holger Blume, Hans-Martin Blüthgen, Christiane Henning, Patrick Osterloh, Tobias G. Noll Embedding of Dedicated High-Performance ASICs into Reconfigurable Systems Providing Additional Multimedia Functionality. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF heterogeneous reconfigurable systems, dedicated ASICs, coprocessor board, CardBus, multimedia applications, text search
35Venkatavasu Bokka, Koji Nakano, Stephan Olariu, James L. Schwing, Larry Wilson Optimal Algorithms for the Multiple Query Problem on Reconfigurable Meshes, with Applications. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF pattern recognition, parallel algorithms, image processing, robotics, Query processing, computational geometry, database design, morphology, reconfigurable mesh
35Alan A. Bertossi, Alessandro Mei Constant Time Dynamic Programming on Directed Reconfigurable Networks. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF directed links, VLSI, dynamic programming, shortest paths, Reconfigurable architectures, longest common subsequence
35Ronald D. Williams, Brian D. Kuebert Reconfigurable Pipelines in VLIW Execution Units. Search on Bibsonomy FCCM The full citation details ... 1999 DBLP  DOI  BibTeX  RDF very long instruction word, pipelines, reconfigurable computing
35Stephan Olariu, James L. Schwing, Jingyuan Zhang Efficient Image Computations on Reconfigurable Meshes. Search on Bibsonomy CONPAR The full citation details ... 1992 DBLP  DOI  BibTeX  RDF bus systems, computer vision, image processing, segmentation, robotics, convex hull, reconfigurable meshes, area, perimeter, component labeling
35Daniele Piazza, John Kountouriotis, Michele d'Amico, Kapil R. Dandekar A technique for antenna configuration selection for reconfigurable circular patch arrays. Search on Bibsonomy IEEE Trans. Wirel. Commun. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
35Alfred Grau, Hamid Jafarkhani, Franco De Flaviis A reconfigurable multiple-input multiple-output communication system. Search on Bibsonomy IEEE Trans. Wirel. Commun. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
35Guy Gogniat, Tilman Wolf, Wayne P. Burleson, Jean-Philippe Diguet, Lilian Bossuet, Romain Vaslin Reconfigurable Hardware for High-Security/ High-Performance Embedded Systems: The SAFES Perspective. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
35Mateus B. Rutzig, Antonio Carlos Schneider Beck, Luigi Carro Balancing reconfigurable data path resources according to application requirements. Search on Bibsonomy IPDPS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
35Kehuai Wu, Jan Madsen COSMOS: A System-Level Modelling and Simulation Framework for Coprocessor-Coupled Reconfigurable Systems. Search on Bibsonomy ICSAMOS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
35Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform. Search on Bibsonomy PATMOS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
35Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic. Search on Bibsonomy IPDPS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Ronald Scrofano, Maya B. Gokhale, Frans Trouw, Viktor K. Prasanna Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers. Search on Bibsonomy FCCM The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Yeong-Kang Lai, Lien-Fei Chen, Jian-Chou Chen, Chun-Wei Chiu A two-way SIMD-based reconfigurable computing architecture for multimedia applications. Search on Bibsonomy ISCAS (5) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Jonathan E. Luntz, James R. Moyne, Dawn M. Tilbury On-line control reconfiguration at the machine and cell levels: case studies from the reconfigurable factory testbed. Search on Bibsonomy ETFA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Jens Braunes, Steffen Köhler, Rainer G. Spallek RECAST: An Evaluation Framework for Coarse-Grain Reconfigurable Architectures. Search on Bibsonomy ARCS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
35Marisa Llorens, Javier Oliver 0001 Introducing Structural Dynamic Changes in Petri Nets: Marked-Controlled Reconfigurable Nets. Search on Bibsonomy ATVA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
35Juanjo Noguera, Rosa M. Badia HW/SW codesign techniques for dynamically reconfigurable architectures. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
35Bharat P. Dave CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems. Search on Bibsonomy DATE The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
34Christos-Savvas Bouganis, Sung-Boem Park, George A. Constantinides, Peter Y. K. Cheung Synthesis and Optimization of 2D Filter Designs for Heterogeneous FPGAs. Search on Bibsonomy ACM Trans. Reconfigurable Technol. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF 2D filter design, FPGA, Singular Value Decomposition, reconfigurable logic
33José M. García 0001, A. Flores A Novel Approach to Improve the Performance of Interconnection Networks with Hot - Spots. Search on Bibsonomy EUROMICRO The full citation details ... 1996 DBLP  DOI  BibTeX  RDF physically distributed memory, single shared memory address space, two-dimensional k-ary n-cube networks, deterministic routing algorithm, interconnection networks, congestion control, message passing, multiprocessor interconnection networks, parallel machines, shared memory multiprocessors, wormhole routing, virtual channels, adaptive algorithms, performance improvement, hot-spots, reconfigurable networks, reconfigurable network
33Imran Ahmed, Cheran M. Vithanage Dynamic reconfiguration approach for high speed turbo decoding using circular rings. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF channel decoding, contention free, custom reconfigurable, parallel turbo, qpp, map, domain specific, vlsi
33Chenxin Zhang, Thomas Lenart, Henrik Svensson, Viktor Öwall Design of Coarse-Grained Dynamically Reconfigurable Architecture for DSP Applications. Search on Bibsonomy ReConFig The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Dynamically reconfigurable cell array, Hybrid interconnect, FFT, Coarse-grained reconfigurable architecture
32Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner 0001, Jürgen Becker 0001 FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing. Search on Bibsonomy ARC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF design assurance, bitstream debugging, security, FPGA, Reconfigurable Computing, design verification, EDA tools
32Adriano Idalgo, Nahri Moreano DNA Physical Mapping on a Reconfigurable Platform. Search on Bibsonomy ARC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Consecutive ones problem, Software/hardware partitioning, Reconfigurable architectures
32Kazuo Sakiyama, Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems. Search on Bibsonomy ARC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF RSA, Elliptic Curve Cryptography (ECC), Public-Key Cryptography (PKC), Reconfigurable architecture, FPGA implementation
31Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak Techniques for Design and Implementation of Secure Reconfigurable PUFs. Search on Bibsonomy ACM Trans. Reconfigurable Technol. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF process variation, Reconfigurable systems, hardware security, physically unclonable functions
31John Sachs Beeckler, Warren J. Gross Particle graphics on reconfigurable hardware. Search on Bibsonomy ACM Trans. Reconfigurable Technol. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF FPGAs, Reconfigurable computing, particle systems, special-purpose architectures
31Patrick Schaumont, Alex K. Jones, Steve Trimberger Guest Editors' Introduction to Security in Reconfigurable Systems Design. Search on Bibsonomy ACM Trans. Reconfigurable Technol. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Trojan, Trustworthy design, side-channel resistant design, physically unclonable function
31Laïd Kahloul, Allaoua Chaoui Code mobility modeling: a temporal labeled reconfigurable nets. Search on Bibsonomy MOBILWARE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF formal tools, labeled reconfigurable nets, temporal labeled reconfigurable nets, code mobility, design paradigms
31Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture. Search on Bibsonomy J. Supercomput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Coarse-grained reconfigurable arrays, Data bandwidth bottleneck, Reconfigurable computing, Data reuse, Compiler techniques
31Sakir Sezer, Ciaran Toal, Emi Garcia, Victoria Stewart A Reconfigurable Tag Computation Architecture for Terabit Packet Scheduling. Search on Bibsonomy IPDPS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF reconfigurable packet scheduling, SCFQ, Reconfigurable architectures, WFQ, network processing
31Manfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan Reconfigurable platforms for ubiquitous computing. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2004 DBLP  DOI  BibTeX  RDF ubiquitous computing, communication, networks-on-chip, reconfiguration, reconfigurable hardware, dynamic power management, reconfigurable processors
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