Search results for "SIMT"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
167	Michael Shebanow	Pervasive massively multithreaded GPU processors.	Conf. Computing Frontiers	2009	DBLP DOI BibTeX RDF	SIMT, parallel processing, GPU, CUDA
100	Jay L. T. Cornwall, Lee W. Howes, Paul H. J. Kelly, Phil Parsonage, Bruno Nicoletti	High-performance SIMT code generation in an active visual effects library.	Conf. Computing Frontiers	2009	DBLP DOI BibTeX RDF	SIMT, gpu, visual effects
71	Zhuo Feng, Peng Li 0001	Multigrid on GPU: tackling power grid analysis on parallel SIMT platforms.	ICCAD	2008	DBLP DOI BibTeX RDF
69	Jie Tao 0001, Martin Schulz 0001, Wolfgang Karl	A Simulation Tool for Evaluating Shared Memory Systems.	Annual Simulation Symposium	2003	DBLP DOI BibTeX RDF
52	Timo Aila, Samuli Laine	Understanding the efficiency of ray traversal on GPUs.	High Performance Graphics	2009	DBLP DOI BibTeX RDF	SIMT, ray tracing, SIMD
48	Jie Tao 0001, Martin Schulz 0001, Wolfgang Karl	SIMT/OMP: A Toolset to Study and Exploit Memory Locality of OpenMP Applications on NUMA Architectures.	WOMPAT	2004	DBLP DOI BibTeX RDF
48	Maximilian Teltzrow, Sören Preibusch, Bettina Berendt	SIMT -- A Privacy Preserving Web Metrics Tool.	CEC	2004	DBLP DOI BibTeX RDF
46	Weihang Zhu	A study of parallel evolution strategy: pattern search on a GPU computing platform.	GEC Summit	2009	DBLP DOI BibTeX RDF	evolutionary computations, GPU, evolution strategy, pattern search
46	Anders Nilsson 0001, Dake Liu	Area Efficient Fully Programmable Baseband Processors.	SAMOS	2007	DBLP DOI BibTeX RDF
29	Erik Lindholm, John Nickolls, Stuart F. Oberman, John Montrym	NVIDIA Tesla: A Unified Graphics and Computing Architecture.	IEEE Micro	2008	DBLP DOI BibTeX RDF	SIMT, unified graphics and parallel computing architecture, cooperative thread array, GPU, graphics processing unit, SIMD, parallel processor, Tesla, Hot Chips 19
25	Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie 0008	MPU: Memory-centric SIMT Processor via In-DRAM Near-bank Computing.	ACM Trans. Archit. Code Optim.	2023	DBLP DOI BibTeX RDF
25	Wenlong Zhao 0011, Wu Wang, Qiao Wang	Optimization of cosmological N-body simulation with FMM-PM on SIMT accelerators.	J. Supercomput.	2022	DBLP DOI BibTeX RDF
25	Anirban Ghose, Soumyajit Dey	FGFS: Feature Guided Frontier Scheduling for SIMT DAGs.	J. Supercomput.	2022	DBLP DOI BibTeX RDF
25	Xiaoqing Guo, Jie Liu 0044, Tongliang Liu, Yixuan Yuan	SimT: Handling Open-set Noise for Domain Adaptive Semantic Segmentation.	CoRR	2022	DBLP DOI BibTeX RDF
25	Stephen Nicholas Swatman, Ana Lucia Varbanescu, Attila Krasznahorkay, Andy D. Pimentel	Modelling Performance Loss due to Thread Imbalance in Stochastic Variable-Length SIMT Workloads.	MASCOTS	2022	DBLP DOI BibTeX RDF
25	Charitha Saumya, Kirshanthan Sundararajah, Milind Kulkarni 0001	DARM: Control-Flow Melding for SIMT Thread Divergence Reduction.	CGO	2022	DBLP DOI BibTeX RDF
25	Ahmad Alawneh, Mahmoud Khairy, Timothy G. Rogers	A SIMT Analyzer for Multi-Threaded CPU Applications.	ISPASS	2022	DBLP DOI BibTeX RDF
25	Xiaoqing Guo, Jie Liu 0044, Tongliang Liu, Yixuan Yuan	SimT: Handling Open-set Noise for Domain Adaptive Semantic Segmentation.	CVPR	2022	DBLP DOI BibTeX RDF
25	Zhen Zheng, Xuanda Yang, Pengzhan Zhao, Guoping Long, Kai Zhu, Feiwen Zhu, Wenyi Zhao, Xiaoyong Liu, Jun Yang, Jidong Zhai, Shuaiwen Leon Song, Wei Lin 0016	AStitch: enabling a new multi-dimensional optimization space for memory-intensive ML training and inference on modern SIMT architectures.	ASPLOS	2022	DBLP DOI BibTeX RDF
25	Gavin Ridley, Benoit Forget	A simple method for rejection sampling efficiency improvement on SIMT architectures.	Stat. Comput.	2021	DBLP DOI BibTeX RDF
25	Charitha Saumya, Kirshanthan Sundararajah, Milind Kulkarni 0001	CFM: SIMT Thread Divergence Reduction by Melding Similar Control-Flow Regions in GPGPU Programs.	CoRR	2021	DBLP BibTeX RDF
25	Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie 0001	MPU: Towards Bandwidth-abundant SIMT Processor via Near-bank Computing.	CoRR	2021	DBLP BibTeX RDF
25	Mohamed Amine Chatti, Fangzheng Ji, Mouadh Guesmi, Arham Muslim, Ravi Kumar Singh, Shoeb Ahmed Joarder	SIMT: A Semantic Interest Modeling Toolkit.	UMAP (Adjunct Publication)	2021	DBLP DOI BibTeX RDF
25	Xinyuan Li, Huang Ye, Jian Zhang 0070	Redesigning Peridigm on SIMT Accelerators for High-performance Peridynamics Simulations.	IPDPS	2021	DBLP DOI BibTeX RDF
25	Jiashu Wang, Xun Deng, Kai-Ting Amy Wang, ZiChun Ye	Adapting SYCL's SIMT Programming Paradigm forAccelerators via Program Reconstruction.	ICPP Workshops	2021	DBLP DOI BibTeX RDF
25	Seyyed Hasan Mozafari, Brett H. Meyer	Hot sparing for lifetime-chip-performance and cost improvement in application specific SIMT processors.	Des. Autom. Embed. Syst.	2020	DBLP DOI BibTeX RDF
25	Lan Gao, Yunlong Xu, Rui Wang 0014, Zhongzhi Luan, Zhibin Yu 0001, Depei Qian	Thread-Level Locking for SIMT Architectures.	IEEE Trans. Parallel Distributed Syst.	2020	DBLP DOI BibTeX RDF
25	Anita Tino, Caroline Collange, André Seznec	SIMT-X: Extending Single-Instruction Multi-Threading to Out-of-Order Cores.	ACM Trans. Archit. Code Optim.	2020	DBLP DOI BibTeX RDF
25	Sana Damani, Daniel R. Johnson, Mark Stephenson, Stephen W. Keckler, Eddie Q. Yan, Michael McKeown, Olivier Giroux	Speculative reconvergence for improved SIMT efficiency.	CGO	2020	DBLP DOI BibTeX RDF
25	Jan Hückelheim, Michel Schanen, Sri Hari Krishna Narayanan, Paul D. Hovland	Vector Forward Mode Automatic Differentiation on SIMD/SIMT architectures.	ICPP	2020	DBLP DOI BibTeX RDF
25	Daniel Thuerck	Supporting Irregularity in Throughput-Oriented Computing by SIMT-SIMD Integration.	IA3@SC	2020	DBLP DOI BibTeX RDF
25	Tsung Tai Yeh, Roland N. Green, Timothy G. Rogers	Dimensionality-Aware Redundant SIMT Instruction Elimination.	ASPLOS	2020	DBLP DOI BibTeX RDF
25	Seyyed Hasan Mozafari, Brett H. Meyer	Characterizing the Effectiveness of Hot Sparing on Cost and Performance-per-Watt in Application Specific SIMT.	Integr.	2019	DBLP DOI BibTeX RDF
25	Sana Damani, Vivek Sarkar	Common Subexpression Convergence: A New Code Optimization for SIMT Processors.	LCPC	2019	DBLP DOI BibTeX RDF
25	Ben Perach, Shlomo Weiss	SiMT-DSP: A Massively Multithreaded DSP Architecture.	IEEE Trans. Very Large Scale Integr. Syst.	2018	DBLP DOI BibTeX RDF
25	Seyyed Hasan Mozafari, Brett H. Meyer	Efficient Performance Evaluation of Multi-Core SIMT Processors with Hot Redundancy.	IEEE Trans. Emerg. Top. Comput.	2018	DBLP DOI BibTeX RDF
25	Kuan-Chung Chen, Chung-Ho Chen	Enabling SIMT Execution Model on Homogeneous Multi-Core System.	ACM Trans. Archit. Code Optim.	2018	DBLP DOI BibTeX RDF
25	Nicholas J. Curtis, Kyle E. Niemeyer, Chih-Jen Sung	Using SIMD and SIMT vectorization to evaluate sparse chemical kinetic Jacobian matrices and thermochemical source terms.	CoRR	2018	DBLP BibTeX RDF
25	Hancheng Wu, John Ravi, Michela Becchi	Compiling SIMT Programs on Multi- and Many-Core Processors with Wide Vector Units: A Case Study with CUDA.	HiPC	2018	DBLP DOI BibTeX RDF
25	Chung-Ho Chen	A glance of the CASLab HSAIL SIMT GPU for OpenCL and TensorFlow applications.	VLSI-DAT	2018	DBLP DOI BibTeX RDF
25	Benjamin Klenk, Holger Fröning, Hans Eberle, Larry Dennison	Relaxations for High-Performance Message Passing on Massively Parallel SIMT Processors.	IPDPS	2017	DBLP DOI BibTeX RDF
25	Chad D. Kersey, Hyesoon Kim, Sudhakar Yalamanchili	Lightweight SIMT core designs for intelligent 3D stacked DRAM.	MEMSYS	2017	DBLP DOI BibTeX RDF
25	M. Naghashi, Sayyed Hasan Mozafari, Shaahin Hessabi	Heterogeneous redundancy to address performance and cost in multi-core SIMT: work-in-progress.	CODES+ISSS	2017	DBLP DOI BibTeX RDF
25	Kai Wang, Calvin Lin	Decoupled Affine Computation for SIMT GPUs.	ISCA	2017	DBLP DOI BibTeX RDF
25	Jens Huthmann	An Execution Model and High-Level-Synthesis System for Generating SIMT Multi-Threaded Hardware from C Source Code.		2017	RDF
25	Bo-Cheng Charles Lai, Luis Garrido Platero, Hsien-Kai Kuo	A Quantitative Method to Data Reuse Patterns of SIMT Applications.	IEEE Comput. Archit. Lett.	2016	DBLP DOI BibTeX RDF
25	Muhammed Al Kadi, Benedikt Janßen, Michael Hübner 0001	FGPU: An SIMT-Architecture for FPGAs.	FPGA	2016	DBLP DOI BibTeX RDF
25	Ahmed ElTantawy, Tor M. Aamodt	MIMD synchronization on SIMT architectures.	MICRO	2016	DBLP DOI BibTeX RDF
25	Heekyeong Jeon, Kwanho Lee, Seonghyung Han, Kwangyeob Lee	The parallelization of convolution on a CNN using a SIMT based GPGPU.	ISOCC	2016	DBLP DOI BibTeX RDF
25	Zhen Lin, Lars Nyland, Huiyang Zhou	Enabling efficient preemption for SIMT architectures with lightweight context switching.	SC	2016	DBLP DOI BibTeX RDF
25	Roman Novak	Loop Optimization for Divergence Reduction on GPUs with SIMT Architecture.	IEEE Trans. Parallel Distributed Syst.	2015	DBLP DOI BibTeX RDF
25	Jan Lucas, Michael Andersch, Mauricio Alvarez-Mesa, Ben H. H. Juurlink	Spatiotemporal SIMT and Scalarization for Improving GPU Efficiency.	ACM Trans. Archit. Code Optim.	2015	DBLP DOI BibTeX RDF
25	Chad D. Kersey, Sudhakar Yalamanchili, Hyesoon Kim	SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype.	MEMSYS	2015	DBLP DOI BibTeX RDF
25	Seyyed Hasan Mozafari, Brett H. Meyer, Kevin Skadron	Yield-aware Performance-Cost Characterization for Multi-Core SIMT.	ACM Great Lakes Symposium on VLSI	2015	DBLP DOI BibTeX RDF
25	Seyyed Hasan Mozafari, Brett H. Meyer	Hot spare components for performance-cost improvement in multi-core SIMT.	DFTS	2015	DBLP DOI BibTeX RDF
25	Yi Yang 0018, Ping Xiang, Michael Mantor, Norman Rubin, Lisa R. Hsu, Qunfeng Dong, Huiyang Zhou	A Case for a Flexible Scalar Unit in SIMT Architecture.	IPDPS	2014	DBLP DOI BibTeX RDF
25	Ari B. Hayes, Eddy Z. Zhang	Unified on-chip memory allocation for SIMT architecture.	ICS	2014	DBLP DOI BibTeX RDF
25	Osama Awwad, Ala I. Al-Fuqaha, Ghassen Ben Brahim, Bilal Khan 0002, Ammar Rayes	Distributed topology control in large-scale hybrid RF/FSO networks: SIMT GPU-based particle swarm optimization approach.	Int. J. Commun. Syst.	2013	DBLP DOI BibTeX RDF
25	Nicolas Brunie, Caroline Collange	Reconvergence de contrôle implicite pour les architectures SIMT.	Tech. Sci. Informatiques	2013	DBLP DOI BibTeX RDF
25	Hong-Yun Kim, Young-Jun Kim 0001, Jiehwan Oh, Lee-Sup Kim	A Reconfigurable SIMT Processor for Mobile Ray Tracing With Contention Reduction in Shared Memory.	IEEE Trans. Circuits Syst. I Regul. Pap.	2013	DBLP DOI BibTeX RDF
25	Kensuke Kojima, Atsushi Igarashi	A Hoare Logic for SIMT Programs.	APLAS	2013	DBLP DOI BibTeX RDF
25	Yuanxu Xu, Mingyan Yu, Chao Zhang, Bing Yang	The Analysis of Generic SIMT Scheduling Model Extracted from GPU.	NCCET	2013	DBLP DOI BibTeX RDF
25	Ji Kim, Christopher Torng, Shreesha Srinath, Derek Lockhart, Christopher Batten	Microarchitectural mechanisms to exploit value structure in SIMT architectures.	ISCA	2013	DBLP DOI BibTeX RDF
25	Nikolaos Alachiotis 0001, Simon A. Berger, Alexandros Stamatakis	Coupling SIMD and SIMT architectures to boost performance of a phylogeny-aware alignment kernel.	BMC Bioinform.	2012	DBLP DOI BibTeX RDF
25	Ahmad Lashgar, Amirali Baniasadi, Ahmad Khonsari	Dynamic Warp Resizing in High-Performance SIMT	CoRR	2012	DBLP BibTeX RDF
25	Kathrin Baker, Michael Bloodgood, Bonnie J. Dorr, Chris Callison-Burch, Nathaniel Wesley Filardo, Christine D. Piatko, Lori S. Levin, Scott Miller	Modality and Negation in SIMT Use of Modality and Negation in Semantically-Informed Syntactic MT.	Comput. Linguistics	2012	DBLP DOI BibTeX RDF
25	Steffen Frey, Guido Reina, Thomas Ertl	SIMT Microscheduling: Reducing Thread Stalling in Divergent Iterative Algorithms.	PDP	2012	DBLP DOI BibTeX RDF
25	Axel Habermaier, Alexander Knapp	On the Correctness of the SIMT Execution Model of GPUs.	ESOP	2012	DBLP DOI BibTeX RDF
25	Po-Han Wang 0001, Chien-Wei Lo, Chia-Lin Yang, Yu-Jung Cheng	A cycle-level SIMT-GPU simulation framework.	ISPASS	2012	DBLP DOI BibTeX RDF
25	Ahmad Lashgar, Amirali Baniasadi, Ahmad Khonsari	Dynamic warp resizing: Analysis and benefits in high-performance SIMT.	ICCD	2012	DBLP DOI BibTeX RDF
25	Yongpeng Zhang, Frank Mueller 0001	CuNesl: Compiling Nested Data-Parallel Languages for SIMT Architectures.	ICPP	2012	DBLP DOI BibTeX RDF
25	Wilson W. L. Fung, Tor M. Aamodt	Thread block compaction for efficient SIMT control flow.	HPCA	2011	DBLP DOI BibTeX RDF
25	Daniel Flores-Tapia, Stephen Pistorius	A real time Breast Microwave Radar imaging reconstruction technique using simt based interpolation.	ICIP	2010	DBLP DOI BibTeX RDF
25	Michael Steffen, Joseph Zambreno	Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels.	MICRO	2010	DBLP DOI BibTeX RDF