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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 37 publication records. Showing 37 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
172 | Somnath Paul, Saibal Mukhopadhyay, Swarup Bhunia |
Hybrid CMOS-STTRAM non-volatile FPGA: design challenges and optimization approaches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 589-592, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
STTRAM, emerging memory technologies, nonvolatile FPGA |
88 | Subho Chatterjee, Sayeef S. Salahuddin, Satish Kumar, Saibal Mukhopadhyay |
Analysis of thermal behaviors of spin-torque-transfer RAM: a simulation study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 13-18, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
MTJ, STTRAM, read disturb, self-heating, sensing accuracy |
28 | Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatterjee, Saibal Mukhopadhyay, Sudhakar Yalamanchili |
An energy efficient cache design using spin torque transfer (STT) RAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 389-394, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
(STT)RAM, memory technologies, cache design |
28 | Kyle Kuan, Tosiron Adegbija |
A Study of STTRAM-based Page Walker Caches for Energy-Efficient Address Translation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2022, Nicosia, Cyprus, July 4-6, 2022, pp. 74-79, 2022, IEEE, 978-1-6654-6605-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
28 | Kyle Kuan, Tosiron Adegbija |
A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2009.11442, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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28 | Farzane Rabiee, Mostafa Kajouyan, Newsha Estiri, Jordan Fluech, Mahdi Fazeli, Ahmad Patooghy |
Enduring Non-Volatile L1 Cache Using Low-Retention-Time STTRAM Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Limassol, Cyprus, July 6-8, 2020, pp. 322-327, 2020, IEEE, 978-1-7281-5775-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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28 | Kyle Kuan, Tosiron Adegbija |
A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 38th IEEE International Conference on Computer Design, ICCD 2020, Hartford, CT, USA, October 18-21, 2020, pp. 247-254, 2020, IEEE, 978-1-7281-9710-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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28 | Seyedhamidreza Motaman, Swaroop Ghosh, Nitin Rathi |
Cache Bypassing and Checkpointing to Circumvent Data Security Attacks on STTRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Emerg. Top. Comput. ![In: IEEE Trans. Emerg. Top. Comput. 7(2), pp. 262-270, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
28 | Kyle Kuan, Tosiron Adegbija |
Energy and Performance Analysis of STTRAM Caches for Mobile Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1908.04744, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
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28 | Huizhang Luo |
TCAD MLC-STTRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2019 |
DOI RDF |
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28 | Prashant J. Nair, Bahar Asgari, Moinuddin K. Qureshi |
SuDoku: Tolerating High-Rate of Transient Failures for Enabling Scalable STTRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2019, Portland, OR, USA, June 24-27, 2019, pp. 388-400, 2019, IEEE, 978-1-7281-0057-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
28 | Kyle Kuan, Tosiron Adegbija |
Energy and Performance Analysis of STTRAM Caches for Mobile Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2019, Singapore, Singapore, October 1-4, 2019, pp. 257-264, 2019, IEEE, 978-1-7281-4882-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
28 | Kyle Kuan, Tosiron Adegbija |
MirrorCache: An Energy-Efficient Relaxed Retention L1 STTRAM Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 2019 on Great Lakes Symposium on VLSI, GLSVLSI 2019, Tysons Corner, VA, USA, May 9-11, 2019, pp. 299-302, 2019, ACM, 978-1-4503-6252-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
28 | Mohammad Nasim Imtiaz Khan, Anirudh Iyengar, Swaroop Ghosh |
Novel Magnetic Burn-In for Retention and Magnetic Tolerance Testing of STTRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 26(8), pp. 1508-1517, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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28 | Seyedhamidreza Motaman, Swaroop Ghosh, Jaydeep Kulkarni |
Impact of Process Variation on Self-Reference Sensing Scheme and Adaptive Current Modulation for Robust STTRAM Sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 14(1), pp. 8:1-8:17, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
28 | Seyedhamidreza Motaman, Swaroop Ghosh, Jaydeep P. Kulkarni |
VFAB: A Novel 2-Stage STTRAM Sensing Using Voltage Feedback and Boosting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6), pp. 1919-1928, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
28 | Mohammad Nasim Imtiaz Khan, Swaroop Ghosh |
Analysis of Row Hammer Attack on STTRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 36th IEEE International Conference on Computer Design, ICCD 2018, Orlando, FL, USA, October 7-10, 2018, pp. 75-82, 2018, IEEE Computer Society, 978-1-5386-8477-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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28 | Asmit De, Mohammad Nasim Imtiaz Khan, Jongsun Park 0001, Swaroop Ghosh |
Replacing eFlash with STTRAM in IoTs: Security Challenges and Solutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Hardw. Syst. Secur. ![In: J. Hardw. Syst. Secur. 1(4), pp. 328-339, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
28 | Bahar Asgari, Mahdi Fazeli, Ahmad Patooghy, Seyed Vahid Azhari |
Micro-architectural approach to the efficient employment of STTRAM cells in a microprocessor register file. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 11(1), pp. 1-7, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
28 | Rekha Govindaraj, Swaroop Ghosh |
Design and Analysis of STTRAM-Based Ternary Content Addressable Memory Cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 13(4), pp. 52:1-52:22, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
28 | Mohammad Nasim Imtiaz Khan, Anirudh Srikant Iyengar, Swaroop Ghosh |
Novel magnetic burn-in for retention testing of STTRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017, pp. 666-669, 2017, IEEE, 978-3-9815370-8-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
28 | Radha Krishna Aluru, Swaroop Ghosh |
Droop mitigating last level cache architecture for STTRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017, pp. 262-265, 2017, IEEE, 978-3-9815370-8-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
28 | Mohammad Nasim Imtiaz Khan, Shivam Bhasin, Alex Yuan, Anupam Chattopadhyay, Swaroop Ghosh |
Side-Channel Attack on STTRAM Based Cache for Cryptographic Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 2017 IEEE International Conference on Computer Design, ICCD 2017, Boston, MA, USA, November 5-8, 2017, pp. 33-40, 2017, IEEE Computer Society, 978-1-5386-2254-4. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
28 | Nitin Rathi, Helia Naeimi, Swaroop Ghosh |
Side Channel Attacks on STTRAM and Low-Overhead Countermeasures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1603.06675, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
28 | Mohammad Nasim Imtiaz Khan, Swaroop Ghosh, Radha Krishna Aluru, Rashmi Jha |
Multi-Bit Read and Write Methodologies for Diode-STTRAM Crossbar Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1606.00470, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
28 | Nitin Rathi, Asmit De, Helia Naeimi, Swaroop Ghosh |
Cache Bypassing and Checkpointing to Circumvent Data Security Attacks on STTRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1603.06227, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
28 | Asmit De, Mohammad Nasim Imtiaz Khan, Swaroop Ghosh |
Attack resilient architecture to replace embedded Flash with STTRAM in homogeneous IoTs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1606.00467, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
28 | Anirudh Iyengar, Swaroop Ghosh, Srikant Srinivasan |
Retention Testing Methodology for STTRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test ![In: IEEE Des. Test 33(5), pp. 7-15, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
28 | Jae-Won Jang, Swaroop Ghosh |
Performance Impact of Magnetic and Thermal Attack on STTRAM and Low-Overhead Mitigation Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2016 International Symposium on Low Power Electronics and Design, ISLPED 2016, San Francisco Airport, CA, USA, August 08 - 10, 2016, pp. 136-141, 2016, ACM, 978-1-4503-4185-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
28 | Anirudh Iyengar, Swaroop Ghosh, Nitin Rathi, Helia Naeimi |
Side channel attacks on STTRAM and low-overhead countermeasures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016, Storrs, CT, USA, September 19-20, 2016, pp. 141-146, 2016, IEEE Computer Society, 978-1-5090-3623-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
28 | Jue Wang, Yuan Xie 0001 |
A Write-Aware STTRAM-Based Register File Architecture for GPGPU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 12(1), pp. 6:1-6:12, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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28 | Seyedhamidreza Motaman, Swaroop Ghosh, Nitin Rathi |
Impact of process-variations in STTRAM and adaptive boosting for robustness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015, pp. 1431-1436, 2015, ACM, 978-3-9815370-4-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
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28 | Seyedhamidreza Motaman, Swaroop Ghosh, Jaydeep P. Kulkarni |
A novel slope detection technique for robust STTRAM sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015, Rome, Italy, July 22-24, 2015, pp. 7-12, 2015, IEEE, 978-1-4673-8009-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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28 | Jae-Won Jang, Jongsun Park 0001, Swaroop Ghosh, Swarup Bhunia |
Self-correcting STTRAM under magnetic field attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015, pp. 77:1-77:6, 2015, ACM, 978-1-4503-3520-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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28 | Seyedhamidreza Motaman, Swaroop Ghosh |
Simultaneous Sizing, Reference Voltage and Clamp Voltage Biasing for Robustness, Self-Calibration and Testability of STTRAM Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: The 51st Annual Design Automation Conference 2014, DAC '14, San Francisco, CA, USA, June 1-5, 2014, pp. 66:1-66:2, 2014, ACM, 978-1-4503-2730-5. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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28 | Subho Chatterjee, Mitchelle Rasquinha, Sudhakar Yalamanchili, Saibal Mukhopadhyay |
A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 19(5), pp. 809-817, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
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28 | Subho Chatterjee, Sayeef S. Salahuddin, Saibal Mukhopadhyay |
Dual-Source-Line-Bias Scheme to Improve the Read Margin and Sensing Accuracy of STTRAM in Sub-90-nm Nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 57-II(3), pp. 208-212, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
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