Search results for "Transmeta"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
55	James C. Dehnert, Brian Grant, John P. Banning, Richard Johnson, Thomas Kistler, Alexander Klaiber, Jim Mattson	The Transmeta Code Morphing - Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life Challenges.	CGO	2003	DBLP DOI BibTeX RDF
53	Wu-chun Feng, Michael S. Warren, Eric Weigle	Honey, I Shrunk the Beowulf!	ICPP	2002	DBLP DOI BibTeX RDF	RLX, Transmeta, code morphing, NAS benchmarks, price-performance ratio, ToPPeR, performance-space ratio, performance-power ratio, n-body code, treecode, cluster, VLIW, Beowulf, blade server
53	Michael S. Warren, Eric Weigle, Wu-chun Feng	High-density computing: a 240-processor Beowulf in one cubic meter.	SC	2002	DBLP DOI BibTeX RDF	MIPS-per-watt, RLX, Transmeta, code morphing, performance-per-square-foot, cluster, VLIW, Beowulf, blade server
35	Teresa Onorati, Alessio Malizia, Jasna Kuljis	Transmeta design: Adding transparency and meta-communication to Web services design.	ITI	2013	DBLP DOI BibTeX RDF
35	Guilherme Ottoni, Gautham N. Chinya, Gerolf Hoflehner, Jamison D. Collins, Amit Kumar, Ethan Schuchman, David R. Ditzel, Ronak Singhal, Hong Wang 0003	AstroLIT: enabling simulation-based microarchitecture comparison between Intel® and Transmeta designs.	Conf. Computing Frontiers	2011	DBLP DOI BibTeX RDF
35	Kevin D. Rich, Shankar G. Govindaraju, Robert Shaw, David Dobrikin	DVGen: a test generator for the transmeta Efficeon VLIW processor.	HLDVT	2005	DBLP DOI BibTeX RDF
35	Anshuman S. Nadkarni, Tom Kenville	TiGeR, the Transmeta Instruction GEneratoR: A Production Based, Pseudo Random Instruction x86 Test Generator.	MTV	2004	DBLP DOI BibTeX RDF
35	Dean M. Deaver	Experiences with interpretation vs. translation in transmeta's code morphing software.	IVME	2004	DBLP DOI BibTeX RDF
35	James C. Dehnert	The Transmeta Crusoe: VLIW Embedded in CISC.	SCOPES	2003	DBLP DOI BibTeX RDF
35	Dean Gaudet	Dense Computing with Transmeta's Crusoe (invited).	CLUSTER	2001	DBLP DOI BibTeX RDF
20	Taisuke Boku, Mitsuhisa Sato, Daisuke Takahashi, Hiroshi Nakashima, Hiroshi Nakamura, Satoshi Matsuoka, Yoshihiko Hotta	MegaProto/E: power-aware high-performance cluster with commodity technology.	IPDPS	2006	DBLP DOI BibTeX RDF
20	Hideaki Kimura 0003, Mitsuhisa Sato, Yoshihiko Hotta, Taisuke Boku, Daisuke Takahashi	Emprical study on Reducing Energy of Parallel Programs using Slack Reclamation by DVFS in a Power-scalable High Performance Cluster.	CLUSTER	2006	DBLP DOI BibTeX RDF
20	Chris Dwyer, Alvin R. Lebeck, Daniel J. Sorin	Self-Assembled Architectures and the Temporal Aspects of Computing.	Computer	2005	DBLP DOI BibTeX RDF
20	Xiaotao Liu, Prashant J. Shenoy, Mark D. Corner	Chameleon: application level power management with performance isolation.	ACM Multimedia	2005	DBLP DOI BibTeX RDF	mobile computing, multimedia, power management
20	Fen Xie, Margaret Martonosi, Sharad Malik	Efficient behavior-driven runtime dynamic voltage scaling policies.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	runtime dynamic voltage scaling, low power
20	Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu	Exploiting Processor Workload Heterogeneity for Reducing Energy Consumption in Chip Multiprocessors.	DATE	2004	DBLP DOI BibTeX RDF
20	James E. Smith 0001	Some Real Observations on Virtual Machines.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
20	Xiaotao Liu, Prashant J. Shenoy, Weibo Gong	A time series-based approach for power management in mobile processors and disks.	NOSSDAV	2004	DBLP DOI BibTeX RDF	dynamic rotations per minute, multimedia, power management, dynamic voltage scaling
20	Kirk Pruhs, Patchrawat Uthaisombut, Gerhard J. Woeginger	Getting the Best Response for Your Erg.	SWAT	2004	DBLP DOI BibTeX RDF
20	Gaurav S. Kc, Angelos D. Keromytis, Vassilis Prevelakis	Countering code-injection attacks with instruction-set randomization.	CCS	2003	DBLP DOI BibTeX RDF	interpreters, emulators, buffer overflows
20	Fen Xie, Margaret Martonosi, Sharad Malik	Compile-time dynamic voltage scaling settings: opportunities and limits.	PLDI	2003	DBLP DOI BibTeX RDF	low power, compiler, analytical model, dynamic voltage scaling, mixed-integer linear programming
20	Greg Semeraro, Grigorios Magklis, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Michael L. Scott	Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling.	HPCA	2002	DBLP DOI BibTeX RDF	Off-Line Analysis Tool, Dynamic Reconfiguration Algorithm, Low Power, Dynamic Voltage and Frequency Scaling, Multiple Clock Domain
20	Tao Li, Chen Ding	Instruction Balance and Its Relation to Program Energy Consumption.	LCPC	2001	DBLP DOI BibTeX RDF
20	Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao	Compiler-Directed Dynamic Frequency and Voltage Scheduling.	PACS	2000	DBLP DOI BibTeX RDF