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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 33 occurrences of 28 keywords
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Results
Found 31 publication records. Showing 31 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
111 | Lakshmi N. Chakrapani, John C. Gyllenhaal, Wen-mei W. Hwu, Scott A. Mahlke, Krishna V. Palem, Rodric M. Rabbah |
Trimaran: An Infrastructure for Research in Instruction-Level Parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for High Performance Computing, 17th International Workshop, LCPC 2004, West Lafayette, IN, USA, September 22-24, 2004, Revised Selected Papers, pp. 32-41, 2004, Springer, 3-540-28009-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
90 | M. Balakrishnan, Anshul Kumar, Paolo Ienne, Anup Gangwar, Bhuvan Middha |
A Trimaran Based Framework for Exploring the Design Space of VLIW ASIPs with Coarse Grain Functional Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 2-7, 2002, ACM / IEEE Computer Society, 1-58113-576-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Trimaran, performance, design space exploration, VLIW, ASIP |
38 | Meng Wang 0005, Zili Shao, Hui Liu 0006, Chun Jason Xue |
Minimizing Leakage Energy with Modulo Scheduling for VLIW DSP Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DIPES ![In: Distributed Embedded Systems: Design, Middleware and Resources, IFIP 20th World Computer Congress, TC10 Working Conference on Distributed and Parallel Embedded Systems (DIPES 2008), September 7-10, 2008, Milano, Italy, pp. 111-120, 2008, Springer, 978-0-387-09660-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
38 | Khaing Khaing Kyi Win, Weng-Fai Wong |
Cooperative Instruction Scheduling with Linear Scan Register Allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2005, 12th International Conference, Goa, India, December 18-21, 2005, Proceedings, pp. 528-537, 2005, Springer, 3-540-30936-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Yuxin Deng, Jinxing Li, Wangqiang Jiang, Min Zhang 0014 |
Investigation on the Radar Scattering and Doppler Spectrum From Trimaran Based on the Motion of Six Degrees of Freedom. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. ![In: IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 16, pp. 6889-6901, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
35 | Bowen Zeng 0001, Yang Song, Linhe Zheng |
A Method of a Trimaran Vertical Movements Reduction Control and Hardware Realization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 102209-102216, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
35 | Zhilin Liu, Linhe Zheng, Guosheng Li, Bowen Zeng 0001 |
Vertical Stabilization Control for Trimaran Based on Resultant Force and Moment Distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 105159-105172, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
35 | Shahid Mahmood, Huang De-bo |
Hull Form Optimization of Trimaran Using Genetic Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE ![In: 14th IEEE International Conference on Computational Science and Engineering, CSE 2011, Dalian, China, August 24-26, 2011, pp. 150-154, 2011, IEEE Computer Society, 978-1-4577-0974-6. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
35 | Yan Peng, Jianda Han |
Tracking Control of Unmanned Trimaran Surface Vehicle: Using Adaptive Unscented Kalman Filter to Estimate the Uncertain Parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RAM ![In: 2008 IEEE Conference on Robotics, Automation and Mechatronics, RAM 2008, 21-24 September 2008, Chengdu, China, pp. 901-906, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Yan Peng, Bo Zhou, Jianda Han |
Hardware design and UKF-based tracking control design of Unmanned Trimaran Surface Vehicle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ROBIO ![In: IEEE International Conference on Robotics and Biomimetics, ROBIO 2007, Sanya, China, 15-28 December 2007, pp. 1618-1623, 2007, IEEE, 978-1-4244-1761-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Weifeng Xu, Russell Tessier |
Tetris-XL: A performance-driven spill reduction technique for embedded VLIW processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 6(3), pp. 11:1-11:40, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Very Long Instruction Word (VLIW) processor, instruction level parallelism, Register pressure |
19 | Yanqin Yang, Meng Wang 0005, Zili Shao, Minyi Guo |
Dynamic Scratch-Pad Memory Management with Data Pipelining for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE (2) ![In: Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, CSE 2009, Vancouver, BC, Canada, August 29-31, 2009, pp. 358-365, 2009, IEEE Computer Society, 978-1-4244-5334-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Shu Xiao 0001, Edmund Ming-Kit Lai |
A Rough Programming Approach to Power-Balanced Instruction Scheduling for VLIW Digital Signal Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(4), pp. 1698-1709, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Yanqin Yang, Zili Shao, Linfeng Pan, Minyi Guo |
ISOS: Space Overlapping Based on Iteration Access Patterns for Dynamic Scratch-pad Memory Management in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICYCS ![In: Proceedings of the 9th International Conference for Young Computer Scientists, ICYCS 2008, Zhang Jia Jie, Hunan, China, November 18-21, 2008, pp. 1360-1366, 2008, IEEE Computer Society, 978-0-7695-3398-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Linfeng Pan, Minyi Guo, Yanqin Yang, Meng Wang 0005, Zili Shao |
A State-Based Predictive Approach for Leakage Reduction of Functional Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC (1) ![In: 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), Shanghai, China, December 17-20, 2008, Volume I, pp. 52-58, 2008, IEEE Computer Society, 978-0-7695-3492-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Shu Xiao 0001, Edmund Ming-Kit Lai |
VLIW instruction scheduling for minimal power variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 4(3), pp. 18, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
power variation reduction, Instruction scheduling, VLIW processors |
19 | Weifeng Xu, Russell Tessier |
Tetris: a new register pressure control technique for VLIW processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), San Diego, California, USA, June 13-15, 2007, pp. 113-122, 2007, ACM, 978-1-59593-632-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
register pressure control, very long instruction word (VLIW) processor, instruction level parallelism |
19 | Jer-Yu Hsu, Yan-Zu Wu, Xuan-Yi Lin, Yeh-Ching Chung |
SCRF - A Hybrid Register File Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PaCT ![In: Parallel Computing Technologies, 9th International Conference, PaCT 2007, Pereslavl-Zalessky, Russia, September 3-7, 2007, Proceedings, pp. 525-536, 2007, Springer, 978-3-540-73939-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cluster processor architecture, register architecture, register allocation algorithm, VLIW processor |
19 | Madhu Mutyam, Feihui Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin |
Compiler-directed thermal management for VLIW functional units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario, Canada, June 14-16, 2006, pp. 163-172, 2006, ACM, 1-59593-362-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
VLIW, thermal, IPC |
19 | Rahul Nagpal, Y. N. Srikant |
Exploring Energy-Performance Trade-Offs for Heterogeneous Interconnect Clustered VLIW Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, Proceedings, pp. 497-508, 2006, Springer, 3-540-68039-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Rahul Nagpal, Y. N. Srikant |
Compiler-assisted leakage energy optimization for clustered VLIW architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMSOFT ![In: Proceedings of the 6th ACM & IEEE International conference on Embedded software, EMSOFT 2006, October 22-25, 2006, Seoul, Korea, pp. 233-241, 2006, ACM, 1-59593-542-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
scheduling, leakage energy, energy-aware scheduling, clustered VLIW processors |
19 | Charles Hardnett, Krishna V. Palem, Yogesh Chobe |
Compiler optimization of embedded applications for an adaptive SoC architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 312-322, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
compilers, resource allocation, system on chip, reconfigurable computing, resource scheduling |
19 | Ricardo Santos 0002, Rodolfo Azevedo, Guido Araujo |
2D-VLIW: An Architecture Based on the Geometry of Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 2006 IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP 2006), 11-13 September 2006, Steamboat Springs, Colorado, USA, pp. 87-94, 2006, IEEE Computer Society, 0-7695-2682-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Antoni Portero, Guillermo Talavera, Marius Monton, Borja Martínez, Francky Catthoor, Jordi Carrabina |
Dynamic Voltage Scaling for Power Efficient MPEG4-SP Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 2006 IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP 2006), 11-13 September 2006, Steamboat Springs, Colorado, USA, pp. 257-260, 2006, IEEE Computer Society, 0-7695-2682-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Jennifer L. Wong, Weiping Liao, Fei Li 0003, Lei He 0001, Miodrag Potkonjak |
Scheduling of Soft Real-Time Systems for Context-Aware Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 318-323, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Kubilay Atasu, Günhan Dündar, Can C. Özturan |
An integer linear programming approach for identifying instruction-set extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005, pp. 172-177, 2005, ACM, 1-59593-161-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
integer linear, programming, ASIPs, extensible processors |
19 | Jennifer L. Wong, Farinaz Koushanfar, Miodrag Potkonjak |
Flexible ASIC: shared masking for multiple media processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 909-914, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
optimization, interconnect, ASIC |
19 | W. W. S. Chu, Robert G. Dimond, S. Perrott, S. P. Seng, Wayne Luk |
Customisable EPIC Processor: Architecture and Tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 236-241, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Diviya Jain, Anshul Kumar, Laura Pozzi, Paolo Ienne |
Automatically Customising VLIW Architectures with Coarse Grained Application-Specific Functional Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: Software and Compilers for Embedded Systems, 8th International Workshop, SCOPES 2004, Amsterdam, The Netherlands, September 2-3, 2004, Proceedings, pp. 17-32, 2004, Springer, 3-540-23035-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Esther Salamí, Jesús Corbal, Carlos Álvarez 0001, Mateo Valero |
Cost effective memory disambiguation for multimedia codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002, pp. 117-126, 2002, ACM, 1-58113-575-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
multimedia, VLIW, run-time analysis, time-to-market, memory disambiguation |
19 | Tarun Nakra, Rajiv Gupta 0001, Mary Lou Soffa |
Value Prediction in VLIW Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 26th Annual International Symposium on Computer Architecture, ISCA 1999, Atlanta, Georgia, USA, May 2-4, 1999, pp. 258-269, 1999, IEEE Computer Society, 0-7695-0170-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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