Search results for "VSIA"

Found 16 publication records. Showing 16 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
69	Kathy Werner	VSI Standards, Current Status and Future Work.	VLSI Design	2008	DBLP DOI BibTeX RDF
68	Salim Ouadjaout, Marie-France Albenge, Dominique Houzet	VSIA Interface Cosynthesis.	DELTA	2002	DBLP DOI BibTeX RDF	VSIA, SoC, Co-design, interface synthesis
46	Pierre Bricaud	VC Rating and Quality Metrics: Why Bother?	ISQED	2002	DBLP DOI BibTeX RDF
37	Mark Birnbaum, Charlene C. Johnson	VSIA Quality Metrics for IP and SoC.	ISQED	2001	DBLP DOI BibTeX RDF
37	Bulent I. Dervisoglu	A Unified DFT Architecture for Use with IEEE 1149.1 and VSIA/IEEE P1500 Compliant Test Access Controllers.	DAC	2001	DBLP DOI BibTeX RDF
37	Mark Birnbaum, Howard Sachs	How VSIA Answers the SOC Dilemma.	Computer	1999	DBLP DOI BibTeX RDF
37	Howard Sachs, Mark Birnbaum	VSIA technical challenges.	CICC	1999	DBLP DOI BibTeX RDF
31	Victor Berman	Standards update from IP 07.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF	IP 07, Ron Collett, semiconductor IP, VSIA, OSCI, DASC, standards, IEEE
31	Roman L. Lysecky, Frank Vahid	Prefetching for improved bus wrapper performance in cores.	ACM Trans. Design Autom. Electr. Syst.	2002	DBLP DOI BibTeX RDF	Bus wrapper, PVCI, VSIA, interfacing, system-on-a-chip, intellectual property, cores, design reuse, on-chip bus
23	Nikil D. Dutt, Kaustav Banerjee, Luca Benini, Kanishka Lahiri, Sudeep Pasricha	Tutorial 5: SoC Communication Architectures: Technology, Current Practice, Research, and Trends.	VLSI Design	2007	DBLP DOI BibTeX RDF
23	Kathy Werner	Can IP Quality be Objectively Measured?	DATE	2004	DBLP DOI BibTeX RDF
23	Salim Ouadjaout, Dominique Houzet	Easy SoC Design with VCI SystemC Adapters.	DSD	2004	DBLP DOI BibTeX RDF
23	Pavle Belanovic, Martin Holzer 0002, Bastian Knerr, Markus Rupp, Guillaume Sauzon	Automatic Generation of Virtual Prototypes.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
23	Christopher K. Lennard, Patrick Schaumont, Gjalt G. de Jong, Anssi Haverinen, Pete Hardee	Standards for System-Level Design: Practical Reality or Solution in Search of a Question?	DATE	2000	DBLP DOI BibTeX RDF
23	Yervant Zorian, Erik Jan Marinissen, Sujit Dey	Testing embedded-core based system chips.	ITC	1998	DBLP DOI BibTeX RDF
23	Prab Varma	System Chip Test Challenges, Are There Solutions Today? (Panel).	DAC	1998	DBLP DOI BibTeX RDF