Search results for "VSLI"

Found 13 publication records. Showing 13 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
76	Sang Chon, In Choi, Jeongil Seo, Koeng-Mo Sung	Variable Bit Quantization for Virtual Source Location Information in Spatial Audio Coding.	PCM (1)	2005	DBLP DOI BibTeX RDF
58	Inseon Jang, Jeongil Seo, Seungkwon Beack, Kyeongok Kang, Han-gil Moon	Sound source location cue coding system for compact representation of multi-channel audio.	ACM Multimedia	2005	DBLP DOI BibTeX RDF	BCC, VSLI, sound source location cue coding, spatial audio coding
51	Han-gil Moon, Jeongil Seo, Seungkwon Beack, Koeng-Mo Sung	A Multi-channel Audio Compression Method with Virtual Source Location Information.	PCM (1)	2005	DBLP DOI BibTeX RDF
36	Stephen P. Carullo, Michael Olaleye, Chika Nwankpa	VSLI Based Analog Power System Emulator for Fast Contingency Analysis.	HICSS	2004	DBLP DOI BibTeX RDF
36	Sandeep Koranne, Om Prakash Gangwal	On automatic analysis of geometrically proximate nets in VSLI layout.	DATE	2001	DBLP DOI BibTeX RDF
36	Klaus Glasmacher	Chip assembly in einem Top-down-VSLI-Entwurfssystem und ein Modell zur konkurrenten Layout-Synthese.		1992	RDF
36	William M. Coughran Jr., Mark R. Pinto, R. Kent Smith	Adaptive grid generation for VSLI device simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1991	DBLP DOI BibTeX RDF
36	L. Mary, J. C. Michalina, J. L. Laborie	A True Multiprocessor VSLI Building Block.	ICC	1986	DBLP BibTeX RDF
36	F. Pool, J. Hop, J. P. L. Lagerberg, C. Da Costa	Testing a 317K bit High Speed Video Memory with a VSLI Test System.	ITC	1984	DBLP BibTeX RDF
36	Donald F. Wann, Mark A. Franklin	Asynchronous and Clocked Control Structures for VSLI Based Interconnection Networks.	IEEE Trans. Computers	1983	DBLP DOI BibTeX RDF
33	Jason Cong, Yean-Yow Hwang	Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA designs.	ACM Trans. Design Autom. Electr. Syst.	2000	DBLP DOI BibTeX RDF	computer-aided design of VSLI, FPGA, synthesis, system design, decomposition, technology mapping, simplification, programmable logic, logic optimization, delay minimization
25	Junichi Hirase	Yield Increase of VLSI after Redundancy-Repairing.	Asian Test Symposium	2001	DBLP DOI BibTeX RDF
25	Anant Agarwal, Anoop Gupta	Memory-Reference Characteristics of Multiprocessor Applications under MACH.	SIGMETRICS	1988	DBLP DOI BibTeX RDF	VAX