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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6 occurrences of 6 keywords
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Results
Found 3 publication records. Showing 3 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
130 | Gogul Balakrishnan, Thomas W. Reps, Nicholas Kidd, Akash Lal, Junghee Lim, David Melski, Radu Gruian, Suan Hsi Yong, Chi-Hua Chen, Tim Teitelbaum |
Model Checking x86 Executables with CodeSurfer/x86 and WPDS++. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 17th International Conference, CAV 2005, Edinburgh, Scotland, UK, July 6-10, 2005, Proceedings, pp. 158-163, 2005, Springer, 3-540-27231-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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64 | Arul Ganesh, K. Gopinath |
SPKI/SDSI certificate chain discovery with generic constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Bangalore Compute Conf. ![In: Proceedings of the 1st Bangalore Annual Compute Conference, Compute 2008, Bangalore, India, January 18-20, 2008, pp. 3, 2008, ACM, 978-1-59593-950-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
WPDS, certificate chain, validity specification, security, policy, SPKI/SDSI |
56 | Konstantin Moiseev, Avinoam Kolodny, Shmuel Wimer |
Power-delay optimization in VLSI microprocessors by wire spacing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(4), pp. 55:1-55:28, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Wire spacing, power optimization, interconnect optimization, delay-optimization |
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