Search results for "analog-to-digital"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
121	Thelma Estrin	The UCLA Brain Research Institute data processing laboratory.	History of Medical Informatics	1987	DBLP DOI BibTeX RDF
55	Mehdi Ehsanian, Bozena Kaminska, Karim Arabi	A new digital test approach for analog-to-digital converter testing.	VTS	1996	DBLP DOI BibTeX RDF	digital test approach, analog/digital converter testing, BIST circuitry, offset error, gain error, DNL, INL, area overhead reduction, medium resolution ADC, high resolution pipelined ADC, A/D converter testing, differential nonlinearity, integral nonlinearity, 1.5 micron, VLSI, built-in self test, built-in self-test, integrated circuit testing, CMOS integrated circuits, CMOS technology, analogue-digital conversion
53	A. A. Mariano, B. Boumballa, Dominique Dallet, Yann Deval, Jean-Baptiste Bégueret	High-speed CMOS analog-to-digital converter for front-end receiver applications.	SBCCI	2007	DBLP DOI BibTeX RDF	flash structure, analog-to-digital converter, data-conversion
46	Chanchal Chatterjee, Vwani P. Roychowdhury	An efficient contrast-enhancement method using the analog to digital converter.	Mach. Vis. Appl.	1996	DBLP DOI BibTeX RDF	Analog enhancement, Analog to digital converter
45	Roman Genov, Gert Cauwenberghs	Algorithmic partial analog-to-digital conversion in mixed-signal array processors.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
45	Eduardo J. Peralías, Adoración Rueda, José Luis Huertas	New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters.	J. Electron. Test.	2001	DBLP DOI BibTeX RDF	mixed-signal IC test, testable ADC, BIST, design for test, pipelined analog to digital converters
42	G. Mulliken, Farhan Adil, Gert Cauwenberghs, Roman Genov	Delta-sigma algorithmic analog-to-digital conversion.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
42	Hung-Chih Liu, Zwei-Mei Lee, Jieh-Tsorng Wu	A digital background calibration technique for pipelined analog-to-digital converters.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
41	Lei Feng, Won Namgoong	An Analog/Digital Baseband Processor Design of a UWB Channelized Receiver for Transmitted Reference Signals.	J. VLSI Signal Process.	2006	DBLP DOI BibTeX RDF	transmitted reference, channelized receiver, coarse acquisition, synchronization, Ultra-wideband, analog-to-digital converter
41	Filipp Akopyan, Rajit Manohar, Alyssa B. Apsel	A Level-Crossing Flash Asynchronous Analog-to-Digital Converter.	ASYNC	2006	DBLP DOI BibTeX RDF
41	DongHyun Ko, Ji-Hoon Jung, YoungGun Pu, Sang-Kyung Sung, Kang-Yoon Lee, Chul Nam	A Design of 14-bits ADC and DAC for CODEC Applications in 0.18 µm CMOS Process.	DELTA	2008	DBLP DOI BibTeX RDF	ADC(Analog-to-Digital Converter), DAC (Digital-to-Analog Converter), Sigma-Delta Modulator
40	Fernando De Bernardinis, Pierluigi Nuzzo 0001, Pierangelo Terreni, Alberto L. Sangiovanni-Vincentelli	Enriching an analog platform for analog-to-digital converter design.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
36	Peter R. Snoeren, Nico Karssemeijer	Gray Scale Registration of Mammograms Using a Model of Image Acquisition.	IPMI	2003	DBLP DOI BibTeX RDF
36	Karim Arabi, Bozena Kaminska, Janusz Rzeszut	A new built-in self-test approach for digital-to-analog and analog-to-digital converters.	ICCAD	1994	DBLP DOI BibTeX RDF
36	Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J. Richard Shi	Multilevel symmetry-constraint generation for retargeting large analog layouts.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
35	Diego Pedro Morales, Antonio García 0001, Alberto J. Palma, Miguel A. Carvajal, Encarnación Castillo, Luis F. Capitán-Vallvey	Enhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration.	FPL	2008	DBLP DOI BibTeX RDF
35	José Luis Huertas	Test and design-for-test of mixed-signal integrated circuits.	SBCCI	2004	DBLP DOI BibTeX RDF
34	Martin Hasler, Gernot Kubin	Mixed-domain system representation using Volterra series.	ISCAS	2008	DBLP DOI BibTeX RDF
34	Kazuki Akutagawa, Kazuya Machida, Takao Waho	A 3/7-Level Mixed-Mode Algorithmic Analog-to-Digital Converter.	ISMVL	2008	DBLP DOI BibTeX RDF	algorithmic, redundancy, analog-to-digital converter, multiple-valued
34	Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi	CMOS flash analog-to-digital converter for high speed and low voltage applications.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	TIQ comparator, fat tree encoder, flash ADC, analog-to-digital converter, low voltage, high speed
33	Mohammed A. S. Abdallah, Omar S. Elkeelany, Ali T. Alouani	Simultaneous multi-channel data acquisition with variable sampling frequencies using a scalable adaptive synchronous controller.	FPGA	2009	DBLP DOI BibTeX RDF	adc, sd card, fpga, real-time, multiplexing, data acquisition, fft
33	Alvernon Walker	A Step Response Based Mixed-Signal BIST Approach .	DFT	2001	DBLP DOI BibTeX RDF
32	Eduardo J. Peralías, Adoración Rueda, José L. Huertas	A DFT Technique for Analog-to-Digital Converters with digital correction.	VTS	1997	DBLP DOI BibTeX RDF	Design for Testability of Data Converters, Analog and Mixed Signal Test
32	Robert M. Gray, Richard A. Olshen, D. Ikeda, Pamela C. Cosman, Sharon M. Perlmutter, Cheryl L. Nash, Keren Perlmutter	Evaluating quality and utility in digital mammography.	ICIP	1995	DBLP DOI BibTeX RDF	digital mammography utility, digital mammography quality evaluation, scientists, insurance companies, lawyers, computer-aided diagnostic methodology, clinical experiments, data compression, image enhancement, medical image processing, engineers, regulators, reviews, quality control, protocols design, administrators, medical diagnostic imaging, lossy compression, diagnostic radiography, patients, analogue-digital conversion, analog-to-digital conversion
32	Chi-Chang Lu, Jyun-Yi Wu, Tsung-Sum Lee	A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter.	ISCAS	2007	DBLP DOI BibTeX RDF
32	Per Löwenborg, Håkan Johansson	Quantization noise in filter bank analog-to-digital converters.	ISCAS (2)	2001	DBLP DOI BibTeX RDF
31	Christopher A. Lee 0001, Helen R. Tibbo, Dawne Howard, Yaxiao Song, Terrell Russell, Paul Jones 0001	Keeping the context: an investigation in preserving collections of digital video.	JCDL	2006	DBLP DOI BibTeX RDF	video archives, digital preservation
31	Ahmad Tahmasebi, Arash Kamali, Hossein Balazadeh Bahar, Ziaeddin Daie Koozeh Kanani	A Fully Digital Background Calibration Technique for Pipeline Analog-to-Digital Converters.	ICSAP	2009	DBLP DOI BibTeX RDF	digital calibration, pipeline converters, Analog to digital converter (ADC)
31	Jan Sevenhans, Didier Haspeslagh, Jacques Wenin	Wireless telecom silicon integration: analog design for radio, baseband and speech spectrum.	Wirel. Networks	1998	DBLP DOI BibTeX RDF
30	Guillaume Ferré, Maher Jridi, Lilian Bossuet, Bertrand Le Gal, Dominique Dallet	A new orthogonal online digital calibration for time-interleaved analog-to-digital converters.	ISCAS	2008	DBLP DOI BibTeX RDF
30	Ali Namazi, Syed Askari, Mehrdad Nourani	Highly reliable A/D converter using analog voting.	ICCD	2008	DBLP DOI BibTeX RDF
30	Chen-Yang Pan, Kwang-Ting Cheng	Pseudo-random testing and signature analysis for mixed-signal circuits.	ICCAD	1995	DBLP DOI BibTeX RDF	Signature Analysis, Random Process, Pseudo-Random Testing, Impulse Response
29	Ashkan Olyaei, Roman Genov	Algorithmic Delta-Sigma-modulated FIR filter.	ISCAS	2006	DBLP DOI BibTeX RDF
29	Mandeep Singh, Israel Koren	Fault-sensitivity analysis and reliability enhancement of analog-to-digital converters.	IEEE Trans. Very Large Scale Integr. Syst.	2003	DBLP DOI BibTeX RDF
28	Jianhua Gan, Shouli Yan, Jacob A. Abraham	Design and modeling of a 16-bit 1.5MSPS successive approximation ADC with non-binary capacitor array.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	non-binary capacitor array, successive approximation, calibration, analog-to-digital converter
28	Gert Cauwenberghs	Design and VLSI Implementation of an Adaptive Delta-Sigma Modulator.	VLSI Design	1998	DBLP DOI BibTeX RDF	neural networks, reinforcement learning, analog VLSI, delta-sigma modulation, analog-to-digital conversion
27	Jan Arild Tofte, Chee-Kian Ong, Jiun-Lang Huang, Kwang-Ting (Tim) Cheng	Characterization of a Pseudo-Random Testing Technique for Analog and Mixed-Signal Built-in-Self-Test.	VTS	2000	DBLP DOI BibTeX RDF	cross-correlation signature register, CCSR, implicit functional testing, harmonic distortion, THD, classification, synthesis, noise, BIST, convex hull, polygon, discrimination, analog test, cross-correlation, mixed-signal, pseudo-random, pseudo-random, labview, impulse response, performance parameter, analog BIST
27	Gert Cauwenberghs	Bit-serial bidirectional A/D/A conversio.	ARVLSI	1995	DBLP DOI BibTeX RDF	digital-analogue conversion, bidirectional bit-serial convertor, algorithmic DAC conversion, successive approximation ADC, D/A conversion, fault-tolerant VLSI architecture, matched monotonic characteristics, 200 muW, 20 mus, VLSI, CMOS integrated circuits, analogue-digital conversion, integrated circuit reliability, A/D conversion, 2 micron, CMOS process
27	Naoki Sugiyama, Hiroshi Noto, Yoshito Nishigami, Ryosuke Oda, Takao Waho	A Low-Power Successive Approximation Analog-to-Digital Converter Based on 2-Bit/Step Comparison.	ISMVL	2010	DBLP DOI BibTeX RDF	successive approximation, low-power, analog-to-digital converter, multiple-valued
27	Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, Omid Shoaei	A low-power design methodology for high-resolution pipelined analog-to-digital converters.	ISLPED	2003	DBLP DOI BibTeX RDF	low-power design, operational amplifiers, pipelined analog-to-digital converters
27	Jincheol Yoo, Daegyu Lee, Kyusun Choi, Jongsoo Kim	A power and resolution adaptive flash analog-to-digital converter.	ISLPED	2002	DBLP DOI BibTeX RDF	TIQ comparator, flash ADC, inverter quantization, adaptive, threshold, analog-to-digital converter
27	Mandeep Singh, Israel Koren	Incorporating Fault Tolerance in Analog-to-Digital Converters (ADCs).	ISQED	2002	DBLP DOI BibTeX RDF	Fault sensitivity, Alpha particle, Fault tolerance, Reliability, Transient faults, Analog-to-Digital Converters
27	Mandeep Singh, Israel Koren	Reliability Enhancement of Analog-to-Digital Converters (ADCs).	DFT	2001	DBLP DOI BibTeX RDF	Fault sensitivity, Alpha particle, Fault tolerance, Reliability, Transient faults, Analog-to-Digital Converters
27	S. R. Kadivar, Doris Schmitt-Landsiedel, Heinrich Klar	A new algorithm for the design of stable higher order single loop sigma delta analog-to-digital converters.	ICCAD	1995	DBLP DOI BibTeX RDF	SD ADC, convertors, network scaling, nonlinear interactive optimization, performance criteria, sigma delta analog-to-digital converters, single loop, CAD, higher order, analogue-digital conversion, electronic engineering computing
27	Fule Li, Zhihua Wang 0001, Dongmei Li	An Incomplete Settling Technique for Pipelined Analog-to-Digital Converters.	ISCAS	2007	DBLP DOI BibTeX RDF
27	Christian Vogel 0001, Håkan Johansson	Time-interleaved analog-to-digital converters: status and future directions.	ISCAS	2006	DBLP DOI BibTeX RDF
26	Ryan W. Robucci, Leung Kin Chiu, Jordan D. Gray, Justin K. Romberg, Paul E. Hasler, David V. Anderson	Compressive sensing on a CMOS separable transform image sensor.	ICASSP	2008	DBLP DOI BibTeX RDF
26	Sheng-Yu Peng, Bradley A. Minch, Paul E. Hasler	Analog VLSI implementation of support vector machine learning and classification.	ISCAS	2008	DBLP DOI BibTeX RDF
26	Mingzhe Li, Chuang Shi, Yue Wang	A True Digital Feedforward Active Noise Control System with no Analog-to-Digital and Digital-to-Analog Converters.	APSIPA ASC	2021	DBLP BibTeX RDF
26	Vincent Kerzerho, Vincent Fresnaud, Dominique Dallet, Serge Bernard, Lilian Bossuet	Fast Digital Post-Processing Technique for Integral Nonlinearity Correction of Analog-to-Digital Converters: Validation on a 12-Bit Folding-and-Interpolating Analog-to-Digital Converter.	IEEE Trans. Instrum. Meas.	2011	DBLP DOI BibTeX RDF
26	Yat-Fong Yung, Amine Bermak	A Digital CMOS Imager with Pixel Level Analog-to-digital Converter and Reconfigurable SRAM/Counter.	IWSOC	2004	DBLP DOI BibTeX RDF
25	Rafal Karakiewicz, Roman Genov	Minimal activity mixed-signal VLSI architecture for real-time linear transforms in video.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
25	Eugenio Culurciello, Andreas G. Andreou	An 8-bit, 1mW successive approximation ADC in SOI CMOS.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
25	Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos	A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	flash adc, nano-cmos, ti comparator, process variation, analog-to-digital converter, low voltage, high speed
25	André R. Gomes e Silva, Hélio Magalhães de Oliveira, Rafael Dueire Lins	Converting ECG and Other Paper Legated Biomedical Maps into Digital Signals.	GREC	2007	DBLP DOI BibTeX RDF	digitalization of medical maps, digital ECG, digital EEG, analog-to-digital converter
25	Amir Zjajo, José Pineda de Gyvez	Calibration and Debugging of Multi-step Analog to Digital Converters.	DELTA	2008	DBLP DOI BibTeX RDF	multi-step ADC, debugging, calibration, design-for-test
25	Shanthi Pavan, Nagendra Krishnapura	Oversampling Analog-to-Digital Converter Design.	VLSI Design	2008	DBLP DOI BibTeX RDF
25	Francesco Centurelli, Pietro Monsurrò, Alessandro Trifiletti	A distortion model for pipeline Analog-to-Digital converters.	ISCAS	2007	DBLP DOI BibTeX RDF
25	Jaewook Kim, SeongHwan Cho	A time-based analog-to-digital converter using a multi-phase voltage controlled oscillator.	ISCAS	2006	DBLP DOI BibTeX RDF
25	Munkyo Seo, Mark J. W. Rodwell, Upamanyu Madhow	Blind correction of gain and timing mismatches for a two-channel time-interleaved analog-to-digital converter: experimental verification.	ISCAS	2006	DBLP DOI BibTeX RDF
25	Daniel Hostetler, Yuan Xie 0001	Adaptive Power Management in Software Radios Using Resolution Adaptive Analog to Digital Converters.	ISVLSI	2005	DBLP DOI BibTeX RDF
25	Oscar E. Agazzi, Venu Gopinathan	Background calibration of interleaved analog to digital converters for high-speed communications using interleaved timing recovery techniques.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
25	Yuh-Shyan Hwang, Lu-Po Liao, Chia-Chun Tsai, Wen-Ta Lee, Trong-Yen Lee, Jiann-Jong Chen	A new CCII-based pipelined analog to digital converter.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
25	Hsin-Wen Ting, Bin-Da Liu, Soon-Jyh Chang	A Time Domain Built-In Self-Test Methodology for SNDR and ENOB Tests of Analog-to-Digital Converters.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF
25	Zeljko Ignjatovic, Mark F. Bocko	Sigma-delta analog to digital converter architecture based upon a modulator design employing a mirrored integrator.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
25	Chun-Cheng Huang, Jieh-Tsorng Wu	A statistical background calibration technique for flash analog-to-digital converters.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
25	Costantino Pala, Lars Thylén, Mehrun Mokhtari, Urban Westergren	A high-speed electro-optical analog-to-digital converter principle.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
25	Christian Jesús B. Fayomi, Gordon W. Roberts, Mohamad Sawan	A 1-V, 10-bit rail-to-rail successive approximation analog-to-digital converter in standard 0.18 um CMOS technology.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
25	Karim Arabi, Bozena Kaminska	Efficient and accurate testing of analog-to-digital converters using oscillation-test method.	ED&TC	1997	DBLP DOI BibTeX RDF
25	Bernhard E. Boser, Klaus-Peter Karmann, Horst Martin, Bruce A. Wooley	Simulating and testing oversampled analog-to-digital converters.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1988	DBLP DOI BibTeX RDF
25	Rainer Stuhlberger, Linus Maurer, Christian Wicpalek, Eckart Goehler, Guenter Heinrichs, Jon Winkel, Christian Drewes, Gernot Hueber, Andreas Springer	System Design of a Configurable Highly Digital UMTS/NAVSAT RF-Receiver.	VTC Spring	2006	DBLP DOI BibTeX RDF
25	Jipeng Li, Un-Ku Moon	An extended radix-based digital calibration technique for multi-stage ADC.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
24	David Camarero, Jean-François Naviner, Patrick Loumeau	Digital background and blind calibration for clock skew error in time-interleaved analog-to-digital converters.	SBCCI	2004	DBLP DOI BibTeX RDF	digital calibration, parallel ADC, sample-time errors, time-interleaved, adaptive filters, clock skew
23	Michael Unser	Cardinal exponential splines: part II - think analog, act digital.	IEEE Trans. Signal Process.	2005	DBLP DOI BibTeX RDF
23	Tyson S. Hall, Paul E. Hasler, David V. Anderson	Field-Programmable Analog Arrays: A Floating-Gate Approach.	FPL	2002	DBLP DOI BibTeX RDF
23	Alvernon Walker, Parag K. Lala	A Transition Based BIST Approach for Passive Analog Circuits.	ISQED	2000	DBLP DOI BibTeX RDF	Built-in Self Test, Analog Test, Analog BIST, Mixed-Signal BIST
23	Hu Xiao, Ma Hong, Peng Juan, Tian Chen	State-of-the-Art in Volterra Series Modeling for ADC Nonlinearity.	Asia International Conference on Modelling and Simulation	2008	DBLP DOI BibTeX RDF	Volterra series, model, memory, nonlinear, analog to digital converter (ADC)
23	Jaeyong Lee, Sungil Cho, Kwangsub Yoon	12bits 40mhz pipelined ADC with duty-correction circuit.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	adc(analog-to-digital converter), pipeline, cmos, dll
23	Vincent Kerzerho, Serge Bernard, Philippe Cauvet, Jean-Marie Janik	A First Step for an INL Spectral-Based BIST: The Memory Optimization.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	integral non-linearity, polynomial fitting, Fourier series expansion, fast Fourier transform, analog-to-digital converter testing
23	Emmanuel Allier, Julien Goulier, Gilles Sicard, Alessandro Dezzani, Eric André, Marc Renaudin	A 120nm low power asynchronous ADC.	ISLPED	2005	DBLP DOI BibTeX RDF	asynchronous technology, level-crossing sampling, analog-to-digital conversion
23	Hui-Chin Tseng, Hsin-Hung Ou, Chi-Sheng Lin, Bin-Da Liu	A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach.	ISLPED	2004	DBLP DOI BibTeX RDF	CMOS analog circuit, flash analog-to-digital converter, rail-to-rail, low power, comparator
23	Hesam Amir Aslanzadeh, Saeid Mehrmanesh, Mohammad B. Vahidfar, Amin Quasem Safarian, Reza Lotfi	A 1-V 1-mW high-speed class AB operational amplifier for high-speed low power pipelined A/D converters using "Slew Boost" technique.	ISLPED	2003	DBLP DOI BibTeX RDF	CMOS analog circuit, Slew Boost technique, class AB, low power, high speed, operational amplifier, pipelined analog to digital converter, ultra low voltage
23	Zoran Cvetkovic, Ingrid Daubechies	Single-Bit Oversampled A/D Conversion with Exponential Accuracy in the Bit-Rate.	Data Compression Conference	2000	DBLP DOI BibTeX RDF	analog-to-digital, single-bit, Oversampling
23	Takao Waho, Kazufumi Hattori, Kouji Honda	Novel Resonant-Tunneling Multiple-Threshold Logic Circuit Based on Switching Sequence Detection.	ISMVL	2000	DBLP DOI BibTeX RDF	Multiple-threshold, analog-to-digital converter, Resonant-tunneling diode
23	W. D. Bartlett	Determination of coherence errors in ADC spectral domain testing.	VTS	1997	DBLP DOI BibTeX RDF	coherence errors, ADC spectral domain testing, clock frequencies input, spectral domain based test, effective number of bits test, 10 MHz, 10 bit, analog-to-digital converter, analogue-digital conversion
23	Andreas Tritschler	A Continuous Time Analog-to-Digital Converter With 90µW and 1.8µV/LSB Based on Differential Ring Oscillator Structures.	ISCAS	2007	DBLP DOI BibTeX RDF
23	Christopher S. Taillefer, Gordon W. Roberts	Delta-Sigma Analog-to-Digital Conversion via Time-Mode Signal Processing.	ISCAS	2007	DBLP DOI BibTeX RDF
22	Richard G. Baraniuk	Compressive sensing.	CISS	2008	DBLP DOI BibTeX RDF
22	Hsin-Wen Ting, Cheng-Wu Lin, Bin-Da Liu, Soon-Jyh Chang	Oscillator-Based Reconfigurable Sinusoidal Signal Generator for ADC BIST.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	Reconfigurable oscillator, Sinusoidal signal generator, Sigma-delta modulator
22	Tamer A. Abdelrahim, Tarek Elesseily, Ahmed Saad Abdou, Khaled M. W. Sharaf	A 12-mW Fully Integrated Low-IF dual-band GPS Receiver on 0.13-µm CMOS.	ISCAS	2007	DBLP DOI BibTeX RDF
22	Jack Murray	Igniting the Spark: Analog to Digital Adaptation of Narrative Affect and Player Subjectivity in Magic: The Gathering through Analog to Digital Adaptation.	FDG	2023	DBLP DOI BibTeX RDF
22	Mahdi Momeni, Mohammad Yavari	Shifting the sampled input signal in successive approximation register analog-to-digital converters to reduce the digital-to-analog converter switching energy and area.	Int. J. Circuit Theory Appl.	2020	DBLP DOI BibTeX RDF
22	Pawel Skrzypiec, Zbigniew Marszalek	Linux Kernel Driver for External Analog-to-Digital and Digital-to-Analog Converters.	MIXDES	2020	DBLP BibTeX RDF
22	Iffa Sharuddin, Lini Lee, Zubaida Binti Yusoff	Analysis design of area efficient segmentation digital to analog converter for ultra-low power successive approximation analog to digital converter.	Microelectron. J.	2016	DBLP DOI BibTeX RDF
22	Jean-Adrien Vernhes	Échantillonnage Non Uniforme: Application aux filtrages et aux conversions CAN/CNA (Convertisseurs Analogique-Numérique et Numérique/Analogique) dans les télécommunications par satellite. (Non Uniform Sampling: Application to filtering and ADC/DAC conversions (Analog-to-Digital and Digital-to-Analog) in the telecommunications by satellite).		2016	RDF
22	Hokyu Lee, Aurangozeb, Sejin Park, Jintae Kim, Chulwoo Kim	A 6-bit 2.5-GS/s Time-Interleaved Analog-to-Digital Converter Using Resistor-Array Sharing Digital-to-Analog Converter.	IEEE Trans. Very Large Scale Integr. Syst.	2015	DBLP DOI BibTeX RDF
22	Ligang Gao, Farnood Merrikh-Bayat, Fabien Alibart, Xinjie Guo, Brian D. Hoskins, Kwang-Ting Cheng, Dmitri B. Strukov	Digital-to-analog and analog-to-digital conversion with metal oxide memristors for ultra-low power computing.	NANOARCH	2013	DBLP DOI BibTeX RDF
22	Matthias Frey, Hans-Andrea Loeliger	On the Static Resolution of Digitally Corrected Analog-to-Digital and Digital-to-Analog Converters With Low-Precision Components.	IEEE Trans. Circuits Syst. I Regul. Pap.	2007	DBLP DOI BibTeX RDF
22	John W. Fattaruso, Louis A. Williams III	Oversampled Analog-to-Digital and Digital-to-Analog Converters.	The VLSI Handbook	1999	DBLP DOI BibTeX RDF
22	Iain D. Craig	Analog-to-Digital and Digital-to-Analog Conversion Techniques (Second Edition) by David F. Hoeschele, John Wiley, New York, 1994, 397 pages including index (Hbk, £58).	Robotica	1995	DBLP DOI BibTeX RDF