Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
66 | Kaoru Kurosawa, Wakaha Ogata |
Bit-Slice Auction Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESORICS ![In: Computer Security - ESORICS 2002, 7th European Symposium on Research in Computer Security, Zurich, Switzerland, October 14-16, 2002, Proceedings, pp. 24-38, 2002, Springer, 3-540-44345-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
mix and match, auction, circuit, bit-slice, multiparty protocol |
53 | Michael Bolotski, Thomas Simon, Carlin Vieri, Rajeevan Amirtharajah, Thomas F. Knight Jr. |
Abacus: a 1024 processor 8 ns SIMD array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 16th Conference on Advanced Research in VLSI (ARVLSI '95), March 27-29, 1995, Chapel Hill, North Carolina, USA, pp. 28-41, 1995, IEEE Computer Society, 0-8186-7047-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
bit-slice computers, Abacus, SIMD array, reconfigurable bit-parallel array, system-level design issues, real-time early vision processing, bit-slice processing element, 8 ns, real-time systems, computer vision, VLSI, parallel architectures, reconfigurable architectures, microarchitecture, VLSI implementation, communication primitives |
40 | Sabyasachi Das, Sunil P. Khatri |
An efficient and regular routing methodology for datapath designsusing net regularity extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(1), pp. 93-101, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
40 | Adi Shamir |
Visual Cryptanalysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '98, International Conference on the Theory and Application of Cryptographic Techniques, Espoo, Finland, May 31 - June 4, 1998, Proceeding, pp. 201-210, 1998, Springer, 3-540-64518-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
visual computation, bit slice computation, parallel computers, Cryptanalysis, quantum computers, DNA computers, photography |
32 | Karl Scheibelhofer |
A Bit-Slice Implementation of the Whirlpool Hash Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CT-RSA ![In: Topics in Cryptology - CT-RSA 2007, The Cryptographers' Track at the RSA Conference 2007, San Francisco, CA, USA, February 5-9, 2007, Proceedings, pp. 385-401, 2007, Springer, 3-540-69327-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
32 | Warren A. Hunt Jr., Bishop Brock |
The Verification of a Bit-slice ALU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hardware Specification, Verification and Synthesis ![In: Hardware Specification, Verification and Synthesis: Mathematical Aspects, Mathematical Science Institute Workshop, Cornall University, Ithaca, New York, USA, July 5-7, 1989, Proceedings, pp. 282-306, 1989, Springer, 3-540-97226-9. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
31 | Mark Hirsch, Daniel P. Siewiorek |
The effect of placement of automatically extracted structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(9), pp. 1140-1152, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
31 | Dongseok Im, Hoi-Jun Yoo |
LUTein: Dense-Sparse Bit-Slice Architecture With Radix-4 LUT-Based Slice-Tensor Processing Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 747-759, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
31 | Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Hoi-Jun Yoo |
Sibia: Signed Bit-slice Architecture for Dense DNN Acceleration with Slice-level Sparsity Exploitation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2023, Montreal, QC, Canada, February 25 - March 1, 2023, pp. 69-80, 2023, IEEE, 978-1-6654-7652-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
30 | Sumeet Kumar, Prateek Pujara, Aneesh Aggarwal |
Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACS ![In: Power-Aware Computer Systems, 4th International Workshop, PACS 2004, Portland, OR, USA, December 5, 2004, Revised Selected Papers, pp. 30-45, 2004, Springer, 3-540-29790-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
26 | Yangjun Chen, Yibin Chen |
On the Signature Tree Construction and Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 18(9), pp. 1207-1224, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
bit-slice files, S-trees, signature trees, information retrieval, Signature files |
26 | Yangjun Chen |
On the Signature Trees and Balanced Signature Trees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDE ![In: Proceedings of the 21st International Conference on Data Engineering, ICDE 2005, 5-8 April 2005, Tokyo, Japan, pp. 742-753, 2005, IEEE Computer Society, 0-7695-2285-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Bit-slice files, S-trees, Signature trees, Information retrieval, Signature files |
26 | Naveen Buddi, Malgorzata Chrzanowska-Jeske, Charles L. Saxe |
Layout synthesis for datapath designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: Proceedings EURO-DAC'95, European Design Automation Conference with EURO-VHDL, Brighton, England, UK, September 18-22, 1995, pp. 86-90, 1995, IEEE Computer Society, 0-8186-7156-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
routing, placement, layout, channel, datapath, bit-slice |
26 | Jaewon Kim, Sung-Mo Kang |
A timing-driven data path layout synthesis with integer programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1995, San Jose, California, USA, November 5-9, 1995, pp. 716-719, 1995, IEEE Computer Society / ACM, 0-8186-7213-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
routing, integer programming, timing-driven placement, data path, bit-slice |
26 | Naofumi Takagi |
A Radix-4 Modular Multiplication Hardware Algorithm for Modular Exponentiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(8), pp. 949-956, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
division subtraction, radix-4 modular multiplication hardware algorithm, residue calculation, repeated multiply-add, serial-parallel modular multiplier, cellular array structure, VLSI, cryptography, digital arithmetic, public-key cryptosystems, modular exponentiation, RSA cryptosystem, redundant representation, bit slice |
26 | Tomlinson Gene Rauscher, Phillip M. Adams |
Microprogramming: A Tutorial and Survey of Recent Developments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 29(1), pp. 2-20, 1980. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
microprogramming applications, Bit slice microprocessors, dynamic microprogramming, microprogrammability |
26 | Kenneth E. Batcher |
Design of a Massively Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 29(9), pp. 837-840, 1980. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
bit-slice processing, image processing, parallel processing, computer architecture, Array processing, satellite imagery |
26 | Tran Sy Nam, Le Quoc Dat, Nguyen Van Long, Nguyen Bui Cuong |
An Optimized Bit-Slice Implementation of Secure 8-Bit Sbox Based on Butterfly Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KSE ![In: 15th International Conference on Knowledge and Systems Engineering, KSE 2023, Hanoi, Vietnam, October 18-20, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-2974-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Guang-Ming Tang, Kazuyoshi Takagi, Naofumi Takagi |
RSFQ 4-bit Bit-Slice Integer Multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 99-C(6), pp. 697-702, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
26 | Nishant J. George, Carl R. Elks, Barry W. Johnson, John C. Lach |
Bit-slice logic interleaving for spatial multi-bit soft-error tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2010, Chicago, IL, USA, June 28 - July 1 2010, pp. 141-150, 2010, IEEE Computer Society, 978-1-4244-7501-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Dogan Ibrahim |
Design of a 16-bit microprogrammable computer with bit-slice devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 4(3), pp. 95-100, 1980. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
|
21 | Chandramouli Gopalakrishnan, Srinivas Katkoori |
An Architectural Leakage Power Simulator for VHDL Structural Datapaths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), New Trends and Technologies for VLSI Systems Design, 20-21 February 2003, Tampa, FL, USA, pp. 211-212, 2003, IEEE Computer Society, 0-7695-1904-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Aleksei Udovenko |
DenseQMC: an efficient bit-slice implementation of the Quine-McCluskey algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2302.10083, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Aleksei Udovenko |
DenseQMC: an efficient bit-slice implementation of the Quine-McCluskey algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2023, pp. 201, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP BibTeX RDF |
|
19 | Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Hoi-Jun Yoo |
Energy-efficient Dense DNN Acceleration with Signed Bit-slice Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2203.07679, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Florian Caullery |
A (Bit)slice of Rainbow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACNS Workshops ![In: Applied Cryptography and Network Security Workshops - ACNS 2021 Satellite Workshops, AIBlock, AIHWS, AIoTS, CIMSS, Cloud S&P, SCI, SecMT, and SiMLA, Kamakura, Japan, June 21-24, 2021, Proceedings, pp. 321-331, 2021, Springer, 978-3-030-81644-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo |
An Energy-Efficient Deep Neural Network Training Processor with Bit-Slice-Level Reconfigurability and Sparsity Exploitation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COOL CHIPS ![In: IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS 2021, Tokyo, Japan, April 14-16, 2021, pp. 1-3, 2021, IEEE, 978-1-6654-1503-3. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | S. Narendran, J. Selvakumar, K. Vijayan |
Reconfigurable Superconducting FFT Processor Using Bit-Slice Block Share Processing Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 79, pp. 103297, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Nandini Av, Nilita Anil Kumar |
Image Encryption Using Genetic Algorithm and Bit-Slice Rotation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCNT ![In: 11th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2020, Kharagpur, India, July 1-3, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-6851-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Jingyang Zhang, Huanrui Yang, Fan Chen 0001, Yitu Wang, Hai Li 0001 |
Exploring Bit-Slice Sparsity in Deep Neural Networks for Efficient ReRAM-Based Deployment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1909.08496, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
19 | Jingyang Zhang, Huanrui Yang, Fan Chen 0001, Yitu Wang, Hai Li 0001 |
Exploring Bit-Slice Sparsity in Deep Neural Networks for Efficient ReRAM-Based Deployment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMC2@NeurIPS ![In: Fifth Workshop on Energy Efficient Machine Learning and Cognitive Computing - NeurIPS Edition, EMC2@NeurIPS 2019, Vancouver, Canada, December 13, 2019, pp. 1-5, 2019, IEEE, 978-1-6654-2418-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Jingbin Zhang, Meng Ma, Ping Wang 0003 |
Fast Implementation for SM4 Cipher Algorithm Based on Bit-Slice Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SmartCom ![In: Smart Computing and Communication - Third International Conference, SmartCom 2018, Tokyo, Japan, December 10-12, 2018, Proceedings, pp. 104-113, 2018, Springer, 978-3-030-05754-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Takuho Mitsunaga, Yoshifumi Manabe, Tatsuaki Okamoto |
A Secure M + 1st Price Auction Protocol Based on Bit Slice Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(8), pp. 1591-1599, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Guang-Ming Tang |
Studies on Datapath Circuits for Superconductor Bit-Slice Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2016 |
RDF |
|
19 | Wentao Zhang, Zhenzhen Bao, Dongdai Lin, Vincent Rijmen, Bohan Yang 0001, Ingrid Verbauwhede |
RECTANGLE: a bit-slice lightweight block cipher suitable for multiple platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Inf. Sci. ![In: Sci. China Inf. Sci. 58(12), pp. 1-15, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Wentao Zhang, Zhenzhen Bao, Dongdai Lin, Vincent Rijmen, Bohan Yang 0001, Ingrid Verbauwhede |
RECTANGLE: A Bit-slice Ultra-Lightweight Block Cipher Suitable for Multiple Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2014, pp. 84, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
19 | Massimo Alioto, Simone Bongiovanni, Giuseppe Scotti, Alessandro Trifiletti |
Leakage Power Analysis attacks against a bit slice implementation of the Serpent block cipher. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2014, Lviv, Ukraine, June 19-21, 2014, pp. 241-246, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Takuho Mitsunaga, Yoshifumi Manabe, Tatsuaki Okamoto |
A Secure M + 1st Price Auction Protocol Based on Bit Slice Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSEC ![In: Advances in Information and Computer Security - 6th International Workshop, IWSEC 2011, Tokyo, Japan, November 8-10, 2011. Proceedings, pp. 51-64, 2011, Springer, 978-3-642-25140-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
19 | Igor V. Zotov |
Distributed Virtual Bit-Slice Synchronizer: A Scalable Hardware Barrier Mechanism for n-Dimensional Meshes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 59(9), pp. 1187-1199, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
19 | André Stauffer, Joël Rossier |
Bio-inspired bit slice processors with self-test and self-repair mechanisms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: 2010 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2010, Anaheim, California, USA, June 15-18, 2010, pp. 44-51, 2010, IEEE Computer Society, 978-1-4244-5887-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
19 | André Stauffer, Joël Rossier |
Bio-inspired Self-Testing and Self-Organizing Bit Slice Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 427-432, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
configurable molecule, cicatrization, test, configuration, regeneration |
19 | André Stauffer, Joël Rossier |
Self-organizing configurable bit slice processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Congress on Evolutionary Computation ![In: Proceedings of the IEEE Congress on Evolutionary Computation, CEC 2009, Trondheim, Norway, 18-21 May, 2009, pp. 2288-2293, 2009, IEEE, 978-1-4244-2958-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Kaoru Kurosawa, Wakaha Ogata |
Bit-Slice Auction Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2002, pp. 189, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
19 | Hiromi Hiraishi |
Towards Verification of Bit-Slice Circuits-Time-Space Modal Model Checking Approach-. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 78-D(7), pp. 791-795, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP BibTeX RDF |
|
19 | Mashkuri Yaacob, Ibrahim Abubakr |
A Built-in Self-Testing Bit Slice Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Applied Informatics ![In: The 12st IASTED International Conference on Applied Informatics, May 18-20, 1994, Annecy, France, pp. 177-179, 1994, IASTED/ACTA Press, 0-88986-190-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
19 | Régis Leveugle, C. Safina |
Generation of optimized datapaths: bit-slice versus standard cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Synthesis for Control Dominated Circuits ![In: Synthesis for Control Dominated Circuits, Selected papers from the IFIP WG10.2/WG10.5 Workshops, Grenoble, France, April and September, 1992, pp. 153-166, 1992, North-Holland, 0-444-81479-5. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP BibTeX RDF |
|
19 | Michael J. Miller |
Introduction to CMOS breathes new life into bit-slice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 15(5), pp. 279-283, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
19 | Parag K. Lala |
A scheme for designing fault-tolerant microprogrammed processors using bit-slice chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocessing and Microprogramming ![In: Microprocessing and Microprogramming 29(4), pp. 217-223, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
19 | Vladimir Friedman, Douglas M. Brinthaupt, D.-P. Chen, Timothy W. Deppa, John P. Elward Jr., Evelyn M. Fields, Hanafy Meleis |
A bit-slice architecture for sigma-delta analog-to-digital converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Sel. Areas Commun. ![In: IEEE J. Sel. Areas Commun. 6(3), pp. 520-526, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
19 | S. Sanyal, P. V. S. Rao |
Design of a high reliability self diagnosing computer using bit slice microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microprogramming ![In: Microprocess. Microprogramming 22(5), pp. 325-331, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
19 | Georg Roll |
Ein mikroprogrammierter Bit-Slice-Assoziativprozessor zur Unterstützung paralleler Rechnerarchitekturen. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
1988 |
RDF |
|
19 | Amjad Soomro, Sadiq M. Sait, Mushfiqur Rahman |
Bit-slice microprocessor-based communications decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 11(10), pp. 527-533, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
19 | Forbes J. Burkowski |
An interactive diagnostic/debugging subsystem for bit-slice processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 18th annual workshop on Microprogramming, Pacific Grove, CA, USA, December 3-6, 1985, pp. 35-46, 1985, ACM/IEEE, 0-89791-172-5. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
19 | J. Welford |
Using APL to understand bit-slice microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APL ![In: Proceedings of the international conference on APL, APL 1984, Helsinki, Finland, June 11-15, 1984, pp. 381-385, 1984, ACM, 978-0-89791-137-5. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
|
19 | Young Gil Park, Jung Wan Cho |
Fault Diagnosis of Bit-Slice Processor ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, pp. 166-172, 1983, ACM, 0-89791-101-6. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
|
19 | A. J. Walker |
Teaching bit-slice microprocessor applications using simulation techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 5(9), pp. 387-393, 1981. The full citation details ...](Pics/full.jpeg) |
1981 |
DBLP DOI BibTeX RDF |
|
19 | Dusan Baciak |
Kopplung von Bit-Slice Mikroprozessoren. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
1981 |
RDF |
|
19 | Dogan Ibrahim |
Design of a microprogrammable computer with bit-slice devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 4(2), pp. 57-62, 1980. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
|
19 | John R. Mick, Bernard New |
Bit slice devices for signal processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '80, Denver, Colorado, USA, April 9-11, 1980, pp. 372-375, 1980, IEEE. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
|
19 | Peter Albrich, Hans-Georg Mitscherlich |
Eine Architektur zur Interpretation abstrakter Maschinenbefehle auf der Basis von 4-Bit-Slice Mikroprozessoren. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microcomputing ![In: Microcomputing, Tagung III/1979 des German Chapter of the ACM am 24. und 25.10.1979 in München, pp. 40-56, 1979, Teubner, 3-519-02422-5. The full citation details ...](Pics/full.jpeg) |
1979 |
DBLP BibTeX RDF |
|
19 | Bryan D. Ackland |
A Bit-Slice Cache Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 6th Annual Symposium on Computer Architecture, Philadelphia, PA, USA, April 1979, pp. 75-82, 1979, ACM, 978-1-4503-7397-5. The full citation details ...](Pics/full.jpeg) |
1979 |
DBLP DOI BibTeX RDF |
|
19 | V. Michael Powers, José H. Hernandez |
Microsystems Microprogram Assemblers for Bit Slice Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 11(7), pp. 108-120, 1978. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
|
19 | Bernard J. Carey, George F. MacLachlan |
Automated design based upon Microprogrammable Bit Slice Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Design Automation and Microprocessors ![In: Proceedings of the Symposium on Design Automation and Microprocessors, Palo Alto, California, February 24-25, 1977., pp. 20-24, 1977, IEEE Press / ACM Digital Library. The full citation details ...](Pics/full.jpeg) |
1977 |
DBLP BibTeX RDF |
|
19 | Michael Andrews |
A bit slice architecture for microprogrammable machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 9th annual workshop on Microprogramming, MICRO 1976, New Orleans, Louisiana, USA, September 27-29, 1976, pp. 5-8, 1976, ACM. The full citation details ...](Pics/full.jpeg) |
1976 |
DBLP DOI BibTeX RDF |
|
19 | Brian R. Mestan, Mikko H. Lipasti |
Exploiting Partial Operand Knowledge. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 32nd International Conference on Parallel Processing (ICPP 2003), 6-9 October 2003, Kaohsiung, Taiwan, pp. 369-378, 2003, IEEE Computer Society, 0-7695-2017-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Charles D. Creusere |
Understanding perceptual distortion in MPEG scalable audio coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Speech Audio Process. ![In: IEEE Trans. Speech Audio Process. 13(3), pp. 422-431, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Yangjun Chen |
On the General Signature Trees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DEXA ![In: Database and Expert Systems Applications, 16th International Conference, DEXA 2005, Copenhagen, Denmark, August 22-26, 2005, Proceedings, pp. 207-219, 2005, Springer, 3-540-28566-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
signature identifier, signature tree, information retrieval, index, signature file |
16 | Marcelo E. Kaihara, Naofumi Takagi |
A VLSI Algorithm for Modular Multiplication/Division. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 15-18 June 2003, Santiago de Compostela, Spain, pp. 220-227, 2003, IEEE Computer Society, 0-7695-1894-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Charles D. Creusere |
An Analysis of Perceptual Artifacts in MPEG Scalable Audio Coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DCC ![In: 2002 Data Compression Conference (DCC 2002), 2-4 April, 2002, Snowbird, UT, USA, pp. 152-161, 2002, IEEE Computer Society, 0-7695-1477-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
16 | Suntae Hwang, Rochit Rajsuman, Yashwant K. Malaiya |
On the testing of microprogrammed processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990, Orlando, Florida, USA, November 27-29, 1990, pp. 260-266, 1990, ACM/IEEE, 0-89791-413-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP BibTeX RDF |
|
16 | Frank Hoornaert, Marc Decroos, Joos Vandewalle, René Govaerts |
Fast RSA-Hardware: Dream or Reality? ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '88, Workshop on the Theory and Application of of Cryptographic Techniques, Davos, Switzerland, May 25-27, 1988, Proceedings, pp. 257-264, 1988, Springer, 3-540-50251-3. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
16 | Martin Kochanski |
Developing an RSA Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CRYPTO ![In: Advances in Cryptology - CRYPTO '85, Santa Barbara, California, USA, August 18-22, 1985, Proceedings, pp. 350-357, 1985, Springer, 3-540-16463-4. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
13 | Marcelo E. Kaihara, Naofumi Takagi |
A Hardware Algorithm for Modular Multiplication/Division. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(1), pp. 12-21, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
modular division, cryptography, Computer arithmetic, modular multiplication, redundant representation, hardware algorithm |
13 | C. V. Krishna, Nur A. Touba |
Adjustable Width Linear Combinational Scan Vector Decompression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 863-866, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
10 | Nobuyuki Sugio, Shunichi Nambu, Toshinobu Kaneko |
A Fast Calculus for the Linearizing Attack and Its Application to an Attack on KASUMI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAECC ![In: Applied Algebra, Algebraic Algorithms and Error-Correcting Codes, 16th International Symposium, AAECC-16, Las Vegas, NV, USA, February 20-24, 2006, Proceedings, pp. 163-172, 2006, Springer, 3-540-31423-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
10 | Alessandro Cilardo, Antonino Mazzeo, Luigi Romano, Giacinto Paolo Saggese |
Carry-Save Montgomery Modular Exponentiation on Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 206-211, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
10 | Donald W. Bouldin, Adam Miller, Chandra Tan |
Teaching Custom Integrated Circuit Design and Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2003 International Conference on Microelectronics Systems Education, MSE 2003, Educating Tomorrow's Microsystems Designers, Anaheim, CA, USA, June 1-2, 2003, pp. 139-140, 2003, IEEE Computer Society, 0-7695-1973-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
10 | Nils Maltesson, David Naccache, Elena Trichina, Christophe Tymen |
Applet Verification Strategiesfor RAM-Constrained Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICISC ![In: Information Security and Cryptology - ICISC 2002, 5th International Conference Seoul, Korea, November 28-29, 2002, Revised Papers, pp. 118-137, 2002, Springer, 3-540-00716-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
10 | Timothy J. Callahan, John Wawrzynek |
Datapath-oriented FPGA mapping and placement for configurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 16-18 April 1997, Napa Valley, CA, USA, pp. 234-235, 1997, IEEE Computer Society, 0-8186-8159-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
10 | Michael Weeks, M. B. Maaz, H. Krishnamurthy, Paul Shipley, Magdy A. Bayoumi |
A prototype chipset for a large scaleable ATM switching node. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 13-15 March 1997, Urbana, IL, USA, pp. 131-136, 1997, IEEE Computer Society, 0-8186-7904-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
prototype chipset, large scaleable ATM switching node, static logic, packet headers storage, dynamic logic, register file, CMOS digital integrated circuits, banyan network, CMOS IC, 1 micron |
10 | Venkat Thanvantri, Sartaj Sahni |
Optimal folding of standard and custom cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 1(1), pp. 123-143, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
custom cell folding, standard cell folding, layout area |
10 | Andrzej Krasniewski |
Design of Dependable Hardware: What BIST is most Efficient? ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Dependable Computing - EDCC-2, Second European Dependable Computing Conference, Taormina, Italy, October 2-4, 1996, Proceedings, pp. 233-245, 1996, Springer, 3-540-61772-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
10 | Philippe Royannez, Amara Amara |
A 1.0ns 64-bits GaAs Adder using Quad tree algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), March 22-23, 1996, Ames, IA, USA, pp. 24-28, 1996, IEEE Computer Society, 0-8186-7502-0. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
10 | Yakov I. Fet |
Vertical Processing Systems: A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 15(1), pp. 65-75, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
10 | Paul Molitor |
Constrained via minimization for systolic arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(5), pp. 537-542, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
10 | Forrest Brewer, Barry M. Pangrle, Andrew Seawright |
Interconnection synthesis with geometric constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990, Orlando, Florida, USA, November 27-29, 1990, pp. 158-165, 1990, ACM/IEEE, 0-89791-413-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP BibTeX RDF |
|
10 | Holger Sedlak |
The RSA Cryptography Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '87, Workshop on the Theory and Application of of Cryptographic Techniques, Amsterdam, The Netherlands, April 13-15, 1987, Proceedings, pp. 95-105, 1987, Springer, 3-540-19102-X. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|