Search results for "bit-slice"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
66	Kaoru Kurosawa, Wakaha Ogata	Bit-Slice Auction Circuit.	ESORICS	2002	DBLP DOI BibTeX RDF	mix and match, auction, circuit, bit-slice, multiparty protocol
53	Michael Bolotski, Thomas Simon, Carlin Vieri, Rajeevan Amirtharajah, Thomas F. Knight Jr.	Abacus: a 1024 processor 8 ns SIMD array.	ARVLSI	1995	DBLP DOI BibTeX RDF	bit-slice computers, Abacus, SIMD array, reconfigurable bit-parallel array, system-level design issues, real-time early vision processing, bit-slice processing element, 8 ns, real-time systems, computer vision, VLSI, parallel architectures, reconfigurable architectures, microarchitecture, VLSI implementation, communication primitives
40	Sabyasachi Das, Sunil P. Khatri	An efficient and regular routing methodology for datapath designsusing net regularity extraction.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
40	Adi Shamir	Visual Cryptanalysis.	EUROCRYPT	1998	DBLP DOI BibTeX RDF	visual computation, bit slice computation, parallel computers, Cryptanalysis, quantum computers, DNA computers, photography
32	Karl Scheibelhofer	A Bit-Slice Implementation of the Whirlpool Hash Function.	CT-RSA	2007	DBLP DOI BibTeX RDF
32	Warren A. Hunt Jr., Bishop Brock	The Verification of a Bit-slice ALU.	Hardware Specification, Verification and Synthesis	1989	DBLP DOI BibTeX RDF
31	Mark Hirsch, Daniel P. Siewiorek	The effect of placement of automatically extracted structure.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1992	DBLP DOI BibTeX RDF
31	Dongseok Im, Hoi-Jun Yoo	LUTein: Dense-Sparse Bit-Slice Architecture With Radix-4 LUT-Based Slice-Tensor Processing Units.	HPCA	2024	DBLP DOI BibTeX RDF
31	Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Hoi-Jun Yoo	Sibia: Signed Bit-slice Architecture for Dense DNN Acceleration with Slice-level Sparsity Exploitation.	HPCA	2023	DBLP DOI BibTeX RDF
30	Sumeet Kumar, Prateek Pujara, Aneesh Aggarwal	Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors.	PACS	2004	DBLP DOI BibTeX RDF
26	Yangjun Chen, Yibin Chen	On the Signature Tree Construction and Analysis.	IEEE Trans. Knowl. Data Eng.	2006	DBLP DOI BibTeX RDF	bit-slice files, S-trees, signature trees, information retrieval, Signature files
26	Yangjun Chen	On the Signature Trees and Balanced Signature Trees.	ICDE	2005	DBLP DOI BibTeX RDF	Bit-slice files, S-trees, Signature trees, Information retrieval, Signature files
26	Naveen Buddi, Malgorzata Chrzanowska-Jeske, Charles L. Saxe	Layout synthesis for datapath designs.	EURO-DAC	1995	DBLP DOI BibTeX RDF	routing, placement, layout, channel, datapath, bit-slice
26	Jaewon Kim, Sung-Mo Kang	A timing-driven data path layout synthesis with integer programming.	ICCAD	1995	DBLP DOI BibTeX RDF	routing, integer programming, timing-driven placement, data path, bit-slice
26	Naofumi Takagi	A Radix-4 Modular Multiplication Hardware Algorithm for Modular Exponentiation.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	division subtraction, radix-4 modular multiplication hardware algorithm, residue calculation, repeated multiply-add, serial-parallel modular multiplier, cellular array structure, VLSI, cryptography, digital arithmetic, public-key cryptosystems, modular exponentiation, RSA cryptosystem, redundant representation, bit slice
26	Tomlinson Gene Rauscher, Phillip M. Adams	Microprogramming: A Tutorial and Survey of Recent Developments.	IEEE Trans. Computers	1980	DBLP DOI BibTeX RDF	microprogramming applications, Bit slice microprocessors, dynamic microprogramming, microprogrammability
26	Kenneth E. Batcher	Design of a Massively Parallel Processor.	IEEE Trans. Computers	1980	DBLP DOI BibTeX RDF	bit-slice processing, image processing, parallel processing, computer architecture, Array processing, satellite imagery
26	Tran Sy Nam, Le Quoc Dat, Nguyen Van Long, Nguyen Bui Cuong	An Optimized Bit-Slice Implementation of Secure 8-Bit Sbox Based on Butterfly Structure.	KSE	2023	DBLP DOI BibTeX RDF
26	Guang-Ming Tang, Kazuyoshi Takagi, Naofumi Takagi	RSFQ 4-bit Bit-Slice Integer Multiplier.	IEICE Trans. Electron.	2016	DBLP DOI BibTeX RDF
26	Nishant J. George, Carl R. Elks, Barry W. Johnson, John C. Lach	Bit-slice logic interleaving for spatial multi-bit soft-error tolerance.	DSN	2010	DBLP DOI BibTeX RDF
26	Dogan Ibrahim	Design of a 16-bit microprogrammable computer with bit-slice devices.	Microprocess. Microsystems	1980	DBLP DOI BibTeX RDF
21	Chandramouli Gopalakrishnan, Srinivas Katkoori	An Architectural Leakage Power Simulator for VHDL Structural Datapaths.	ISVLSI	2003	DBLP DOI BibTeX RDF
19	Aleksei Udovenko	DenseQMC: an efficient bit-slice implementation of the Quine-McCluskey algorithm.	CoRR	2023	DBLP DOI BibTeX RDF
19	Aleksei Udovenko	DenseQMC: an efficient bit-slice implementation of the Quine-McCluskey algorithm.	IACR Cryptol. ePrint Arch.	2023	DBLP BibTeX RDF
19	Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Hoi-Jun Yoo	Energy-efficient Dense DNN Acceleration with Signed Bit-slice Architecture.	CoRR	2022	DBLP DOI BibTeX RDF
19	Florian Caullery	A (Bit)slice of Rainbow.	ACNS Workshops	2021	DBLP DOI BibTeX RDF
19	Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo	An Energy-Efficient Deep Neural Network Training Processor with Bit-Slice-Level Reconfigurability and Sparsity Exploitation.	COOL CHIPS	2021	DBLP DOI BibTeX RDF
19	S. Narendran, J. Selvakumar, K. Vijayan	Reconfigurable Superconducting FFT Processor Using Bit-Slice Block Share Processing Unit.	Microprocess. Microsystems	2020	DBLP DOI BibTeX RDF
19	Nandini Av, Nilita Anil Kumar	Image Encryption Using Genetic Algorithm and Bit-Slice Rotation.	ICCCNT	2020	DBLP DOI BibTeX RDF
19	Jingyang Zhang, Huanrui Yang, Fan Chen 0001, Yitu Wang, Hai Li 0001	Exploring Bit-Slice Sparsity in Deep Neural Networks for Efficient ReRAM-Based Deployment.	CoRR	2019	DBLP BibTeX RDF
19	Jingyang Zhang, Huanrui Yang, Fan Chen 0001, Yitu Wang, Hai Li 0001	Exploring Bit-Slice Sparsity in Deep Neural Networks for Efficient ReRAM-Based Deployment.	EMC2@NeurIPS	2019	DBLP DOI BibTeX RDF
19	Jingbin Zhang, Meng Ma, Ping Wang 0003	Fast Implementation for SM4 Cipher Algorithm Based on Bit-Slice Technology.	SmartCom	2018	DBLP DOI BibTeX RDF
19	Takuho Mitsunaga, Yoshifumi Manabe, Tatsuaki Okamoto	A Secure M + 1st Price Auction Protocol Based on Bit Slice Circuits.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2016	DBLP DOI BibTeX RDF
19	Guang-Ming Tang	Studies on Datapath Circuits for Superconductor Bit-Slice Microprocessors.		2016	RDF
19	Wentao Zhang, Zhenzhen Bao, Dongdai Lin, Vincent Rijmen, Bohan Yang 0001, Ingrid Verbauwhede	RECTANGLE: a bit-slice lightweight block cipher suitable for multiple platforms.	Sci. China Inf. Sci.	2015	DBLP DOI BibTeX RDF
19	Wentao Zhang, Zhenzhen Bao, Dongdai Lin, Vincent Rijmen, Bohan Yang 0001, Ingrid Verbauwhede	RECTANGLE: A Bit-slice Ultra-Lightweight Block Cipher Suitable for Multiple Platforms.	IACR Cryptol. ePrint Arch.	2014	DBLP BibTeX RDF
19	Massimo Alioto, Simone Bongiovanni, Giuseppe Scotti, Alessandro Trifiletti	Leakage Power Analysis attacks against a bit slice implementation of the Serpent block cipher.	MIXDES	2014	DBLP DOI BibTeX RDF
19	Takuho Mitsunaga, Yoshifumi Manabe, Tatsuaki Okamoto	A Secure M + 1st Price Auction Protocol Based on Bit Slice Circuits.	IWSEC	2011	DBLP DOI BibTeX RDF
19	Igor V. Zotov	Distributed Virtual Bit-Slice Synchronizer: A Scalable Hardware Barrier Mechanism for n-Dimensional Meshes.	IEEE Trans. Computers	2010	DBLP DOI BibTeX RDF
19	André Stauffer, Joël Rossier	Bio-inspired bit slice processors with self-test and self-repair mechanisms.	AHS	2010	DBLP DOI BibTeX RDF
19	André Stauffer, Joël Rossier	Bio-inspired Self-Testing and Self-Organizing Bit Slice Processors.	ReConFig	2009	DBLP DOI BibTeX RDF	configurable molecule, cicatrization, test, configuration, regeneration
19	André Stauffer, Joël Rossier	Self-organizing configurable bit slice processors.	IEEE Congress on Evolutionary Computation	2009	DBLP DOI BibTeX RDF
19	Kaoru Kurosawa, Wakaha Ogata	Bit-Slice Auction Circuit.	IACR Cryptol. ePrint Arch.	2002	DBLP BibTeX RDF
19	Hiromi Hiraishi	Towards Verification of Bit-Slice Circuits-Time-Space Modal Model Checking Approach-.	IEICE Trans. Inf. Syst.	1995	DBLP BibTeX RDF
19	Mashkuri Yaacob, Ibrahim Abubakr	A Built-in Self-Testing Bit Slice Microprocessor.	Applied Informatics	1994	DBLP BibTeX RDF
19	Régis Leveugle, C. Safina	Generation of optimized datapaths: bit-slice versus standard cells.	Synthesis for Control Dominated Circuits	1992	DBLP BibTeX RDF
19	Michael J. Miller	Introduction to CMOS breathes new life into bit-slice.	Microprocess. Microsystems	1991	DBLP DOI BibTeX RDF
19	Parag K. Lala	A scheme for designing fault-tolerant microprogrammed processors using bit-slice chips.	Microprocessing and Microprogramming	1990	DBLP DOI BibTeX RDF
19	Vladimir Friedman, Douglas M. Brinthaupt, D.-P. Chen, Timothy W. Deppa, John P. Elward Jr., Evelyn M. Fields, Hanafy Meleis	A bit-slice architecture for sigma-delta analog-to-digital converters.	IEEE J. Sel. Areas Commun.	1988	DBLP DOI BibTeX RDF
19	S. Sanyal, P. V. S. Rao	Design of a high reliability self diagnosing computer using bit slice microprocessors.	Microprocess. Microprogramming	1988	DBLP DOI BibTeX RDF
19	Georg Roll	Ein mikroprogrammierter Bit-Slice-Assoziativprozessor zur Unterstützung paralleler Rechnerarchitekturen.		1988	RDF
19	Amjad Soomro, Sadiq M. Sait, Mushfiqur Rahman	Bit-slice microprocessor-based communications decoder.	Microprocess. Microsystems	1987	DBLP DOI BibTeX RDF
19	Forbes J. Burkowski	An interactive diagnostic/debugging subsystem for bit-slice processors.	MICRO	1985	DBLP DOI BibTeX RDF
19	J. Welford	Using APL to understand bit-slice microprocessors.	APL	1984	DBLP DOI BibTeX RDF
19	Young Gil Park, Jung Wan Cho	Fault Diagnosis of Bit-Slice Processor	ISCA	1983	DBLP DOI BibTeX RDF
19	A. J. Walker	Teaching bit-slice microprocessor applications using simulation techniques.	Microprocess. Microsystems	1981	DBLP DOI BibTeX RDF
19	Dusan Baciak	Kopplung von Bit-Slice Mikroprozessoren.		1981	RDF
19	Dogan Ibrahim	Design of a microprogrammable computer with bit-slice devices.	Microprocess. Microsystems	1980	DBLP DOI BibTeX RDF
19	John R. Mick, Bernard New	Bit slice devices for signal processing.	ICASSP	1980	DBLP DOI BibTeX RDF
19	Peter Albrich, Hans-Georg Mitscherlich	Eine Architektur zur Interpretation abstrakter Maschinenbefehle auf der Basis von 4-Bit-Slice Mikroprozessoren.	Microcomputing	1979	DBLP BibTeX RDF
19	Bryan D. Ackland	A Bit-Slice Cache Controller.	ISCA	1979	DBLP DOI BibTeX RDF
19	V. Michael Powers, José H. Hernandez	Microsystems Microprogram Assemblers for Bit Slice Microprocessors.	Computer	1978	DBLP DOI BibTeX RDF
19	Bernard J. Carey, George F. MacLachlan	Automated design based upon Microprogrammable Bit Slice Microprocessors.	Design Automation and Microprocessors	1977	DBLP BibTeX RDF
19	Michael Andrews	A bit slice architecture for microprogrammable machines.	MICRO	1976	DBLP DOI BibTeX RDF
19	Brian R. Mestan, Mikko H. Lipasti	Exploiting Partial Operand Knowledge.	ICPP	2003	DBLP DOI BibTeX RDF
16	Charles D. Creusere	Understanding perceptual distortion in MPEG scalable audio coding.	IEEE Trans. Speech Audio Process.	2005	DBLP DOI BibTeX RDF
16	Yangjun Chen	On the General Signature Trees.	DEXA	2005	DBLP DOI BibTeX RDF	signature identifier, signature tree, information retrieval, index, signature file
16	Marcelo E. Kaihara, Naofumi Takagi	A VLSI Algorithm for Modular Multiplication/Division.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
16	Charles D. Creusere	An Analysis of Perceptual Artifacts in MPEG Scalable Audio Coding.	DCC	2002	DBLP DOI BibTeX RDF
16	Suntae Hwang, Rochit Rajsuman, Yashwant K. Malaiya	On the testing of microprogrammed processor.	MICRO	1990	DBLP BibTeX RDF
16	Frank Hoornaert, Marc Decroos, Joos Vandewalle, René Govaerts	Fast RSA-Hardware: Dream or Reality?	EUROCRYPT	1988	DBLP DOI BibTeX RDF
16	Martin Kochanski	Developing an RSA Chip.	CRYPTO	1985	DBLP DOI BibTeX RDF
13	Marcelo E. Kaihara, Naofumi Takagi	A Hardware Algorithm for Modular Multiplication/Division.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	modular division, cryptography, Computer arithmetic, modular multiplication, redundant representation, hardware algorithm
13	C. V. Krishna, Nur A. Touba	Adjustable Width Linear Combinational Scan Vector Decompression.	ICCAD	2003	DBLP DOI BibTeX RDF
10	Nobuyuki Sugio, Shunichi Nambu, Toshinobu Kaneko	A Fast Calculus for the Linearizing Attack and Its Application to an Attack on KASUMI.	AAECC	2006	DBLP DOI BibTeX RDF
10	Alessandro Cilardo, Antonino Mazzeo, Luigi Romano, Giacinto Paolo Saggese	Carry-Save Montgomery Modular Exponentiation on Reconfigurable Hardware.	DATE	2004	DBLP DOI BibTeX RDF
10	Donald W. Bouldin, Adam Miller, Chandra Tan	Teaching Custom Integrated Circuit Design and Verification.	MSE	2003	DBLP DOI BibTeX RDF
10	Nils Maltesson, David Naccache, Elena Trichina, Christophe Tymen	Applet Verification Strategiesfor RAM-Constrained Devices.	ICISC	2002	DBLP DOI BibTeX RDF
10	Timothy J. Callahan, John Wawrzynek	Datapath-oriented FPGA mapping and placement for configurable computing.	FCCM	1997	DBLP DOI BibTeX RDF
10	Michael Weeks, M. B. Maaz, H. Krishnamurthy, Paul Shipley, Magdy A. Bayoumi	A prototype chipset for a large scaleable ATM switching node.	Great Lakes Symposium on VLSI	1997	DBLP DOI BibTeX RDF	prototype chipset, large scaleable ATM switching node, static logic, packet headers storage, dynamic logic, register file, CMOS digital integrated circuits, banyan network, CMOS IC, 1 micron
10	Venkat Thanvantri, Sartaj Sahni	Optimal folding of standard and custom cells.	ACM Trans. Design Autom. Electr. Syst.	1996	DBLP DOI BibTeX RDF	custom cell folding, standard cell folding, layout area
10	Andrzej Krasniewski	Design of Dependable Hardware: What BIST is most Efficient?	EDCC	1996	DBLP DOI BibTeX RDF
10	Philippe Royannez, Amara Amara	A 1.0ns 64-bits GaAs Adder using Quad tree algorithm.	Great Lakes Symposium on VLSI	1996	DBLP DOI BibTeX RDF
10	Yakov I. Fet	Vertical Processing Systems: A Survey.	IEEE Micro	1995	DBLP DOI BibTeX RDF
10	Paul Molitor	Constrained via minimization for systolic arrays.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1990	DBLP DOI BibTeX RDF
10	Forrest Brewer, Barry M. Pangrle, Andrew Seawright	Interconnection synthesis with geometric constraints.	MICRO	1990	DBLP BibTeX RDF
10	Holger Sedlak	The RSA Cryptography Processor.	EUROCRYPT	1987	DBLP DOI BibTeX RDF