Search results for "comparators"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
93	Dmitry Ponomarev 0001, Gurhan Kucuk, Oguz Ergin, Kanad Ghose	Power efficient comparators for long arguments in superscalar processors.	ISLPED	2003	DBLP DOI BibTeX RDF	low-power comparators, superscalar datapath
92	Xrysovalantis Kavousianos, Dimitris Nikolos	Self-exercising self testing k-order comparators.	VTS	1997	DBLP DOI BibTeX RDF	self testing k-order comparators, self-exercising comparators, equality comparator, fault tolerant cache memory, built-in self test, error correction codes, combinational circuit, error detection codes, broadcast networks
83	Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose	Energy Efficient Comparators for Superscalar Datapaths.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF
83	Germán Fabregat, Jose V. Marti, German Leon	Parity Sensitive Comparators.	PRDC	1999	DBLP DOI BibTeX RDF
59	Cecilia Metra, Michele Favalli, Bruno Riccò	Highly testable and compact single output comparator.	VTS	1997	DBLP DOI BibTeX RDF	comparators (circuits), single output comparator, self-checking n-input comparator, n-variable two-rail checker, equality checker, strongly code-disjoint, input code words, embedded comparators, VLSI, fault detection, totally-self-checking
57	Takahide Sato, Shigetaka Takagi, Nobuo Fujii	Low-power design technique for flash A/D converters based on reduction of the number of comparators.	ISCAS	2007	DBLP DOI BibTeX RDF
57	Matthias Frey, Hans-Andrea Loeliger	On flash A/D-converters with low-precision comparators.	ISCAS	2006	DBLP DOI BibTeX RDF
57	Daniela De Venuto, Michael J. Ohletz, Bruno Riccò	Automatic Repositioning Technique for Digital Cell Based Window Comparators and Implementation within Mixed-Signal DfT Schemes.	ISQED	2003	DBLP DOI BibTeX RDF
57	Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev 0001	A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors.	ICCD	2002	DBLP DOI BibTeX RDF
47	Jianli Sun, Eduard Cerny, Jan Gecsei	Fault Tolerance in a Class of Sorting Networks.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	comparators (circuits), single-fault tolerance, 1-fault tolerant design, balanced sorting network, 2-fault tolerant design, fault tolerance, reliability, parallel processing, fault tolerant computing, fault tolerant computing, sorting, comparators, sorting networks, multistage network
45	Lauri Sumanen, Mikko Waltari, Väinö Hakkarainen, Kari Halonen	CMOS dynamic comparators for pipeline A/D converters.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
45	Daniela De Venuto, Michael J. Ohletz	On-Chip Test for Mixed-Signal ASICs using Two-Mode Comparators with Bias-Programmable Reference Voltages.	J. Electron. Test.	2001	DBLP DOI BibTeX RDF	mixed-signal ASIC, hardware conversion, GO/NOGO test, bias programming, DfT, power consumption, overhead
38	Houman Homayoun, Ted H. Szymanski	Reducing the Instruction Queue Leakage Power in Superscalar Processors.	CCECE	2006	DBLP DOI BibTeX RDF
38	Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi	Quantum Voltage Comparator for 0.07 mum CMOS Flash A/D Converters.	ISVLSI	2003	DBLP DOI BibTeX RDF
38	Dan Ernst, Todd M. Austin	Efficient Dynamic Scheduling Through Tag Elimination.	ISCA	2002	DBLP DOI BibTeX RDF	complexity-effective architecture, last-tag prediction, dynamic scheduling, low-power architecture
38	Subhasish Mitra, Edward J. McCluskey	Design Diversity for Concurrent Error Detection in Sequential Logic Circuts.	VTS	2001	DBLP DOI BibTeX RDF
38	R. W. L. Kam, Jimmy Ho-Man Lee	Fuzzifying the Constraint Hierarchies Framework.	CP	1998	DBLP DOI BibTeX RDF
38	Chaitali Chakrabarti, Li-Yu Wang	Novel sorting network-based architectures for rank order filters.	IEEE Trans. Very Large Scale Integr. Syst.	1994	DBLP DOI BibTeX RDF
38	Yinong Chen, Winfried Bücken, Klaus Echtle	Efficient Algorithms for System Diagnosis with Both Processor and Comparator Faults.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	processor faults, comparison-based self-diagnosis, multiprocessorsystems, comparator faults, O(mod E mod)/sup 2/ algorithm, computational complexity, fault tolerant computing, multiprocessing systems, system diagnosis
36	James Alfred Walker, Julian Francis Miller	Investigating the performance of module acquisition in cartesian genetic programming.	GECCO	2005	DBLP DOI BibTeX RDF	digital adders, digital comparators, digital multipliers, modularity, cartesian genetic programming, computational effort, module acquisition
36	Marek Piotrów	Periodic, random-fault-tolerant correction networks.	SPAA	2001	DBLP DOI BibTeX RDF	correction networks, fault-tolerant sorting, comparators, sorting networks
36	Juan A. Montiel-Nelson, Saeid Nooshabadi, V. de Armas, Roberto Sarmiento, Antonio Núñez	High Speed GaAs Subsystem Design using Feed Through Logic.	DATE	1999	DBLP DOI BibTeX RDF	GaAs fast arithmetic circuits, GaAs design methodologies, GaAs subsystem design, GaAs ripple-carry adders, GaAs magnitude comparators
32	Jun He, Sanyi Zhan, Degang Chen 0001, Randall L. Geiger	A simple and accurate method to predict offset voltage in dynamic comparators.	ISCAS	2008	DBLP DOI BibTeX RDF
32	Jaime Ramírez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. López-Martín, Ramón González Carvajal	An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators.	VLSI Design	2008	DBLP DOI BibTeX RDF
32	Gulay Yalcin, Oguz Ergin	Using Tag-Match Comparators for Detecting Soft Errors.	IEEE Comput. Archit. Lett.	2007	DBLP DOI BibTeX RDF
32	Krissanapong Nandhasri, Jitkasem Ngarmnil	Designs of analog and digital comparators with FGMOS.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
32	Andrea Boni, Carlo Morandi	Low-Power, Low-Voltage BiCMOS Comparators for Approximately 200MHz, 8bit Operation.	VLSI Design	1996	DBLP DOI BibTeX RDF
25	Theja Tulabandhula, Yujendra Mitikiri	A 20MS/s 5.6 mW 6b Asynchronous ADC in 0.6µm CMOS.	VLSI Design	2009	DBLP DOI BibTeX RDF
25	Shaoqiang Bi, Warren J. Gross	The Mixed-Radix Chinese Remainder Theorem and Its Applications to Residue Comparison.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF
25	Yulai Zhao 0003, Xianfeng Li, Dong Tong 0001, Xu Cheng 0001	An Energy-Efficient Instruction Scheduler Design with Two-Level Shelving and Adaptive Banking.	J. Comput. Sci. Technol.	2007	DBLP DOI BibTeX RDF	content associative memory (CAM), tag elimination, waiting instruction buffer, instruction scheduler, energy-efficient architecture
25	Dionisios N. Pnevmatikatos, Aggelos Arelakis	Variable-Length Hashing for Exact Pattern Matching.	FPL	2006	DBLP DOI BibTeX RDF
25	Martin Trefzer, Jörg Langeheine, Karlheinz Meier, Johannes Schemmel	A Modular Framework for the Evolution of Circuits on Configurable Transistor Array Architectures.	AHS	2006	DBLP DOI BibTeX RDF
25	Shih-Chang Hsia, Wen-Ching Lee	A Very Low-Power Flash A/D Converter Based on Cmos Inverter Circuit.	IWSOC	2005	DBLP DOI BibTeX RDF	CMOS inverter, flash, A/D converter
25	Alan A. Bertossi, Stephan Olariu, Maria Cristina Pinotti, Si-Qing Zheng	Classifying Matrices Separating Rows and Columns.	IEEE Trans. Parallel Distributed Syst.	2004	DBLP DOI BibTeX RDF
25	Costas Busch, Maurice Herlihy	Sorting and Counting Networks of Arbitrary Width and Small Depth.	Theory Comput. Syst.	2002	DBLP DOI BibTeX RDF
25	Jincheol Yoo, Daegyu Lee, Kyusun Choi, Jongsoo Kim	A power and resolution adaptive flash analog-to-digital converter.	ISLPED	2002	DBLP DOI BibTeX RDF	TIQ comparator, flash ADC, inverter quantization, adaptive, threshold, analog-to-digital converter
25	Piotr Denejko, Krzysztof Diks, Andrzej Pelc, Marek Piotrów	Reliable Minimum Finding Comparator Networks.	MFCS	1994	DBLP DOI BibTeX RDF
25	Martin Dowd, Yehoshua Perl, Larry Rudolph, Michael E. Saks	The periodic balanced sorting network.	J. ACM	1989	DBLP DOI BibTeX RDF
23	G. Robert Redinbo	Generalized Algorithm-Based Fault Tolerance: Error Correction via Kalman Estimation.	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	fault-tolerant linear processing, Kalman recursive filtering, mean-square error estimation, real convolutional codes, real number error correction, time-varying fault models, totally self-checking comparators, Algorithm-based fault tolerance
23	Michael Nicolaidis	Fail-Safe Interfaces for VLSI: Theoretical Foundations and Implementation.	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	Fail-safe circuits, totally fail-safe circuits, strongly fail-safe circuits, fail-safe comparators, fail-safe voters, self-checking circuits
23	Behrooz Parhami	Comments on "Evaluation of A + B + K Conditions Without Carry Propagation".	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	carry-free circuit, A+B=K, negative effects, carry-save redundant numbers, (3, 2)-counters, carry propagation, carry-save numbers, pipeline processing, logic circuits, pipelined architectures, comparators, addition, parallel counters, redundant number representation, conditional branches
23	Peter Bro Miltersen, Mike Paterson, Jun Tarui	The Asymptotic Complexity of Merging Networks	FOCS	1992	DBLP DOI BibTeX RDF	merging networks, monotone Boolean circuits, lower bound, permutations, upper bound, switching networks, comparators, comparator network, asymptotic complexity
23	Frank Thomson Leighton, Yuan Ma, C. Greg Plaxton	Highly Fault-Tolerant Sorting Circuits	FOCS	1991	DBLP DOI BibTeX RDF	highly fault tolerant sorting circuits, passive failures, destructive failures, probability, comparators
20	Martijn Timmermans, Kyle van Oosterhout, Marco Fattori, Pieter Harpe, Yao-Hong Liu, Eugenio Cantatore	A 1.8-65 fJ/Conv.-Step 64-dB SNDR Continuous- Time Level Crossing ADC Exploiting Dynamic Self-Biasing Comparators.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
20	Kasi Bandla, Dipankar Pal	Strong-ARM Dynamic Latch Comparators: Design and Analyses on CAD Platform.	CoRR	2024	DBLP DOI BibTeX RDF
20	Tomi H. Kinnunen, Kong Aik Lee, Hemlata Tak, Nicholas W. D. Evans, Andreas Nautsch	t-EER: Parameter-Free Tandem Evaluation of Countermeasures and Biometric Comparators.	IEEE Trans. Pattern Anal. Mach. Intell.	2024	DBLP DOI BibTeX RDF
20	Fredrik Hellström, Benjamin Guedj	Comparing Comparators in Generalization Bounds.	AISTATS	2024	DBLP BibTeX RDF
20	Tomi Kinnunen, Kong Aik Lee, Hemlata Tak, Nicholas W. D. Evans, Andreas Nautsch	t-EER: Parameter-Free Tandem Evaluation of Countermeasures and Biometric Comparators.	CoRR	2023	DBLP DOI BibTeX RDF
20	Khuram Shahzad, Omar Usman Khan	A Generalized Space-Efficient Algorithm for Quantum Bit String Comparators.	CoRR	2023	DBLP DOI BibTeX RDF
20	Kaan Gökcesu, Hakan Gökcesu	Data Dependent Regret Guarantees Against General Comparators for Full or Bandit Feedback.	CoRR	2023	DBLP DOI BibTeX RDF
20	Fredrik Hellström, Benjamin Guedj	Comparing Comparators in Generalization Bounds.	CoRR	2023	DBLP DOI BibTeX RDF
20	Hao Ding, Lan Chen, Wentao Huang	Designing high-speed and energy-efficient dynamic comparators using complementary carbon nanotube field-effect transistors.	IEICE Electron. Express	2023	DBLP DOI BibTeX RDF
20	Valerio Spinogatti, Cristian Bocciarelli, Francesco Centurelli, Riccardo Della Sala, Alessandro Trifiletti	Robust Body Biasing Techniques for Dynamic Comparators.	PRIME	2023	DBLP DOI BibTeX RDF
20	Nataly Pozo, Luis-Miguel Prócel, Lionel Trojman	Enhancement-mode p-GaN Comparators for power applications.	PRIME	2023	DBLP DOI BibTeX RDF
20	Sun-Ho Yeom, Taeyang Sim, Jaeduk Han	An Analysis of CMOS Latched Comparators.	ICEIC	2023	DBLP DOI BibTeX RDF
20	Alexander Underwood, James E. Stine	Design Exploration of Magnitude Comparators for RISC-V System-on-Chip Architectures.	ACSSC	2023	DBLP DOI BibTeX RDF
20	Mohammad Javad Karimi, Catherine Dehollain, Alexandre Schmid	A 13.56 MHz Active Rectifier with Digitally-Assisted and Delay Compensated Comparators for Biomedical Implantable Devices.	ESSCIRC	2023	DBLP DOI BibTeX RDF
20	Martijn Timmermans, Marco Fattori, Pieter Harpe, Yao-Hong Liu, Eugenio Cantatore	A 3-320 fJ/conv.step Continuous Time Level Crossing ADC with Dynamic Self-Biasing Comparators Achieving 61.4 dB-SNDR.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
20	João Xavier 0001, Pedro Barquinha, João Goes	Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology.	DoCEIS	2023	DBLP DOI BibTeX RDF
20	Haricharan Bharathi, Anirudh Bhaskar, Vishal Venkataramani, Karthik Desingu, Lekshmi Kalinathan	Correlating Biomedical Image Fingerprints between GAN-generated and Real Images using a ResNet Backbone with ML-based Downstream Comparators and Clustering: ImageCLEFmed GANs, 2023.	CLEF (Working Notes)	2023	DBLP BibTeX RDF
20	Jia-Ching Wang, Tai-Haur Kuo	A 3mW 2.7GS/s 8b Subranging ADC with Multiple-Reference-Reference-Embedded Comparators.	ISSCC	2023	DBLP DOI BibTeX RDF
20	Bibhudutta Satapathy, Amandeep Kaur 0005	A Single Capacitor-Based Offset Reduction Technique for Energy-Efficient Dynamic Comparators.	ISCAS	2023	DBLP DOI BibTeX RDF
20	Matteo D'Addato, Luca Perilli, Alessia Maria Elgani, Eleonora Franchi Scarselli, Antonio Gnudi, Roberto Canegallo, Giulio Ricotti	A Threshold Voltage Generator Circuit with Automatic Refresh and Dynamic Updating for Ultra-Low-Power Continuous-Time Comparators.	ISCAS	2023	DBLP DOI BibTeX RDF
20	Taehoon Kim, Woo-Seok Choi	Performance Comparison of Clocked Comparators Using Impulse Sensitivity Function.	ISOCC	2023	DBLP DOI BibTeX RDF
20	Nandit Kaushik, B. Srinivasu	Memristor-based High Speed and Area Efficient Comparators in IMPLY Logic.	VLSID	2023	DBLP DOI BibTeX RDF
20	José Medardo Tapia-Téllez, Aurelio López-López, Jesús Miguel García Gorrostieta	Training Readability Comparators for Academic Texts at Different Levels.	Res. Comput. Sci.	2022	DBLP BibTeX RDF
20	Heng Guo, Yalin Li, Ying Liu, Weifu Li, Xinran Li	Evaluation of string comparators for record linkage in Chinese environment.	Int. J. Wavelets Multiresolution Inf. Process.	2022	DBLP DOI BibTeX RDF
20	Dengjie Wang, Ziqiang Wang, Hao Xu, Jiawei Wang 0004, Zeliang Zhao, Chun Zhang, Zhihua Wang 0001, Hong Chen 0002	A 56-Gbps PAM-4 Wireline Receiver With 4-Tap Direct DFE Employing Dynamic CML Comparators in 65 nm CMOS.	IEEE Trans. Circuits Syst. I Regul. Pap.	2022	DBLP DOI BibTeX RDF
20	Mohammad Asyaei	New dynamic logic style for energy efficient tag comparators.	Microprocess. Microsystems	2022	DBLP DOI BibTeX RDF
20	Constantinos Efstathiou, Laura Agalioti, Yiorgos Tsiatouhas	Efficient Dynamic Logic Magnitude Comparators.	VLSI-SoC	2022	DBLP DOI BibTeX RDF
20	Pedro Aquino Silva, Mateus Grellert, Cristina Meinhardt	Approximation Workflow for Energy-Efficient Comparators in Decision Tree Applications.	VLSI-SoC	2022	DBLP DOI BibTeX RDF
20	Andrea Ballo, Alfio Dario Grasso, Marco Privitera	A Design Procedure for Sizing Comparators in Active Rectifiers using $g_{m}/I_{D}$ Technique.	SBCCI	2022	DBLP DOI BibTeX RDF
20	Alexandra Steinhilber, Sylviane Valdois, Julien Diard	Bayesian comparators: a probabilistic modeling tool for similarity evaluation between predicted and perceived patterns.	CogSci	2022	DBLP BibTeX RDF
20	Jia-Ching Wang, Bing-Yang Li, Tai-Haur Kuo	A 9.8-fJ/conv.-step FoMW 8b 2.5-GS/s Single-Channel CDAC-Assisted Subranging ADC with Reference-Embedded Comparators.	VLSI Technology and Circuits	2022	DBLP DOI BibTeX RDF
20	Senlin Xu, Mingfan Zheng, Xinran Li	String Comparators for Chinese-Characters-Based Record Linkages.	IEEE Access	2021	DBLP DOI BibTeX RDF
20	Francisco Orts, Gloria Ortega López, A. C. Cucura, Ernestas Filatovas, Ester M. Garzón	Optimal fault-tolerant quantum comparators for image binarization.	J. Supercomput.	2021	DBLP DOI BibTeX RDF
20	Yanquan Luo, Maurits Ortmanns	Input Referred Noise of VCO-Based Comparators.	IEEE Trans. Circuits Syst. II Express Briefs	2021	DBLP DOI BibTeX RDF
20	Yaofo Chen, Yong Guo, Qi Chen, Minli Li, Yaowei Wang 0001, Wei Zeng 0006, Mingkui Tan	Contrastive Neural Architecture Search with Neural Architecture Comparators.	CoRR	2021	DBLP BibTeX RDF
20	David Cordova, Wim Cops, Yann Deval, Francois Rivet, Hervé Lapuyade, Nicolas Nodenot, Yohan Piccin	Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX.	LASCAS	2021	DBLP DOI BibTeX RDF
20	João Silva, Diogo Brito, Gonçalo Rodrigues, Taimur Gibran Rabuske, António Couto-Pinto, Jorge R. Fernandes	Methods for Fast Characterization of Noise and Offset in Dynamic Comparators.	NEWCAS	2021	DBLP DOI BibTeX RDF
20	Yaofo Chen, Yong Guo, Qi Chen, Minli Li, Wei Zeng 0006, Yaowei Wang 0001, Mingkui Tan	Contrastive Neural Architecture Search With Neural Architecture Comparators.	CVPR	2021	DBLP BibTeX RDF
20	Yanzhao Ma, Zhengjie Ye, Fei Li, Zhitong Chen, Kai Cui 0006, Xiaoya Fan	A Fully-Integrated Reference-Free Relaxation Oscillator with No Comparators.	ISCAS	2021	DBLP DOI BibTeX RDF
20	Fotios Ntouskas, Constantinos Efstathiou, Kiamal Z. Pekmestzi	Efficient design of magnitude and 2's complement comparators.	Integr.	2020	DBLP DOI BibTeX RDF
20	Yusuke Kanno, Tadanobu Toba, Kotaro Shimamura, Nobuyasu Kanekawa	Design Method for Online Totally Self-Checking Comparators Implementable on FPGAs.	IEEE Trans. Very Large Scale Integr. Syst.	2020	DBLP DOI BibTeX RDF
20	Jie Sun, Minglei Zhang, Lei Qiu 0002, Jianhui Wu 0001, Weiqiang Liu 0001	Background Calibration of Bit Weights in Pipelined-SAR ADCs Using Paired Comparators.	IEEE Trans. Very Large Scale Integr. Syst.	2020	DBLP DOI BibTeX RDF
20	Sherif M. Sharroush	Inverter-based voltage-controlled and programmable comparators.	Int. J. Circuit Theory Appl.	2020	DBLP DOI BibTeX RDF
20	Ata Khorami, Roghayeh Saeidi, Manoj Sachdev	A low-power low-offset charge-sharing technique for double-tail comparators.	Microelectron. J.	2020	DBLP DOI BibTeX RDF
20	Duo Wang, Mateja Jamnik, Pietro Liò	Generalisable Relational Reasoning With Comparators in Low-Dimensional Manifolds.	CoRR	2020	DBLP BibTeX RDF
20	Rafaella Fiorelli, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez	Offset-Calibration With Time-Domain Comparators Using Inversion-Mode Varactors.	IEEE Trans. Circuits Syst. II Express Briefs	2020	DBLP DOI BibTeX RDF
20	Ali Esmailiyan, Filippo Schembari, Robert Bogdan Staszewski	A 0.36-V 5-MS/s Time-Mode Flash ADC With Dickson-Charge-Pump-Based Comparators in 28-nm CMOS.	IEEE Trans. Circuits Syst. I Regul. Pap.	2020	DBLP DOI BibTeX RDF
20	Yu-Jie Zhang, Peng Zhao 0006, Zhi-Hua Zhou	A Simple Online Algorithm for Competing with Dynamic Comparators. (PDF / PS)	UAI	2020	DBLP BibTeX RDF
20	Lukasz Sosnowski, Iwona Szymusik, Tomasz Penza	Network of Fuzzy Comparators for Ovulation Window Prediction.	IPMU (3)	2020	DBLP DOI BibTeX RDF
20	Balan Bhuvan, K. Devadershan, Aditya Singh Pal, Mukul Sarkar	Accelerated-Detection of Regeneration in Swing-Limited Comparators used in Slope ADCs.	ISCAS	2020	DBLP DOI BibTeX RDF
20	Jaehoon Lee 0005, Yong Lim, Barosaim Sung, Seunghyun Oh, Jung-Hoon Chun, Jongwoo Lee	An Effective Transconductance Controlled Offset Calibration for Dynamic Comparators.	ISCAS	2020	DBLP DOI BibTeX RDF
20	Juyeop Kim, Younghyun Lim, Heein Yoon, Yongsun Lee, Hangi Park, Yoonseo Cho, Taeho Seong, Jaehyouk Choi	An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators.	IEEE J. Solid State Circuits	2019	DBLP DOI BibTeX RDF
20	Guanhua Wang, Kexu Sun, Qing Zhang 0021, Salam Elahmadi, Ping Gui	A 43.6-dB SNDR 1-GS/s 3.2-mW SAR ADC With Background-Calibrated Fine and Coarse Comparators in 28-nm CMOS.	IEEE Trans. Very Large Scale Integr. Syst.	2019	DBLP DOI BibTeX RDF
20	K. Vasanth 0001, E. Sindhu, R. Varatharajan 0001	VLSI architecture for Vasanth sorting to denoise image with minimum comparators.	Microprocess. Microsystems	2019	DBLP DOI BibTeX RDF
20	Samuel Allen Alexander	Intelligence via ultrafilters: structural properties of some intelligence comparators of deterministic Legg-Hutter agents.	J. Artif. Gen. Intell.	2019	DBLP DOI BibTeX RDF
20	Leïla Khanfir, Jaouhar Mouine	Systematic Hysteresis Analysis for Dynamic Comparators.	J. Circuits Syst. Comput.	2019	DBLP DOI BibTeX RDF
20	Mahnaz Janipoor Deylamani, Fatemeh Abdi, Parviz Amiri	A Full-Wave CMOS Rectifier with High-Speed Comparators for Implantable Medical Devices.	J. Circuits Syst. Comput.	2019	DBLP DOI BibTeX RDF