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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 18 occurrences of 13 keywords
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Results
Found 5 publication records. Showing 5 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. Holloway, Michael D. Smith 0001, Gu-Yeon Wei, David M. Brooks |
Predicting Voltage Droops Using Recurring Program and Microarchitectural Event Activity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 30(1), pp. 110, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
voltage noise, voltage emergencies, fault-tolerance, performance, reliability, inductive noise, dI/dt |
1 | Meeta Sharma Gupta, Krishna K. Rangan, Michael D. Smith 0001, Gu-Yeon Wei, David M. Brooks |
Towards a software approach to mitigate voltage emergencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007, Portland, OR, USA, August 27-29, 2007, pp. 123-128, 2007, ACM, 978-1-59593-709-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
dynamic optimization framework, voltage emergencies, hardware-software codesign, di/dt |
1 | Kim M. Hazelwood, David M. Brooks |
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004, pp. 326-331, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
voltage emergencies, power-aware computing, hardware-software co-design, dI/dt |
1 | Ed Grochowski, David Ayers, Vivek Tiwari |
Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage Variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February 2-6, 2002, pp. 7-16, 2002, IEEE Computer Society, 0-7695-1525-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Power delivery, supply voltage drop, simulation, microprocessor, inductive noise, di/dt |
1 | Suresh Rajgopal |
Challenges in Low Power Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 329-330, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
power benchmarks, latch power, idle power, active power, clock enabling, max power, thermal power, transient power, low-power, clock gating, microprocessor design, di/dt |
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