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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 50 occurrences of 30 keywords
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Results
Found 44 publication records. Showing 44 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
116 | Tomás Lang, Alberto Nannarelli |
A Radix-10 Digit-Recurrence Division Unit: Algorithm and Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(6), pp. 727-739, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
decimal division, algorithms and architectures for floating-point arithmetic, Decimal arithmetic, digit-recurrence division |
107 | Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli |
Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 27-29 June 2005, Cape Cod, MA, USA, pp. 147-154, 2005, IEEE Computer Society, 0-7695-2366-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
78 | Naofumi Takagi, Seiji Kuwahara |
Digit-Recurrence Algorithm for Computing Euclidean Norm of a 3-D Vector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 14-16 April 1999, Adelaide, Australia, pp. 86-, 1999, IEEE Computer Society, 0-7695-0116-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
73 | Milos D. Ercegovac, Jean-Michel Muller |
Complex Square Root with Operand Prescaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 49(1), pp. 19-30, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
complex square-root, operand prescaling, computer arithmetic, digit-recurrence algorithm |
63 | Behrooz Parhami |
Tight Upper Bounds on the Minimum Precision Required of the Divisor and the Partial Remainder in High-Radix Division. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(11), pp. 1509-1514, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
digit-selector PLA, high-radix division, p-d plot, quotient digit selection, SRT division, Digit-recurrence division |
63 | Naofumi Takagi, Seiji Kuwahara |
A VLSI Algorithm for Computing the Euclidean Norm of a 3D Vector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(10), pp. 1074-1082, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
computer graphics, Computer arithmetic, VLSI algorithm, Euclidean norm, digit-recurrence algorithm |
51 | Hooman Nikmehr, Cheng-Chew Lim |
A New On-the-fly Summation Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings, pp. 258-267, 2003, Springer, 3-540-20122-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
47 | José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera |
High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 40(1), pp. 109-123, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
digit-recurrence, high-radix, selection by rounding, computer arithmetic, logarithm |
47 | Tomás Lang, Elisardo Antelo |
Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(9), pp. 1100-1114, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Combined division, reciprocal square root, exact rounding, staircase selection function, square root, digit-recurrence algorithm |
47 | Alain Guyot, Luis A. Montalvo, A. Houelle, Habib Mehrez, Nicolas Vaucher |
Comparison of the layout synthesis of radix-2 and pseudo-radix-4 dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 386-391, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
layout synthesis, radix-2 dividers, pseudo-radix-4 dividers, redundant number notation, carry-propagation-free addition/subtraction, VLSI, logic CAD, circuit layout CAD, CMOS logic circuits, VLSI implementation, integrated circuit layout, redundant number systems, dividing circuits, digit-recurrence division |
43 | Milos D. Ercegovac, Jean-Michel Muller |
Variable Radix Real and Complex Digit-Recurrence Division. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece, pp. 316-321, 2005, IEEE Computer Society, 0-7695-2407-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
43 | Anders Berkeman, Viktor Öwall |
A configurable divider using digit recurrence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 333-336, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
43 | Tomás Lang, Elisardo Antelo |
Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 11-17 June 2001, Vail, CO, USA, pp. 83-93, 2001, IEEE Computer Society, 0-7695-1150-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
41 | Paolo Montuschi, Javier D. Bruguera, Luigi Ciminiera, José-Alejandro Piñeiro |
A Digit-by-Digit Algorithm for mth Root Extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(12), pp. 1696-1706, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
integer rooting, digit-by-digit algorithms, higher radix, computer arithmetic |
41 | Gianluca Cornetta, Jordi Cortadella |
A Multi-Radix Approach to Asynchronous Division. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 11-14 March 2001, Salt Lake City, UT, USA, pp. 25-, 2001, IEEE Computer Society, 0-7695-1034-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
39 | Malte Baesler, Sven-Ole Voigt, Thomas Teufel |
A radix-10 digit recurrence division unit with a constant digit selection function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 28th International Conference on Computer Design, ICCD 2010, 3-6 October 2010, Amsterdam, The Netherlands, Proceedings, pp. 241-246, 2010, IEEE Computer Society, 978-1-4244-8936-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
35 | Tomás Lang, Alberto Nannarelli |
Division Unit for Binary Integer Decimals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2009, July 7-9, 2009, Boston, MA, USA, pp. 1-7, 2009, IEEE Computer Society, 978-0-7695-3732-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
35 | Vítor Silva, Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto |
Multiplier-based double precision floating point divider according to the IEEE-754 standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings, pp. 260-265, 2008, Springer, 978-3-540-78609-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Milos D. Ercegovac, Jean-Michel Muller |
Complex Square Root with Operand Prescaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 15th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2004), 27-29 September 2004, Galveston, TX, USA, pp. 52-62, 2004, IEEE Computer Society, 0-7695-2226-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Marianne E. Louie, Milos D. Ercegovac |
Implementing division with field programmable gate arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 7(3), pp. 271-285, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
33 | Gianluca Cornetta, Jordi Cortadella |
A Radix-16 SRT Division Unit with Speculation of the Quotient Digits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 74-77, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
30 | Naofumi Takagi |
Multiple-Valued-Digit Number Representations in Arithmetic Circuit Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), May 15-18, 2002, Boston, Massachusetts, USA, pp. 224-237, 2002, IEEE Computer Society, 0-7695-1462-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
carry-save form, carry-propagation-free addition, multiplier recoding, computer arithmetic, signed-digit number representation, digit-recurrence algorithm |
30 | Alberto Nannarelli, Tomás Lang |
Low-Power Divider. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(1), pp. 2-14, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Floating-point division, low-power, digit-recurrence division |
30 | Luis A. Montalvo, Keshab K. Parhi, Alain Guyot |
New Svoboda-Tung Division. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 47(9), pp. 1014-1020, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Svoboda-Tung method, operand prescaling, Computer arithmetic, redundant number system, digit-recurrence division |
30 | Elisardo Antelo, Tomás Lang, Javier D. Bruguera |
Computation of sqrt(x/d) in a Very High Radix Combined Division/Square-Root Unit with Scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 47(2), pp. 152-161, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
high-radix methods, inverse square-root, division, square-root, Digit-recurrence algorithm |
30 | Milos D. Ercegovac, Tomás Lang |
On-the-Fly Rounding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(12), pp. 1497-1503, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
digit rounding, digit-serial form, most significant digit, least significant, redundant addition, result-digit, signed-digit set, computing arithmetic, digital arithmetic, number theory, digit-recurrence algorithms, online arithmetic |
27 | Alex Piñeiro, Javier D. Bruguera, Fabrizio Lamberti, Paolo Montuschi |
A Radix-2 Digit-by-Digit Architecture for Cube Root. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(4), pp. 562-566, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Cost/performance, High-Speed Arithmetic |
26 | Julio Villalba-Moreno |
Digit Recurrence Floating-Point Division under HUB Format. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARITH ![In: 23nd IEEE Symposium on Computer Arithmetic, ARITH 2016, Silicon Valley, CA, USA, July 10-13, 2016, pp. 79-86, 2016, IEEE Computer Society, 978-1-5090-1616-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
26 | Malte Baesler, Sven-Ole Voigt |
Analysis of Fast Radix-10 Digit Recurrence Algorithms for Fixed-Point and Floating-Point Dividers on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Reconfigurable Comput. ![In: Int. J. Reconfigurable Comput. 2013, pp. 453173:1-453173:16, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | Malte Baesler, Sven-Ole Voigt, Thomas Teufel |
FPGA Implementations of Radix-10 Digit Recurrence Fixed-Point and Floating-Point Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011, pp. 13-19, 2011, IEEE Computer Society, 978-1-4577-1734-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli |
Digit-Recurrence Dividers with Reduced Logical Depth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(7), pp. 837-851, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Digit-by-digit division, algorithms and architectures for computer arithmetic, division radix 4, division radix 16 |
26 | Naofumi Takagi, Daisuke Matsuoka, Kazuyoshi Takagi |
Digit-Recurrence Algorithm for Computing Reciprocal Square-Root. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(1), pp. 221-228, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
26 | Marianne E. Louie, Milos D. Ercegovac |
On digit-recurrence division implementations for field programmable gate arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 11th Symposium on Computer Arithmetic, 29 June - 2 July 1993, Windsor, Canada, Proceedings., pp. 202-209, 1993, IEEE Computer Society/, 0-8186-3862-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
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25 | Naofumi Takagi, Shunsuke Kadowaki, Kazuyoshi Takagi |
A Hardware Algorithm for Integer Division. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 27-29 June 2005, Cape Cod, MA, USA, pp. 140-146, 2005, IEEE Computer Society, 0-7695-2366-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera |
High-Radix Logarithm with Selection by Rounding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 13th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2002), 17-19 July 2002, San Jose, CA, USA, pp. 101-110, 2002, IEEE Computer Society, 0-7695-1712-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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25 | Milos D. Ercegovac, Tomás Lang |
On recoding in arithmetic algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 14(3), pp. 283-294, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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17 | Neil Burgess, Chris N. Hinds |
Design of the ARM VFP11 Divide and Square Root Synthesisable Macrocell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 18th IEEE Symposium on Computer Arithmetic (ARITH-18 2007), 25-27 June 2007, Montpellier, France, pp. 87-96, 2007, IEEE Computer Society, 0-7695-2854-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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17 | Anuja Jayraj Thakkar, Abdel Ejnioui |
Pipelining of double precision floating point division and square root operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Southeast Regional Conference ![In: Proceedings of the 44st Annual Southeast Regional Conference, 2006, Melbourne, Florida, USA, March 10-12, 2006, pp. 488-493, 2006, ACM, 1-59593-315-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
FPGA, pipelining, floating point, division, square root |
17 | José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera |
Algorithm and Architecture for Logarithm, Exponential, and Powering Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(9), pp. 1085-1096, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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17 | Álvaro Vázquez, Elisardo Antelo |
Implementation of the Exponential Function in a Floating-Point Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 33(1-2), pp. 125-145, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
exponential function, computer arithmetic, floating-point unit, transcendental functions |
17 | José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera |
High-Radix Iterative Algorithm for Powering Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 15-18 June 2003, Santiago de Compostela, Spain, pp. 204-211, 2003, IEEE Computer Society, 0-7695-1894-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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17 | Jean-Michel Muller |
Complex Division with Prescaling of Operands. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 14th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2003), 24-26 June 2003, The Hague, The Netherlands, pp. 304-314, 2003, IEEE Computer Society, 0-7695-1992-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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17 | Alexandre F. Tenca, Syed Ubaid Hussaini |
A Design of Radix-2 On-line Division Using LSA Organization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 11-17 June 2001, Vail, CO, USA, pp. 266-, 2001, IEEE Computer Society, 0-7695-1150-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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17 | C.-C. Wang, C. J. Huang, G.-C. Lin |
A chip design of radix-4/2 64b/32b signed and unsigned integer divider using Compass cell library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 439-442, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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