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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 11 occurrences of 9 keywords
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Results
Found 18 publication records. Showing 18 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
41 | Pedro C. Diniz, Gokul Govindu |
Design of a Field-Programmable Dual-Precision Floating-Point Arithmetic Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-4, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Yee Jern Chong, Sri Parameswaran |
Flexible multi-mode embedded floating-point unit for field programmable gate arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 171-180, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
dual-precision, embedded block, fpu, fpga, floating-point, fpga architecture |
20 | Yichi Zhang 0006, Ritchie Zhao, Weizhe Hua, Nayun Xu, G. Edward Suh, Zhiru Zhang |
Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2002.07136, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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20 | Yichi Zhang 0006, Ritchie Zhao, Weizhe Hua, Nayun Xu, G. Edward Suh, Zhiru Zhang |
Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICLR ![In: 8th International Conference on Learning Representations, ICLR 2020, Addis Ababa, Ethiopia, April 26-30, 2020, 2020, OpenReview.net. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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20 | Shen-Fu Hsiao, Kuei-Chun Huang |
Low-power dual-precision table-based function evaluation supporting dynamic precision changes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, Jeju, South Korea, October 25-28, 2016, pp. 710-712, 2016, IEEE, 978-1-5090-1570-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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13 | Junliang Du, Sifeng Liu, Yong Liu |
Grey variable dual precision rough set model and its application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Grey Syst. Theory Appl. ![In: Grey Syst. Theory Appl. 12(1), pp. 156-173, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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13 | Hongxu Li, Fulin Su, Xinbo Xu |
A Two-Step Method for Multitarget ISAR Imaging Based on Dual-Precision Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Geosci. Remote. Sens. ![In: IEEE Trans. Geosci. Remote. Sens. 60, pp. 1-16, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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13 | Sangwoo Jung, Jaehyun Lee, Huiseong Noh, Jong-Hyeok Yoon, Jaeha Kung |
DualPIM: A Dual-Precision and Low-Power CNN Inference Engine Using SRAM- and eDRAM-based Processing-in-Memory Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICAS ![In: 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022, Incheon, Republic of Korea, June 13-15, 2022, pp. 70-73, 2022, IEEE, 978-1-6654-0996-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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13 | Krishna Rajan, Soheil Hashemi, Ulya R. Karpuzcu, Michael C. Doggett, Sherief Reda |
Dual-precision fixed-point arithmetic for low-power ray-triangle intersections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Graph. ![In: Comput. Graph. 87, pp. 72-79, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Jae Hyun Park, Ji Sub Choi, Jong Hwan Ko |
Dual Precision Deep Neural Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2009.02191, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Jae Hyun Park, Ji Sub Choi, Jong Hwan Ko |
Dual-Precision Deep Neural Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AIPR ![In: AIPR 2020: 3rd International Conference on Artificial Intelligence and Pattern Recognition, Xiamen, China, June 26-28, 2020, pp. 30-34, 2020, ACM, 978-1-4503-7551-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Shen-Fu Hsiao, Pei-Hsuan Wu, Jien-Min Chen, Kun-Chih Chen |
Dual-Precision Acceleration of Convolutional Neural Network Computation with Mixed Input and Output Data Reuse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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13 | Arunachalam Venkatesan, Alex Noel Joseph Raj, Naveen Hampannavar, C. B. Bidul |
Efficient dual-precision floating-point fused-multiply-add architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 57, pp. 23-31, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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13 | Young-Geun Lee, Joo-Yul Park, Ki-Seok Chung |
Design of Low Power MAC Operator with Dual Precision Mode. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 21-24 August 2007, Daegu, Korea, pp. 309-318, 2007, IEEE Computer Society, 0-7695-2975-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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13 | Guy Even, Silvia M. Müller, Peter-Michael Seidel |
A dual precision IEEE floating-point multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 29(2), pp. 167-180, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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8 | Sven Beyer, Christian Jacobi 0002, Daniel Kröning, Dirk Leinenbach, Wolfgang J. Paul |
Putting it all together - Formal verification of the VAMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 8(4-5), pp. 411-430, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Complete microprocessor verification, Tomasulo scheduler, Cache memory interface, Model checking, Formal methods, Theorem proving, Floating point unit |
8 | Christian Jacobi 0002, Christoph Berg |
Formal Verification of the VAMP Floating Point Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 26(3), pp. 227-266, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
IEEE standard 754, formal verification, theorem proving, PVS, floating point unit |
8 | Sven Beyer, Christian Jacobi 0002, Daniel Kroening, Dirk Leinenbach, Wolfgang J. Paul |
Instantiating Uninterpreted Functional Units and Memory System: Functional Verification of the VAMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHARME ![In: Correct Hardware Design and Verification Methods, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings, pp. 51-65, 2003, Springer, 3-540-20363-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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