Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
84 | Frank E. B. Ophelders, Marco Bekooij, Henk Corporaal |
A tuneable software cache coherence protocol for heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 383-392, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
performance, design, reliability |
84 | Ewerson Carvalho, Ney Calazans, Fernando Moraes 0001 |
Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 28-30 May 2007, Porto Alegre, RS, Brazil, pp. 34-40, 2007, IEEE Computer Society, 978-0-7695-2834-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
57 | Krutartha Patel, Sri Parameswaran |
LOCS: a low overhead profiler-driven design flow for security of MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 79-84, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
tensilica, architecture, mpsoc, execution profile, code injection |
57 | Krutartha Patel, Sri Parameswaran |
SHIELD: a software hardware design methodology for security and reliability of MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 858-861, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
bit flips, tensilica, architecture, multiprocessors, code injection |
57 | David Atienza, Pablo García Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida |
HW-SW emulation framework for temperature-aware design in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 12(3), pp. 26:1-26:26, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Thermal-aware design, FPGA, emulation, MPSoC, temperature |
55 | Chong Sun, Li Shang, Robert P. Dick |
Three-dimensional multiprocessor system-on-chip thermal optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 117-122, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
synthesis, 3D, multiprocessor system-on-chip, thermal |
52 | Jun Zhu 0011, Ingo Sander, Axel Jantsch |
Energy efficient streaming applications with guaranteed throughput on MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMSOFT ![In: Proceedings of the 8th ACM & IEEE International conference on Embedded software, EMSOFT 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 119-128, 2008, ACM, 978-1-60558-468-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
synchronous moc, energy efficiency, mpsocs, streaming applications |
52 | Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta 0001, Stephen P. Boyd, Giovanni De Micheli |
Temperature-aware processor frequency assignment for MPSoCs using convex optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 111-116, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
temperature-aware, MPSoCs, convex optimization, thermal |
50 | Jaume Joven, Oriol Font-Bach, David Castells-Rufas, Ricardo Martínez, Lluís Terés, Jordi Carrabina |
xENoC - An eXperimental Network-On-Chip Environment for Parallel Distributed Computing on NoC-based MPSoC Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 16th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2008), 13-15 February 2008, Toulouse, France, pp. 141-148, 2008, IEEE Computer Society, 978-0-7695-3089-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
NoC-based MPSoCs, Message Passing Interface, Distributed Programming, Design Tools and Techniques |
43 | Francesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo |
A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008. Proceedings, pp. 96-105, 2008, Springer, 978-3-540-70549-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Dual-mode switching, Non-exclusive switching, Networks on Chip, Circuit switching |
43 | Ewerson Carvalho, Ney Laert Vilar Calazans, Fernando Gehm Moraes |
Congestion-Aware Task Mapping in NoC-based MPSoCs with Dynamic Workload. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), May 9-11, 2007, Porto Alegre, Brazil, pp. 459-460, 2007, IEEE Computer Society, 0-7695-2896-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
43 | Mirko Loghi, Massimo Poncino, Luca Benini |
Cache coherence tradeoffs in shared-memory MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 5(2), pp. 383-407, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
low power, multiprocessor, system-on-chip, Cache coherence |
43 | Fabio Wronski, Eduardo Wenzel Brião, Flávio Rech Wagner |
Evaluating Energy-Aware Task Allocation Strategies for MPSOCS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DIPES ![In: From Model-Driven Design to Resource Management for Distributed Embedded Systems, IFIP TC 10 Working Conference on Distributed and Parallel Embedded Systems (DIPES 2006), October 11-13, 2006, Braga, Portugal, pp. 215-224, 2006, Springer, 978-0-387-39361-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Simulation, Networks-on-Chip, Task Allocation, Multiprocessor SoCs, Energy Estimation |
41 | Jason Agron, David Andrews 0001 |
Building heterogeneous reconfigurable systems with a hardware microkernel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 393-402, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
FPGAs, operating systems, heterogeneous architectures |
41 | Pramod Chandraiah, Rainer Dömer |
Code and Data Structure Partitioning for Parallel and Flexible MPSoC Specification Using Designer-Controlled Recoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(6), pp. 1078-1090, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
41 | Wayne H. Wolf, Ahmed Amine Jerraya, Grant Martin |
Multiprocessor System-on-Chip (MPSoC) Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(10), pp. 1701-1713, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
41 | Xu Cheng |
Heterogeneous Multi-processor SoC: An Emerging Paradigm of Embedded System Design and Its Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICESS ![In: Embedded Software and Systems, Second International Conference, ICESS 2005, Xi'an, China, December 16-18, 2005, Proceedings, pp. 3, 2005, Springer, 3-540-30881-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
41 | Feihui Li, Mahmut T. Kandemir |
Locality-conscious workload assignment for array-based computations in MPSOC architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 95-100, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
MPSoC, data locality |
39 | Francesco Zanini, David Atienza, Giovanni De Micheli, Stephen P. Boyd |
Online convex optimization-based algorithm for thermal management of MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 203-208, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
management, MPSoCs, convex optimization, online, thermal |
39 | Fadi N. Sibai |
Which On-Chip Interconnection Network for 16-core MPSoCs?. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CISIS ![In: CISIS 2010, The Fourth International Conference on Complex, Intelligent and Software Intensive Systems, Krakow, Poland, 15-18 February 2010, pp. 625-630, 2010, IEEE Computer Society, 978-0-7695-3967-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
split NoCs, MPSoCs, On-chip interconnection networks, network diameter |
36 | Francesco Poletti, Antonio Poggiali, Davide Bertozzi, Luca Benini, Pol Marchal, Mirko Loghi, Massimo Poncino |
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(5), pp. 606-621, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded multimedia, low power, energy efficiency, MPSoCs, programming models, task-level parallelism |
36 | Mario Diaz-Nava, Patrick Blouet, Philippe Teninge, Marcello Coppola, Tarek Ben Ismail, Samuel Picchiottino, Robin Wilson |
An Open Platform for Developing Multiprocessor SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 60-67, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
hardware emulation platform, computing nodes, HW/SW development, microprocessors, multiprocessor systems, MPSoCs, network interfaces |
32 | Johanna Sepúlveda, Cezar Reinbrecht, Siavoosh Payandeh Azad, Behrad Niazmand, Gert Jervan |
Understanding MPSoCs: exploiting memory microarchitectural vulnerabilities of high performance NoC-based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece, July 15-19, 2018., pp. 162-166, 2018, ACM, 978-1-4503-6494-2. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
32 | Eduardo Wächter, Francisco F. S. Barreto, Vinicius Fochi, Alexandre M. Amory, Fernando Gehm Moraes |
A layered approach for fault tolerant NoC-based MPSoCs - Special session: Dependable MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 17th Latin-American Test Symposium, LATS 2016, Foz do Iguacu, Brazil, April 6-8, 2016, pp. 189-194, 2016, IEEE, 978-1-5090-1331-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
32 | Marcos Aurélio Pinto Cunha |
Defining and using virtual platforms traces captured for debugging MPSoCs. (Définition et utilisation de traces issues de plateformes virtuelles pour le débogage des MPSoCs). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2016 |
RDF |
|
32 | Damien Hedde |
Analyse de la consistance mémoire dans les MPSoCs à l'aide du prototypage virtuel. (Analysis of memory consistency in MPSoCs using virtual prototyping). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2013 |
RDF |
|
32 | Luciano Copello Ost |
Abstract models of NoC-based MPSoCs for design space exploration (Abstract models of NoC-based MPSoCs for design space exploration). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2010 |
RDF |
|
30 | Mohamed M. Sabry, Martino Ruggiero, Pablo García Del Valle |
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 305-310, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multi-core, virtual platform, L2 cache |
30 | Bastian Ristau, Torsten Limberg, Gerhard P. Fettweis |
A Mapping Framework Based on Packing for Design Space Exploration of Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 57(1), pp. 45-56, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Performance evaluation, Mapping, Design space exploration, MPSoC, Packing |
30 | Andrea Marongiu, Andrea Acquaviva, Luca Benini |
OpenMP Support for NBTI-Induced Aging Tolerance in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SSS ![In: Stabilization, Safety, and Security of Distributed Systems, 11th International Symposium, SSS 2009, Lyon, France, November 3-6, 2009. Proceedings, pp. 547-562, 2009, Springer, 978-3-642-05117-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
30 | Marcus Vinícius Carvalho da Silva, Nadia Nedjah, Luiza de Macedo Mourelle |
Application Synthesis for MPSoCs Implementation Using Multiobjective Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWANN (1) ![In: Bio-Inspired Systems: Computational and Ambient Intelligence, 10th International Work-Conference on Artificial Neural Networks, IWANN 2009, Salamanca, Spain, June 10-12, 2009. Proceedings, Part I, pp. 736-743, 2009, Springer, 978-3-642-02477-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
30 | Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar |
Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 121-124, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
vlsi design, task allocation, multiprocessor systems-on-chip |
30 | Minyoung Kim, Sudarshan Banerjee, Nikil D. Dutt, Nalini Venkatasubramanian |
Energy-aware cosynthesis of real-time multimedia applications on MPSoCs using heterogeneous scheduling policies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 7(2), pp. 9:1-9:19, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
cosynthesis, energy, Real-time scheduling, MPSoC |
30 | Thidapat Chantem, Robert P. Dick, Xiaobo Sharon Hu |
Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 288-293, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Ayse Kivilcim Coskun, Tajana Simunic Rosing, Kenny C. Gross |
Proactive temperature balancing for low cost thermal management in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 250-257, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Chengmo Yang, Alex Orailoglu |
A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 11-20, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
fault detection, checkpointing, fault recovery |
30 | Wei Han 0001, Ying Yi, Mark Muir, Ioannis Nousias, Tughrul Arslan, Ahmet Teyfik Erdogan |
MRPSIM: A TLM based simulation tool for MPSOCS targeting dynamically reconfigurable processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings, pp. 41-44, 2008, IEEE, 978-1-4244-2596-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Maurice Sebastian, Rolf Ernst |
Modelling and designing reliable on-chip-communication devices in MPSoCs with real-time requirements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETFA ![In: Proceedings of 13th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2008, September 15-18, 2008, Hamburg, Germany, pp. 1465-1472, 2008, IEEE, 1-4244-1505-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Daniel Barcelos, Eduardo Wenzel Brião, Flávio Rech Wagner |
A hybrid memory organization to enhance task migration and dynamic task allocation in NoC-based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007, pp. 282-287, 2007, ACM, 978-1-59593-816-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
energy, MPSoC, NoC, task migration, memory organization |
30 | Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes |
Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 295-296, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Chun-Mok Chung, Jihong Kim 0001, Dohyung Kim |
Reducing snoop-energy in shared bus-based mpsocs by filtering useless broadcasts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 126-131, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
broadcast filtering, low-energy cache coherency, MPSoC |
30 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
Power/performance hardware optimization for synchronization intensive applications in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 606-611, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Minyoung Kim, Sudarshan Banerjee, Nikil D. Dutt, Nalini Venkatasubramanian |
Design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 16-21, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cosynthesis, energy, real-time scheduling, MPSoC |
30 | Mirko Loghi, Massimo Poncino, Luca Benini |
Synchronization-driven dynamic speed scaling for MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 346-349, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
MPSoC, power optimization, dynamic voltage/frequency scaling |
30 | Michele Lombardi 0001, Michela Milano |
Stochastic Allocation and Scheduling for Conditional Task Graphs in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CP ![In: Principles and Practice of Constraint Programming - CP 2006, 12th International Conference, CP 2006, Nantes, France, September 25-29, 2006, Proceedings, pp. 299-313, 2006, Springer, 3-540-46267-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Vincenzo Rana, Donatella Sciuto |
A novel design framework for the design of reconfigurable systems based on NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 1-2, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
network-on-chip, reconfigurable computing, design flow, mapping algorithm |
27 | Jianjiang Ceng, Weihua Sheng, Jerónimo Castrillón, Anastasia Stulova, Rainer Leupers, Gerd Ascheid, Heinrich Meyr |
A high-level virtual platform for early MPSoC software development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 11-20, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
simulation, parallel programming, software, embedded, MPSoC, system level design, virtual platform |
27 | Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne |
MPSoC Design Using Application-Specific Architecturally Visible Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings, pp. 183-197, 2009, Springer, 978-3-540-92989-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
27 | Chen-Ling Chou, Ümit Y. Ogras, Radu Marculescu |
Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(10), pp. 1866-1879, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Christian El Salloum, Roman Obermaisser, Bernhard Huber, Hermann Kopetz |
A Novel Naming Scheme for System-on-a-Chips Supporting Dynamic Resource Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Seventh European Dependable Computing Conference, EDCC-7 2008, Kaunas, Lithuania, 7-9 May 2008, pp. 135-144, 2008, IEEE Computer Society, 978-0-7695-3138-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Roman Obermaisser, Hubert Kraut, Christian El Salloum |
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Seventh European Dependable Computing Conference, EDCC-7 2008, Kaunas, Lithuania, 7-9 May 2008, pp. 123-134, 2008, IEEE Computer Society, 978-0-7695-3138-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Gilles Sassatelli, Nicolas Saint-Jean, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes |
Architectural Issues in Homogeneous NoC-Based MPSoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 28-30 May 2007, Porto Alegre, RS, Brazil, pp. 139-142, 2007, IEEE Computer Society, 978-0-7695-2834-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Olga Golubeva, Mirko Loghi, Massimo Poncino |
On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 489-492, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
synchronization, multiprocessor, system-on-chip, energy |
27 | Alex K. Jones, Raymond Hoare, Dara Kusic, Gayatri Mehta, Joshua Fazekas, John Foster 0001 |
Reducing power while increasing performance with supercisc. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 5(3), pp. 658-686, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Low-power, synthesis, VLIW, predication, multicore architectures |
27 | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo |
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), Samos, Greece, July 17-20, 2006, pp. 107-114, 2006, IEEE, 1-4244-0155-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Wayne H. Wolf |
Multiprocessor Systems-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany, pp. 4, 2006, IEEE Computer Society, 0-7695-2533-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Synthesis of Application-Specific Heterogeneous Multiprocessor Architectures Using Extensible Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 551-556, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Haris Javaid, Sri Parameswaran |
A design flow for application specific heterogeneous pipelined multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 250-253, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
design space exploration, integer linear programming, MPSoCs |
23 | Martino Ruggiero, Alessio Guerri, Davide Bertozzi, Michela Milano, Luca Benini |
A Fast and Accurate Technique for Mapping Parallel Applications on Stream-Oriented MPSoC Platforms with Communication Awareness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 36(1), pp. 3-36, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scheduling, Integer Programming, Constraint Programming, MPSoCs, allocation |
23 | Konstantinos Aisopos, Chien-Chun Chou, Li-Shiuan Peh |
Extending open core protocol to support system-level cache coherence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 167-172, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
coherence extensions, ocp, open core protocol, specification, mpsocs |
23 | Haris Javaid, Sri Parameswaran |
Synthesis of heterogeneous pipelined multiprocessor systems using ILP: jpeg case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 1-6, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
design space exploration, integer linear programming, MPSoCs |
23 | Andrea Marongiu, Luca Benini, Mahmut T. Kandemir |
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 145-149, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
code parallelization, MPSoCs, barrier synchronization |
23 | Elias Teodoro Silva Jr., Flávio Rech Wagner, Edison Pignaton de Freitas, Carlos Eduardo Pereira |
Hardware support in a middleware for distributed and real-time embedded applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 149-154, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
real-time systems, middleware, energy efficiency, MPSoCs, embedded applications |
23 | Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere |
Multi-processor system design with ESPAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 211-216, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
system-level design, Kahn process networks, heterogeneous MPSoCs |
23 | Steve Leibson, James Kim |
Configurable Processors: A New Era in Chip Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 51-59, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
nanometer silicon lithography, microprocessors, multiprocessor systems, MPSoCs, configurable processors |
23 | Ahmed Amine Jerraya, Hannu Tenhunen, Wayne H. Wolf |
Guest Editors' Introduction: Multiprocessor Systems-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 36-40, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
SoCs, microprocessors, multiprocessor systems, MPSoCs, chip design, VLSI technology |
23 | Markus Levy |
Evaluating Digital Entertainment System Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 68-72, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
DENBench suite, digital media benchmarks, digital device performance, EEMBC, microprocessor systems, benchmarks, MPSoCs |
23 | John Goodacre, Andrew N. Sloss |
Parallelism and the ARM Instruction Set Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 42-50, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
computer architectures, multiprocessor systems, MPSoCs, RISC processors |
16 | Diego V. Cirilo do Nascimento, Kyriakos Georgiou, Kerstin I. Eder, Samuel Xavier de Souza |
Evaluating the Effects of Reducing Voltage Margins for Energy-Efficient Operation of MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Embed. Syst. Lett. ![In: IEEE Embed. Syst. Lett. 16(1), pp. 25-28, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
16 | Luca Colagrande, Luca Benini |
Optimizing Offload Performance in Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2404.01908, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
16 | Khalil Esper, Jürgen Teich |
History-Based Run-Time Requirement Enforcement of Non-Functional Properties on MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NG-RES@HiPEAC ![In: Fifth Workshop on Next Generation Real-Time Embedded Systems, NG-RES 2024, January 17-19, 2024, Munich, Germany, pp. 4:1-4:11, 2024, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-313-3. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
16 | Waqar Amin, Fawad Hussain, Sheraz Anjum, Sharoon Saleem, Waqar Ahmad, Mubashir Hussain |
HyDra: Hybrid Task Mapping Application Framework for NOC-Based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 52309-52326, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Sidhartha Sankar Rout, Badri M, Mitali Sinha, Sujay Deb |
ReDeSIGN: Reuse of Debug Structures for Improvement in Performance Gain of NoC Based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Emerg. Top. Comput. ![In: IEEE Trans. Emerg. Top. Comput. 11(2), pp. 432-447, April - June 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Halima Najibi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, Miroslav Vasic, David Atienza |
Thermal and Voltage-Aware Performance Management of 3-D MPSoCs With Flow Cell Arrays and Integrated SC Converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1), pp. 2-15, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Tomasz Kloda, Giovani Gracioli, Rohan Tabish, Reza Mirosanlou, Renato Mancuso 0001, Rodolfo Pellizzoni, Marco Caccamo |
Lazy Load Scheduling for Mixed-criticality Applications in Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 22(3), pp. 59:1-59:26, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Dipika Deb, John Jose |
ZPP: A Dynamic Technique to Eliminate Cache Pollution in NoC based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 22(5s), pp. 118:1-118:25, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Jan Spieck, Stefan Wildermann, Jürgen Teich |
A Learning-based Methodology for Scenario-aware Mapping of Soft Real-time Applications onto Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 28(1), pp. 4:1-4:40, January 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Khalil Esper, Stefan Wildermann, Jürgen Teich |
Automatic Synthesis of FSMs for Enforcing Non-functional Requirements on MPSoCs Using Multi-objective Evolutionary Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 28(6), pp. 98:1-98:20, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Halima Bouzidi, Mohanad Odema, Hamza Ouarnoughi, Smaïl Niar, Mohammad Abdullah Al Faruque |
Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2302.12926, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Marvin Fuchs, Luis E. Ardila-Perez, Torben Mehner, Oliver Sander |
Split Boot - True Network-Based Booting on Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2301.05642, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Rohan Tabish, Rodolfo Pellizzoni, Renato Mancuso 0001, Giovani Gracioli, Reza Mirosanlou, Marco Caccamo |
X-Stream: Accelerating streaming segments on MPSoCs for real-time applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 138, pp. 102857, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Ondrej Benedikt, Javier Pérez-Rodríguez, Patrick Meumeu Yomsi, Michal Sojka |
Reducing Peak Temperature by Redistributing Idle-Time in Modern MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISORC ![In: 26th IEEE International Symposium on Real-Time Distributed Computing, ISORC 2023, Nashville, TN, USA, May 23-25, 2023, pp. 76-85, 2023, IEEE, 979-8-3503-3902-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Ahsan Saeed, Denis Hoornaert, Dakshina Dasari, Dirk Ziegenbein, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Andreas Gerstlauer, Renato Mancuso 0001 |
Memory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECRTS ![In: 35th Euromicro Conference on Real-Time Systems, ECRTS 2023, July 11-14, 2023, Vienna, Austria, pp. 4:1-4:23, 2023, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-280-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Jeremy Jens Giesen León, Enrico Mezzetti, Jaume Abella 0001, Francisco Javier Cazorla-Almeida |
ASCOM: Affordable Sequence-aware COntention Modeling in Crossbar-based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing, SAC 2023, Tallinn, Estonia, March 27-31, 2023, pp. 471-474, 2023, ACM, 978-1-4503-9517-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Klajd Zyla, Florian Maurer 0003, Thomas Wild, Andreas Herkersdorf |
CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - 36th International Conference, ARCS 2023, Athens, Greece, June 13-15, 2023, Proceedings, pp. 215-229, 2023, Springer, 978-3-031-42784-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Khalil Esper, Jan Spieck, Pierre-Louis Sixdenier, Stefan Wildermann, Jürgen Teich |
RAVEN: Reinforcement Learning for Generating Verifiable Run-Time Requirement Enforcers for MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NG-RES@HiPEAC ![In: Fourth Workshop on Next Generation Real-Time Embedded Systems, NG-RES 2023, January 18, 2023, Toulouse, France., pp. 7:1-7:16, 2023, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-268-6. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Halima Bouzidi, Mohanad Odema, Hamza Ouarnoughi, Smaïl Niar, Mohammad Abdullah Al Faruque |
Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 60th ACM/IEEE Design Automation Conference, DAC 2023, San Francisco, CA, USA, July 9-13, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-2348-1. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Laura Elena Rubio Anguiano, José Luis Briz, Antonio Ramírez-Treviño |
Accounting for Preemption and Migration Costs in the Calculation of Hard Real-Time Cyclic Executives for MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Robotics Autom. Lett. ![In: IEEE Robotics Autom. Lett. 7(3), pp. 7990-7997, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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16 | Soroush Heidari, Mehdi Ghasemi 0003, Young Geun Kim, Carole-Jean Wu, Sarma B. K. Vrudhula |
CAMDNN: Content-Aware Mapping of a Network of Deep Neural Networks on Edge MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 71(12), pp. 3191-3202, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Mostafa Rizk, Kevin J. M. Martin, Jean-Philippe Diguet |
Run-Time Remapping Algorithm of Dataflow Actors on NoC-Based Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 33(10), pp. 3959-3976, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Diego V. Cirilo do Nascimento, Kyriakos Georgiou, Kerstin I. Eder, Samuel Xavier de Souza |
Evaluating the effects of reducing voltage margins for energy-efficient operation of MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2209.12134, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Athena Abdi, Armin Salimi-Badr |
A novel evolutionary-based neuro-fuzzy task scheduling approach to jointly optimize the main design challenges of heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2203.14717, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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16 | Ehsan Saboori, Samar Abdi |
Rapid design space exploration of multi-clock domain MPSoCs with hybrid prototyping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2208.05068, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Chen Liu 0013, Chengmo Yang |
Defense Against Hardware Trojan Collusion in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Behavioral Synthesis for Hardware Security ![In: Behavioral Synthesis for Hardware Security, pp. 233-264, 2022, Springer International Publishing, 978-3-030-78840-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Guillem Cabo, Sergi Alcaide, Carles Hernández 0001, Pedro Benedicte, Francisco Bas, Fabio Mazzocchetti, Jaume Abella 0001 |
SafeSU-2: a Safe Statistics Unit for Space MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2022 Design, Automation & Test in Europe Conference & Exhibition, DATE 2022, Antwerp, Belgium, March 14-23, 2022, pp. 1085-1086, 2022, IEEE, 978-3-9819263-6-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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16 | Johanna Sepúlveda, Dominik Winkler |
Super Acceleration of Dilithium in MPSoCs Critical Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: IEEE European Test Symposium, ETS 2022, Barcelona, Spain, May 23-27, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-6706-3. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Halima Najibi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, David Atienza |
Thermal and Power-Aware Run-time Performance Management of 3D MPSoCs with Integrated Flow Cell Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6 - 8, 2022, pp. 223-228, 2022, ACM, 978-1-4503-9322-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Alfonso Mascareñas González, Jean-Baptiste Chaudron, Frédéric Boniol, Youcef Bouchebaba, Jean-Loup Bussenot |
Task and Memory Mapping Optimization for SDRAM Interference Minimization on Heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETFA ![In: 27th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2022, Stuttgart, Germany, September 6-9, 2022, pp. 1-8, 2022, IEEE, 978-1-6654-9996-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Khalil Esper, Stefan Wildermann, Jürgen Teich |
Multi-Requirement Enforcement of Non-Functional Properties on MPSoCs Using Enforcement FSMs - A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NG-RES@HiPEAC ![In: Third Workshop on Next Generation Real-Time Embedded Systems, NG-RES@HiPEAC 2022, June 22, 2022, Budapest, Hungary., pp. 2:1-2:13, 2022, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-221-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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16 | Alfonso Mascareñas González, Jean-Baptiste Chaudron, Frédéric Boniol, Youcef Bouchebaba, Jean-Loup Bussenot |
Towards an efficient cost function equation for DDR SDRAM interference analysis on heterogeneous MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DS-RT ![In: 26th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, DS-RT 2022, Alès, France, September 26-28, 2022, pp. 29-38, 2022, IEEE, 978-1-6654-9799-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|