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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 82 occurrences of 72 keywords
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Results
Found 181 publication records. Showing 181 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
50 | Kai Yang, Kwang-Ting Cheng |
Efficient identification of multi-cycle false path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 360-365, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
47 | Gregory Lucas, Chen Dong 0003, Deming Chen |
Variation-aware placement for FPGAs with multi-cycle statistical timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 177-180, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multi-cycle, variation-aware, fpga, placement, ssta, statistical static timing analysis |
44 | Hiroyuki Higuchi |
An implication-based method to detect multi-cycle paths in large sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 164-169, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
multi-cycle path, sequential circuits, ATPG, implication |
42 | Keith A. Bowman, James W. Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De |
Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 79-84, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
intra-die variations, multi-cycle interconnect, parameter fluctuations, time borrowing, interconnect, parameter variations, within-die variations, variation tolerant |
41 | María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida |
Area optimization of multi-cycle operators in high-level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 449-454, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu 0002, Chung-Kuan Cheng, Michael D. Hutton |
Efficient static timing analysis using a unified framework for false paths and multi-cycle paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 73-78, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
biclique covering, false subgraphs, multi-cycle subgraphs, static timing analysis, time shifting |
33 | Jae-sun Seo, Dennis Sylvester, David T. Blaauw, Himanshu Kaul, Ram Krishnamurthy 0001 |
A robust edge encoding technique for energy-efficient multi-cycle interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007, Portland, OR, USA, August 27-29, 2007, pp. 68-73, 2007, ACM, 978-1-59593-709-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
multi-cycle interconnect, interconnect, encoding, repeaters |
31 | Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang |
Architecture and synthesis for multi-cycle communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 190-196, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
RDR, multi-cycle communication, scheduling, interconnect, placement, binding, deep sub-micron, timing closure |
29 | Mary D. Brown, Jared Stark, Yale N. Patt |
Select-free instruction scheduling logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 34th Annual International Symposium on Microarchitecture, Austin, Texas, USA, December 1-5, 2001, pp. 204-213, 2001, ACM/IEEE Computer Society, 0-7695-1369-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
29 | Hiroyuki Higuchi, Yusuke Matsunaga |
Enhancing the performance of multi-cycle path analysis in an industrial setting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 192-197, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Jinhwan Jeon, Daehong Kim, Dongwan Shin, Kiyoung Choi |
High-level synthesis under multi-cycle interconnect delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 662, 2001, ACM, 0-7803-6634-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
24 | Priyank Kalla, Maciej J. Ciesielski |
Testability of Sequential Circuits with Multi-Cycle False Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 15th IEEE VLSI Test Symposium (VTS'97), April 27-May 1, 1997, Monterey, California, USA, pp. 322-328, 1997, IEEE Computer Society, 0-8186-7810-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
23 | Mary D. Brown, Yale N. Patt |
Using Internal Redundant Representations and Limited Bypass to Support Pipelined Adders and Register Files. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February 2-6, 2002, pp. 289-298, 2002, IEEE Computer Society, 0-7695-1525-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
redundant binary, limited bypass, pipelined register file, signed digit |
23 | Manan Syal, Michael S. Hsiao, Suriyaprakash Natarajan, Sreejit Chakravarty |
Untestable Multi-Cycle Path Delay Faults in Industrial Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 194-201, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Quang Dinh, Deming Chen, Martin D. F. Wong |
Efficient ASIP design for configurable processors with fine-grained resource sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 99-106, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multi-cycle IO, compilation, ASIP, resource sharing, configurable processor |
20 | Laura Pozzi, Paolo Ienne |
Exploiting pipelining to relax register-file port constraints of instruction-set extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2005, San Francisco, California, USA, September 24-27, 2005, pp. 2-10, 2005, ACM, 1-59593-149-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
automatic instruction-set extension, constrained scheduling, embedded customised architectures, multi-cycle register access, input/output |
19 | Daniel Citron, Dror G. Feitelson, Larry Rudolph |
Accelerating Multi-Media Processing by Implementing Memoing in Multiplication and Division Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998., pp. 252-261, 1998, ACM Press, 1-58113-107-0. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
19 | Md. Abdur Razzaque, Md. Mamun-Or-Rashid, Choong Seon Hong |
MC2DR: Multi-cycle Deadlock Detection and Recovery Algorithm for Distributed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: High Performance Computing and Communications, Third International Conference, HPCC 2007, Houston, USA, September 26-28, 2007, Proceedings, pp. 554-565, 2007, Springer, 978-3-540-75443-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Arun Krishnamachary, Jacob A. Abraham |
Effects of Multi-cycle Sensitization on Delay Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 137-142, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Lei Cheng 0001, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig |
Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 370-375, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhiru Zhang |
Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 536-543, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Ahmad Ahmadi, Reza Faghih Mirzaee |
MIPS-Core Application Specific Instruction-Set Processor for IDEA Cryptography - Comparison between Single-Cycle and Multi-Cycle Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1903.00191, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
17 | David J. Greaves |
Further sub-cycle and multi-cycle schedulling support for Bluespec Verilog. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: Proceedings of the 17th ACM-IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2019, La Jolla, CA, USA, October 9-11, 2019., pp. 2:1-2:11, 2019, ACM, 978-1-4503-6997-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Sun Qiang |
A peak power optimization scheduling algorithm for single cycle operations and multi-cycle operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8483-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
17 | Irith Pomeranz |
On the use of multi-cycle tests for storage of two-cycle broadside tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
15 | Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida |
Arrival time aware scheduling to minimize clock cycle length. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1018-1021, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Yi-Wei Ci, Zhan Zhang, De-Cheng Zuo, Zhibo Wu, Xiao-Zong Yang |
Communication-Based Prevention of Non-P-Pattern. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SRDS ![In: 28th IEEE Symposium on Reliable Distributed Systems (SRDS 2009), Niagara Falls, New York, USA, September 27-30, 2009, pp. 129-134, 2009, IEEE Computer Society, 978-0-7695-3826-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
multi-cycle checkpointing, fault-tolerance, checkpoint |
15 | Jason Cong, Yiping Fan, Zhiru Zhang |
Architecture-level synthesis for automatic interconnect pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 602-607, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
interconnect pipelining, multi-cycle communication, scheduling, high-level synthesis, register binding |
13 | Robert D. Mullins, Andrew West, Simon W. Moore |
The design and implementation of a low-latency on-chip network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 164-169, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Qiaoyan Yu, Paul Ampadu |
Adaptive Error Control for NoC Switch-to-Switch Links in a Variable Noise Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 352-360, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida |
Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 1252-1257, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Ilhyun Kim, Mikko H. Lipasti |
Macro-op Scheduling: Relaxing Scheduling Loop Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 36th Annual International Symposium on Microarchitecture, San Diego, CA, USA, December 3-5, 2003, pp. 277-290, 2003, IEEE Computer Society, 0-7695-2043-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Ewa Z. Bem, Luke Petelczyc |
MiniMIPS: a simulation project for the computer architecture laboratory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCSE ![In: Proceedings of the 34th SIGCSE Technical Symposium on Computer Science Education, SIGCSE 2003, Reno, Nevada, USA, February 19-23, 2003, pp. 64-68, 2003, ACM, 1-58113-648-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
simulation in lab environments, computer architecture |
11 | Zhen Wang, Chunming Ye, Jianquan Guo |
Robust optimization of multi-objective multi-cycle remanufacturing supply chain network considering incentive compatibility theory under improved algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Ind. Eng. ![In: Comput. Ind. Eng. 187, pp. 109777, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
11 | Xiaofeng Xu, Wenzhi Liu, Mingyue Jiang, Ziru Lin |
A multi-cycle and multi-echelon location-routing problem for integrated reverse logistics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ind. Manag. Data Syst. ![In: Ind. Manag. Data Syst. 122(10), pp. 2237-2260, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
11 | Vicky H. Mak-Hau |
A polyhedral study of the cardinality constrained multi-cycle and multi-chain problem on directed graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Oper. Res. ![In: Comput. Oper. Res. 99, pp. 13-26, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Anirban Sengupta, Saumya Bhadauria |
Automated design space exploration of multi-cycle transient fault detectable datapath based on multi-objective user constraints for application specific computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Adv. Eng. Softw. ![In: Adv. Eng. Softw. 82, pp. 14-24, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
11 | Run Yu, PingSun Leung |
Optimal harvesting strategies for a multi-cycle and multi-pond shrimp operation: A practical network model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Math. Comput. Simul. ![In: Math. Comput. Simul. 68(4), pp. 339-354, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
10 | Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda, Anshul Kumar |
Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 35(6), pp. 507-527, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Performance evaluation, VLIW, ASIP, Clustered VLIW processors |
10 | Suriyaprakash Natarajan, Srinivas Patil, Sreejit Chakravarty |
Path Delay Fault Simulation on Large Industrial Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA, pp. 16-23, 2006, IEEE Computer Society, 0-7695-2514-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
10 | Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda, Anshul Kumar |
Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 730-735, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
10 | Hossein Asadi 0001, Mehdi Baradaran Tahoori |
Soft Error Modeling and Protection for Sequential Elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 3-5 October 2005, Monterey, CA, USA, pp. 463-474, 2005, IEEE Computer Society, 0-7695-2464-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
10 | Takafumi Takatsuka, Jun Ogi, Yasuji Ikeda, Kazuki Hizu, Yutaka Inaoka, Shunsuke Sakama, Iori Watanabe, Tatsuya Ishikawa, Shohei Shimada, Junki Suzuki, Hidenori Maeda, Kenji Toshima, Yusuke Nonaka, Akifumi Yamamura, Hideki Ozawa, Fumihiko Koga, Yusuke Oike |
A 3.36-μm-Pitch SPAD Photon-Counting Image Sensor Using a Clustered Multi-Cycle Clocked Recharging Technique With an Intermediate Most-Significant-Bit Readout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 59(4), pp. 1137-1145, April 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
10 | Elahe Baratalipour, Arezoo Kamran |
SAMA: Self-adjusting multi-cycle approximate adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 134, pp. 105740, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
10 | Senling Wang, Xihong Zhou, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima |
Test Point Insertion for Multi-Cycle Power-On Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 28(3), pp. 46:1-46:21, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
10 | Yihua Guo, Li Kang, Renjun Jia, Ting Wang |
Multi-cycle Deep Recurrent Learning for Power Consumption Time Series Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCEIC ![In: 4th International Conference on Computer Engineering and Intelligent Control, ICCEIC 2023, Guangzhou, China, October 20-22, 2023, pp. 226-230, 2023, IEEE, 979-8-3503-0887-7. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
10 | Libo Wang, Yuhan Liu |
Multi-Cycle Emergency Material Dispatch Considering the Impact of Psychological Anxiety Under Public Health Emergencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNC-FSKD ![In: 19th International Conference on Natural Computation, Fuzzy Systems and Knowledge Discovery ICNC-FSKD 2023, Harbin, China, July 29-31, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-0439-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
10 | Takafumi Takatsuka, Jun Ogi, Yasuji Ikeda, Kazuki Hizu, Yutaka Inaoka, Shunsuke Sakama, Iori Watanabe, T. Ishikawa, Shohei Shimada, Junki Suzuki, Hidenori Maeda, Kenji Toshima, Yusuke Nonaka, Akifumi Yamamura, Hideki Ozawa, Fumihiko Koga, Yusuke Oike |
A 3.36 µm-pitch SPAD photon-counting image sensor using clustered multi-cycle clocked recharging technique with intermediate most-significant-bit readout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Technology and Circuits ![In: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, June 11-16, 2023, pp. 1-2, 2023, IEEE, 978-4-86348-806-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
10 | Zhonghui Li, Panida Chamchang, Lili Niu, Jiangtao Mo |
A multi-cycle inventory control model for deteriorating items with partial backlogging under trade credit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Frontiers Appl. Math. Stat. ![In: Frontiers Appl. Math. Stat. 8, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
10 | Yanxia Liu, Anni Chen, Hongyu Shi, Sijuan Huang, Wanjia Zheng, Zhiqiang Liu, Qin Zhang 0013, Xin Yang |
CT synthesis from MRI using multi-cycle GAN for head-and-neck radiation therapy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Medical Imaging Graph. ![In: Comput. Medical Imaging Graph. 91, pp. 101953, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
10 | Xiaowei Xu 0004, Jiawei Zhang, Jinglan Liu, Yukun Ding, Tianchen Wang, Hailong Qiu, Haiyun Yuan, Jian Zhuang, Wen Xie, Yuhao Dong, Qianjun Jia, Meiping Huang, Yiyu Shi 0001 |
Multi-Cycle-Consistent Adversarial Networks for Edge Denoising of Computed Tomography Images. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 17(4), pp. 58:1-58:16, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
10 | Xiaowei Xu 0004, Jiawei Zhang, Jinglan Liu, Yukun Ding, Tianchen Wang, Hailong Qiu, Haiyun Yuan, Jian Zhuang, Wen Xie, Yuhao Dong, Qianjun Jia, Meiping Huang, Yiyu Shi 0001 |
Multi-Cycle-Consistent Adversarial Networks for Edge Denoising of Computed Tomography Images. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2104.12044, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
10 | Peter Toth, Hiroki Ishikuro |
An 18 Bit Time-to-Digital Converter Design with Large Dynamic Range and Automated Multi-Cycle Concept. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, Tokyo, Japan, January 18-21, 2021, pp. 105-106, 2021, ACM, 978-1-4503-7999-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
10 | Edward Lam 0001, Vicky H. Mak-Hau |
Branch-and-cut-and-price for the cardinality-constrained multi-cycle problem in kidney exchange. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Oper. Res. ![In: Comput. Oper. Res. 115, pp. 104852, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
10 | Carla Negri Lintzmayer, Flávio Keidi Miyazawa, Phablo F. S. Moura, Eduardo C. Xavier |
Randomized approximation scheme for Steiner Multi Cycle in the Euclidean plane. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 835, pp. 134-155, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
10 | Jinglan Liu, Yukun Ding, Jinjun Xiong, Qianjun Jia, Meiping Huang, Jian Zhuang, Bike Xie, Chun-Chen Liu, Yiyu Shi 0001 |
Multi-Cycle-Consistent Adversarial Networks for CT Image Denoising. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2002.12130, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
10 | Xiang Xu, Megha Nawhal, Greg Mori, Manolis Savva |
MCMI: Multi-Cycle Image Translation with Mutual Information Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2007.02919, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
10 | Andrea Tani, Francesco Chiti, Romano Fantacci, Dania Marabissi |
Multi-cycle spectrum sensing for OFDM signals under cyclic frequency offsets in cognitive vehicular networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Commun. ![In: IET Commun. 14(14), pp. 2259-2269, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
10 | Hanan T. Al-Awadhi, Tomoki Aono, Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima |
FF-Control Point Insertion (FF-CPI) to Overcome the Degradation of Fault Detection under Multi-Cycle Test for POST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 103-D(11), pp. 2289-2301, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
10 | Jinglan Liu, Yukun Ding, Jinjun Xiong, Qianjun Jia, Meiping Huang, Jian Zhuang, Bike Xie, Chun-Chen Liu, Yiyu Shi 0001 |
Multi-Cycle-Consistent Adversarial Networks for CT Image Denoising. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISBI ![In: 17th IEEE International Symposium on Biomedical Imaging, ISBI 2020, Iowa City, IA, USA, April 3-7, 2020, pp. 614-618, 2020, IEEE, 978-1-5386-9330-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
10 | Benjamin Sturm, Ali Sunyaev |
Design Principles for Systematic Search Systems: A Holistic Synthesis of a Rigorous Multi-cycle Design Science Research Journey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Bus. Inf. Syst. Eng. ![In: Bus. Inf. Syst. Eng. 61(1), pp. 91-111, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Sae Kyu Lee, Paul N. Whatmough, David Brooks 0001, Gu-Yeon Wei |
A 16-nm Always-On DNN Processor With Adaptive Clocking and Multi-Cycle Banked SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 54(7), pp. 1982-1992, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Carla Negri Lintzmayer, Flávio Keidi Miyazawa, Phablo F. S. Moura, Eduardo C. Xavier |
Quasilinear Approximation Scheme for Steiner Multi Cycle in the Euclidean plane. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LAGOS ![In: Proceedings of the tenth Latin and American Algorithms, Graphs and Optimization Symposium, LAGOS 2019, Belo Horizonte, Brazil, June 2-7, 2019, pp. 589-601, 2019, Elsevier. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Stefano Proto, Francesco Ventura, Daniele Apiletti, Tania Cerquitelli, Elena Baralis, Enrico Macii, Alberto Macii |
PREMISES, a Scalable Data-Driven Service to Predict Alarms in Slowly-Degrading Multi-Cycle Industrial Processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BigData Congress ![In: 2019 IEEE International Congress on Big Data, BigData Congress 2019, Milan, Italy, July 8-13, 2019, pp. 139-143, 2019, IEEE, 978-1-7281-2772-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Helge Spieker, Arnaud Gotlieb, Morten Mossige |
Rotational Diversity in Multi-Cycle Assignment Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI ![In: The Thirty-Third AAAI Conference on Artificial Intelligence, AAAI 2019, The Thirty-First Innovative Applications of Artificial Intelligence Conference, IAAI 2019, The Ninth AAAI Symposium on Educational Advances in Artificial Intelligence, EAAI 2019, Honolulu, Hawaii, USA, January 27 - February 1, 2019., pp. 7724-7731, 2019, AAAI Press, 978-1-57735-809-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Xing Liu 0002, Linghao Fu, Wenbi Rao, Xiongmin Lin, Mingxi Liao, Bing Shi |
Multi-Cycle CPU Design With FPGA for Teaching of Computer Organization Principle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSE ![In: 14th International Conference on Computer Science & Education, ICCSE 2019, Toronto, ON, Canada, August 19-21, 2019, pp. 472-477, 2019, IEEE, 978-1-7281-1846-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Mohammed T. Lazim, Mohammed Baniyounis, Samer Z. A. Salah |
Harmonics generation Due to Multi-Cycle Auto Reclosing on HV Transmission Lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SSD ![In: 16th International Multi-Conference on Systems, Signals & Devices, SSD 2019, Istanbul, Turkey, March 21-24, 2019, pp. 309-314, 2019, IEEE, 978-1-7281-1820-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Helge Spieker, Arnaud Gotlieb, Morten Mossige |
Rotational Diversity in Multi-Cycle Assignment Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1811.03496, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
10 | Wonki Lee, Seulgee Kim, DaeEun Kim |
Individual Biometric Identification Using Multi-Cycle Electrocardiographic Waveform Patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 18(4), pp. 1005, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Hesam Sadeghi Gougheri, Mehdi Kiani |
A Multi-Cycle Switching Technique for Efficient Ultrasonic Wireless Power Delivery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 65-II(3), pp. 286-290, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Vinicius N. G. Pereira, Mário César San Felice, Pedro Henrique Del Bianco Hokama, Eduardo C. Xavier |
The Steiner Multi Cycle Problem with Applications to a Collaborative Truckload Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEA ![In: 17th International Symposium on Experimental Algorithms, SEA 2018, June 27-29, 2018, L'Aquila, Italy, pp. 26:1-26:13, 2018, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-070-5. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Shigeyuki Oshima, Takaaki Kato, Senling Wang, Yasuo Sato, Seiji Kajihara |
On Flip-Flop Selection for Multi-cycle Scan Test with Partial Observation in Logic BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATS ![In: 27th IEEE Asian Test Symposium, ATS 2018, Hefei, China, October 15-18, 2018, pp. 30-35, 2018, IEEE, 978-1-5386-9466-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Senling Wang, Tomoki Aono, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima |
Capture-Pattern-Control to Address the Fault Detection Degradation Problem of Multi-cycle Test in Logic BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATS ![In: 27th IEEE Asian Test Symposium, ATS 2018, Hefei, China, October 15-18, 2018, pp. 155-160, 2018, IEEE, 978-1-5386-9466-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Sae Kyu Lee, Paul N. Whatmough, Niamh Mulholland, Patrick Hansen, David Brooks 0001, Gu-Yeon Wei |
A Wide Dynamic Range Sparse FC-DNN Processor with Multi-Cycle Banked SRAM Read and Adaptive Clocking in 16nm FinFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, Germany, September 3-6, 2018, pp. 158-161, 2018, IEEE, 978-1-5386-5404-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Valentino Meacci, Enrico Boni, Alessandro Dallai, Alessandro Ramalli, Monica Scaringella, Francesco Guidi, Dario Russo, Stefano Ricci |
FPGA-Based Multi Cycle Parallel Architecture for Real-Time Processing in Ultrasound Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ApplePies ![In: Applications in Electronics Pervading Industry, Environment and Society, APPLEPIES 2018., pp. 295-301, 2018, Springer, 978-3-030-11972-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Agoritsa Gogoulou, Maria Grigoriadou |
Engaging Postgraduate Students in a Wiki-Based Multi-cycle Peer Assessment Activity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TECH-EDU ![In: Technology and Innovation in Learning, Teaching and Education - First International Conference, TECH-EDU 2018, Thessaloniki, Greece, June 20-22, 2018, Revised Selected Papers, pp. 582-594, 2018, Springer, 978-3-030-20953-7. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Gokul Subramanian Ravi, Mikko H. Lipasti |
Timing Speculation in Multi-Cycle Data Paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 16(1), pp. 84-87, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
10 | Chiapin Wang, Chi-Ming Li, Kuo-Chang Ting |
Energy-efficient and QoS-aware discontinuous reception using a multi-cycle mechanism in 3GPP LTE/LTE-advanced. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Telecommun. Syst. ![In: Telecommun. Syst. 64(4), pp. 599-615, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
10 | Lennart Tautz, Markus Hüllebrand, Michael Steinmetz, Dirk Voit, Jens Frahm, Anja Hennemuth |
Exploration of Interventricular Septum Motion in Multi-Cycle Cardiac MRI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VCBM ![In: VCBM 17: Eurographics Workshop on Visual Computing for Biology and Medicine, Bremen, Germany, September 7-8, 2017, pp. 169-178, 2017, Eurographics Association, 978-3-03868-036-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
10 | Teodora Chitiboi, Rebecca Ramb, Li Feng, Eve Piekarski, Lennart Tautz, Anja Hennemuth, Leon Axel |
Multi-cycle Reconstruction of Cardiac MRI for the Analysis of Inter-ventricular Septum Motion During Free Breathing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FIMH ![In: Functional Imaging and Modelling of the Heart - 9th International Conference, FIMH 2017, Toronto, ON, Canada, June 11-13, 2017, Proceedings, pp. 63-72, 2017, Springer, 978-3-319-59447-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
10 | Yasser M. H. Abdelhamed, Abu B. Sesay |
Multi-cycle cyclostaionary spectrum sensing using canonical correlation analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: 30th IEEE Canadian Conference on Electrical and Computer Engineering, CCECE 2017, Windsor, ON, Canada, April 30 - May 3, 2017, pp. 1-4, 2017, IEEE, 978-1-5090-5538-8. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
10 | A. H. M. Kamal, Mohammad Mahfuzul Islam |
Boosting up the data hiding rate through multi cycle embedment process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Vis. Commun. Image Represent. ![In: J. Vis. Commun. Image Represent. 40, pp. 574-588, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Deepak Kachave, Anirban Sengupta |
Integrating physical level design and high level synthesis for simultaneous multi-cycle transient and multiple transient fault resiliency of application specific datapath processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 60, pp. 141-152, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Hesam Sadeghi Gougheri, Mehdi Kiani |
Current-Based Resonant Power Delivery With Multi-Cycle Switching for Extended-Range Inductive Power Transmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(9), pp. 1543-1552, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Anirban Sengupta, Deepak Kachave |
Generating Multi-cycle and Multiple Transient Fault Resilient Design During Physically Aware High Level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016, pp. 75-80, 2016, IEEE Computer Society, 978-1-4673-9039-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Cemil Cem Gürsoy, Abdullah Yildiz, Sezer Gören 0001 |
On optimization of multi-cycle tests for test quality and application time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: 2016 IEEE East-West Design & Test Symposium, EWDTS 2016, Yerevan, Armenia, October 14-17, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-5090-0693-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Senling Wang, Hanan T. Al-Awadhi, Soh Hamada, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Jun Matsushima |
Structure-Based Methods for Selecting Fault-Detection-Strengthened FF under Multi-cycle Test with Sequential Observation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATS ![In: 25th IEEE Asian Test Symposium, ATS 2016, Hiroshima, Japan, November 21-24, 2016, pp. 209-214, 2016, IEEE Computer Society, 978-1-5090-3809-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Ting He 0002, Yangyang Zhao, Tianyang Li, Dianhui Chu |
Research on Quantity-Discount Contract Based Two-Stage Supply Chain Coordination in the Environment of Discrete Multi-cycle Demand. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSS ![In: 9th International Conference on Service Science, ICSS 2016, ChongQing, China, October 15-16, 2016, pp. 82-87, 2016, IEEE, 978-1-5090-2727-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Anirban Sengupta, Saumya Bhadauria |
Bacterial foraging driven exploration of multi cycle fault tolerant datapath based on power-performance tradeoff in high level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Expert Syst. Appl. ![In: Expert Syst. Appl. 42(10), pp. 4719-4732, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
10 | Diego González 0002, Guillermo Botella, Carlos García 0001, Anke Meyer-Bäse, Uwe Meyer-Bäse, Manuel Prieto-Matías |
Customized Nios II multi-cycle instructions to accelerate block-matching techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real-Time Image and Video Processing ![In: Real-Time Image and Video Processing 2015, San Francisco, CA, USA, February 10, 2015, pp. 940002, 2015, SPIE, 978-1-6284-1490-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
10 | Nilesh Goel, Tejas Naphade, Souvik Mahapatra |
Combined trap generation and transient trap occupancy model for time evolution of NBTI during DC multi-cycle and AC stress. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015, pp. 4, 2015, IEEE, 978-1-4673-7362-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
10 | Tsuyoshi Iwagaki, Yutaro Ishimori, Hideyuki Ichihara, Tomoo Inoue |
Designing area-efficient controllers for multi-cycle transient fault tolerant systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 20th IEEE European Test Symposium, ETS 2015, Cluj-Napoca, Romania, 25-29 May, 2015, pp. 1-2, 2015, IEEE, 978-1-4799-7603-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
10 | Byunghun Lee, Pyungwoo Yeon, Maysam Ghovanloo |
A multi-cycle Q-modulation technique for wirelessly-powered biomedical implants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BioCAS ![In: IEEE Biomedical Circuits and Systems Conference, BioCAS 2015, Atlanta, GA, USA, October 22-24, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-7234-0. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
10 | Anirban Sengupta, Reza Sedaghat |
Exploration of optimal multi-cycle transient fault secured datapath during high level synthesis based on user area-delay budget. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: IEEE 28th Canadian Conference on Electrical and Computer Engineering, CCECE 2015, Halifax, NS, Canada, May 3-6, 2015, pp. 69-74, 2015, IEEE, 978-1-4799-5827-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
10 | Dominik Erb, Karsten Scheibler, Matthias Sauer 0002, Sudhakar M. Reddy, Bernd Becker 0001 |
Multi-cycle Circuit Parameter Independent ATPG for interconnect open defects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
10 | Hong-Sen Yan, Tian-Hua Jiang, Wen-Wu Shi, Shan Li |
An iterative learning method for multi-cycle flexible production/inventory control under random demands. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Fuzzy Syst. ![In: J. Intell. Fuzzy Syst. 26(6), pp. 2591-2607, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
10 | Irith Pomeranz |
Multi-cycle broadside tests with runs of constant primary input vectors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 8(2), pp. 90-96, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
10 | Irith Pomeranz |
Design-for-testability for multi-cycle broadside tests by holding of state variables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 19(2), pp. 19:1-19:20, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
10 | Michal Karczmarek, Arvind, Muralidaran Vijayaraghavan |
A new synthesis procedure for atomic rules containing multi-cycle function blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: Twelfth ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2014, Lausanne, Switzerland, October 19-21, 2014, pp. 22-31, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
10 | Teodora Chitiboi, Anja Hennemuth, Lennart Tautz, Markus Hüllebrand, Jens Frahm, Lars Linsen, Horst K. Hahn |
Context-based segmentation and analysis of multi-cycle real-time cardiac MRI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISBI ![In: IEEE 11th International Symposium on Biomedical Imaging, ISBI 2014, April 29 - May 2, 2014, Beijing, Chin, Beijing, China, pp. 943-946, 2014, IEEE, 978-1-4673-1961-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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