Search results for "neuroprocessor"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
106	Wai-Chi Fang, Bing J. Sheu, Holger Venus, Rainer Sandau	Smart-pixel array processors based on optimal cellular neural networks for space sensor applications.	ICCD	1995	DBLP DOI BibTeX RDF	artificial satellites, smart-pixel array processors, optimal cellular neural networks, space sensor applications, hardware annealing, digitally programmable synaptic weights, multisensor parallel interface, programmable multi-dimensional array, optoelectronic neurons, neuroprocessor, scalable multiprocessor system, intelligent multisensor, advanced small satellites, neuroprocessor array chip, performance evaluation, real-time systems, parallel processing, CMOS technology, image sensors, aerospace computing, computing performance, neural chips, intelligent sensors, neural net architecture, active-pixel sensors, cellular neural nets
96	Abhijit S. Pandya, Ankur Agarwal, Pyeoung Kee Kim	Low Power Design of the Neuroprocessor.	KES	2003	DBLP DOI BibTeX RDF
82	Igor Dantas dos Santos Miranda, Ana Isabela Araújo Cunha	ASIC design of a novel high performance neuroprocessor architecture for multi layered perceptron networks.	SBCCI	2009	DBLP DOI BibTeX RDF	neural network arithmetic, neuroprocessor, ASIC
68	Martin J. Pearson, Anthony G. Pipe, Benjamin Mitchinson, Kevin N. Gurney, Chris Melhuish, Ian Gilhespy, Mokhtar Nibouche	Implementing Spiking Neural Networks for Real-Time Signal-Processing and Control Applications: A Model-Validated FPGA Approach.	IEEE Trans. Neural Networks	2007	DBLP DOI BibTeX RDF
45	Alfred Strey, Narcís Avellana	A New Concept for Parallel Neurocomputer Architectures.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF
28	Adam Z. Foshie, James S. Plank, Garrett S. Rose, Catherine D. Schuman	Functional Specification of the RAVENS Neuroprocessor.	CoRR	2023	DBLP DOI BibTeX RDF
28	Adam Z. Foshie, Charles Rizzo, Hritom Das, Chaohui Zheng, James S. Plank, Garrett S. Rose	Benchmark Comparisons of Spike-based Reconfigurable Neuroprocessor Architectures for Control Applications.	ACM Great Lakes Symposium on VLSI	2022	DBLP DOI BibTeX RDF
28	V. A. Filippov, A. N. Bobylev, A. N. Busygin, A. D. Pisarev, S. Yu. Udovichenko	A biomorphic neuron model and principles of designing a neural network with memristor synapses for a biomorphic neuroprocessor.	Neural Comput. Appl.	2020	DBLP DOI BibTeX RDF
28	A. D. Pisarev, A. N. Busygin, S. Yu. Udovichenko, O. V. Maevsky	A biomorphic neuroprocessor based on a composite memristor-diode crossbar.	Microelectron. J.	2020	DBLP DOI BibTeX RDF
28	Vladimir Ruchkin, Vladimir Fulin, Dmitry Pikulin, Boris Kostrov, Aleksandr Taganov, Aleksandr Kolesenkov, Ekaterina Ruchkina	Analysis of models of representation for expert choice neuroprocessor structure.	MECO	2018	DBLP DOI BibTeX RDF
28	Walther Carballo-Hernández, Miguel Arias-Estrada	Deep Learning Pulsed-based Convolutional Neuroprocessor Architecture on FPGAs.	ICDSC	2017	DBLP DOI BibTeX RDF
28	Jan Lachmair, Erzsébet Merényi, Mario Porrmann, Ulrich Rückert 0001	A reconfigurable neuroprocessor for self-organizing feature maps.	Neurocomputing	2013	DBLP DOI BibTeX RDF
28	Fei Zhang, Mehdi Aghagolzadeh, Karim G. Oweiss	A Fully Implantable, Programmable and Multimodal Neuroprocessor for Wireless, Cortically Controlled Brain-Machine Interface Applications.	J. Signal Process. Syst.	2012	DBLP DOI BibTeX RDF
28	Jan Lachmair, Erzsébet Merényi, Mario Porrmann, Ulrich Rückert 0001	gNBXe - a Reconfigurable Neuroprocessor for Various Types of Self-Organizing Maps.	ESANN	2012	DBLP BibTeX RDF
28	José Manuel Ferrández, Victor Lorente, Félix de la Paz, J. M. Cuadra, José Ramón Álvarez Sánchez, Eduardo Fernández 0001	A biological neuroprocessor for robotic guidance using a center of area method.	Neurocomputing	2011	DBLP DOI BibTeX RDF
28	Fei Zhang, Mehdi Aghagolzadeh, Karim G. Oweiss	A low-power implantable neuroprocessor on nano-FPGA for Brain Machine interface applications.	ICASSP	2011	DBLP DOI BibTeX RDF
28	Daniel de Santos, Victor Lorente, Félix de la Paz, José Manuel Cuadra Troncoso, José Ramón Álvarez Sánchez, Eduardo Fernández 0001, José M. Ferrández	A client-server architecture for remotely controlling a robot using a closed-loop system with a biological neuroprocessor.	Robotics Auton. Syst.	2010	DBLP DOI BibTeX RDF
28	José Manuel Ferrández de Vicente, Markus Bongard, Victor Lorente, J. Abarca, Rosa Villa, Eduardo Fernández 0001	Activity Modulation in Human Neuroblastoma Cultured Cells: Towards a Biological Neuroprocessor.	IWINAC (1)	2009	DBLP DOI BibTeX RDF
28	José M. Ferrández, Victor Lorente, F. Javier Garrigós, Eduardo Fernández 0001	A Biological Neural Network for Robotic Control - Towards a Human Neuroprocessor.	IJCCI	2009	DBLP BibTeX RDF
28	Yiwei Zhang 0002, José L. Núñez-Yáñez, Joe McGeehan, Edward Regan, Stephen Kelly	A biophysically accurate floating point somatic neuroprocessor.	FPL	2009	DBLP DOI BibTeX RDF
28	Juan José Raygoza-Panduro, Susana Ortega-Cisneros, Eduardo I. Boemo	FPGA implementation of a synchronous and self-timed neuroprocessor.	ReConFig	2005	DBLP DOI BibTeX RDF
28	Abhijit S. Pandya, Ankur Agarwal, Gyoo-Yong Chae	Low Power Design of the Neuroprocessor.	Int. J. Fuzzy Log. Intell. Syst.	2004	DBLP DOI BibTeX RDF
28	Jean-Luc Beuchat, Eduardo Sanchez	Using On-Line Arithmetic and Reconfiguration for Neuroprocessor Implementations.	IWANN (2)	1999	DBLP DOI BibTeX RDF
28	Jean-Luc Beuchat, Eduardo Sanchez	An On-Line Arithmetic-Based Reconfigurable Neuroprocessor.	IPPS/SPDP Workshops	1999	DBLP DOI BibTeX RDF
28	Bonifacio Martín-del-Brío, Nicolás J. Medrano-Marqués, Sergio Hernández-Sánchez	A low-cost neuroprocessor board for emulating the SOFM neural model.	ICECS	1998	DBLP DOI BibTeX RDF
28	Fadi N. Sibai, Sunil D. Kulkarni	A time-multiplexed reconfigurable neuroprocessor.	IEEE Micro	1997	DBLP DOI BibTeX RDF
28	Tuan A. Duong, Sabrina Kemeny, Taher Daud, Anil Thakoor, Chris Saunders, John Carson	Analog 3-D Neuroprocessor for Fast Frame Focal Plane Image Processing.	Simul.	1995	DBLP DOI BibTeX RDF
28	Yoshihide Inoue, Hideo Taguchi, Eizo Kuroda	Performance characteristics of analog metal-oxide semiconductor type neuroprocessor.	Syst. Comput. Jpn.	1995	DBLP DOI BibTeX RDF
28	Susumu Maruno, Toshiyuki Kohda, Hiroyuki Nakahira, Shiro Sakiyama, Masakatsu Maruyama	Quantizer neuron model and neuroprocessor-named quantizer neuron chip.	IEEE J. Sel. Areas Commun.	1994	DBLP DOI BibTeX RDF
28	Ji-Chien Lee, Bing J. Sheu, Rama Chellappa	A VLSI neuroprocessor for image restoration using analog computing-based systolic architecture.	J. VLSI Signal Process.	1993	DBLP DOI BibTeX RDF
28	Ji-Chien Lee, Bing J. Sheu, Rama Chellappa	A mixed-signal VLSI competitive neuroprocessor for video motion detection.	J. VLSI Signal Process.	1993	DBLP DOI BibTeX RDF
28	Ji-Chien Lee, Bing J. Sheu, Joongho Choi, Ramalingam Chellappa	A mixed-signal VLSI neuroprocessor for image restoration.	IEEE Trans. Circuits Syst. Video Technol.	1992	DBLP DOI BibTeX RDF
28	Wai-Chi Fang, Bing J. Sheu, Ji-Chien Lee	A VLSI neuroprocessor for real-time image flow computing.	ICASSP	1991	DBLP DOI BibTeX RDF
23	Marta Ruiz-Llata, Horacio Lamela	Fast Optoelectronic Neural Network for Vision Applications.	IWANN	2005	DBLP DOI BibTeX RDF
23	Victor M. Preciado, Miguel A. Preciado, Miguel A. Jaramillo Morán	Genetic Programming for Automatic Generation of Image Processing Algorithms on the CNN Neuroprocessing Architecture.	CAEPIA	2003	DBLP DOI BibTeX RDF
23	Victor M. Preciado	Real-Time Wavelet Transform for Image Processing on the Cellular Neural Network Universal Machine.	IWANN (2)	2001	DBLP DOI BibTeX RDF
23	Bernard Girau	Digital Hardware Implementation of 2D Compatible Neural Networks.	IJCNN (3)	2000	DBLP DOI BibTeX RDF
23	Bernard Girau	Building a 2D-Compatible Multilayer Neural Network.	IJCNN (2)	2000	DBLP DOI BibTeX RDF