Search results for "over-testing"

Found 18 publication records. Showing 18 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
18	Carina Andersson, Thomas Thelin, Per Runeson, Nina Dzamashvili	An Experimental Evaluation of Inspection and Testing for Detection of Design Faults.	ISESE	2003	DBLP DOI BibTeX RDF
18	Paul A. Cairns	HCI... not as it should be: inferential statistics in HCI research.	BCS HCI (1)	2007	DBLP DOI BibTeX RDF	inferential statistics, over-testing, reporting statistics, HCI, research methods, assumptions
15	Yung-Chieh Lin, Feng Lu 0002, Kai Yang, Kwang-Ting Cheng	Constraint extraction for pseudo-functional scan-based delay testing.	ASP-DAC	2005	DBLP DOI BibTeX RDF
14	Seiji Kajihara, Satoshi Ohtake, Tomokazu Yoneda	Delay Testing: Improving Test Quality and Avoiding Over-testing.	IPSJ Trans. Syst. LSI Des. Methodol.	2011	DBLP DOI BibTeX RDF
13	Li Chen, Xiaoliang Bai, Sujit Dey	Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	interconnect, crosstalk, processor, self-test
10	Yung-Chieh Lin, Feng Lu 0002, Kwang-Ting Cheng	Pseudo-Functional Scan-based BIST for Delay Fault.	VTS	2005	DBLP DOI BibTeX RDF
9	Kazuteru Namba, Hideo Ito	Path Delay Fault Test Set for Two-Rail Logic Circuits.	PRDC	2008	DBLP DOI BibTeX RDF
9	Yang Yang 0041, Hongxing Huo, Jingchi Jiang, Xuemei Sun, Yi Guan, Xitong Guo, Xiang Wan, Shengping Liu	Clinical decision-making framework against over-testing based on modeling implicit evaluation criteria.	J. Biomed. Informatics	2021	DBLP DOI BibTeX RDF
9	Tove Faber Frandsen, Jeppe Nicolaisen	Praise the bridge that carries you over: Testing the flattery citation hypothesis.	J. Assoc. Inf. Sci. Technol.	2011	DBLP DOI BibTeX RDF
9	Yuki Yoshikawa, Satoshi Ohtake, Tomoo Inoue, Hideo Fujiwara	A Synthesis Method to Alleviate Over-Testing of Delay Faults Based on RTL Don't Care Path Identification.	VTS	2009	DBLP DOI BibTeX RDF
9	Yuki Yoshikawa, Satoshi Ohtake, Hideo Fujiwara	False Path Identification using RTL Information and Its Application to Over-testing Reduction for Delay Faults.	ATS	2007	DBLP DOI BibTeX RDF
4	Jos J. M. Trienekens, Rob J. Kusters	Workshop: Defect Detection in Distributed Software Development.	STEP	2003	DBLP DOI BibTeX RDF
3	Yuki Yoshikawa, Satoshi Ohtake, Tomoo Inoue, Hideo Fujiwara	Fast false path identification based on functional unsensitizability using RTL information.	ASP-DAC	2009	DBLP DOI BibTeX RDF
3	Eric D. Ragan, Curtis Wilkes, Doug A. Bowman, Tobias Höllerer	Simulation of AugmentedReality Systems in Purely Virtual Environments.	VR	2009	DBLP DOI BibTeX RDF
3	Zhuo Zhang 0008, Sudhakar M. Reddy, Irith Pomeranz	Warning: Launch off Shift Tests for Delay Faults May Contribute to Test Escapes.	ASP-DAC	2007	DBLP DOI BibTeX RDF
3	Tsuyoshi Iwagaki, Satoshi Ohtake, Mineo Kaneko, Hideo Fujiwara	Efficient path delay test generation based on stuck-at test generation using checker circuitry.	ICCAD	2007	DBLP DOI BibTeX RDF
3	Tayfun Elmas, Serdar Tasiran, Shaz Qadeer	VYRD: verifYing concurrent programs by runtime refinement-violation detection.	PLDI	2005	DBLP DOI BibTeX RDF	refinement, runtime verification, concurrent data structures
3	Arun Krishnamachary, Jacob A. Abraham	Effects of Multi-cycle Sensitization on Delay Tests.	VLSI Design	2003	DBLP DOI BibTeX RDF