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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 383 occurrences of 273 keywords
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Results
Found 489 publication records. Showing 489 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
171 | John L. Gustafson |
Reevaluating Amdahl's Law. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Commun. ACM ![In: Commun. ACM 31(5), pp. 532-533, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
54 | Len Dekker, Edward E. E. Frietman |
Optical link and processor clustering in the Delft parallel processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 2nd international conference on Supercomputing, ICS 1988, Saint Malo, France, July 4-8, 1988, pp. 25-38, 1988, ACM, 0-89791-272-1. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
36 | Andreas Svolos, Charalampos Konstantopoulos, Christos Kaklamanis |
A Parallel Solution in Texture Analysis Employing a Massively Parallel Processor (Research Note). ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2002, Parallel Processing, 8th International Euro-Par Conference Paderborn, Germany, August 27-30, 2002, Proceedings, pp. 431-435, 2002, Springer, 3-540-44049-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
hypercube, texture analysis, co-occurrence matrix, massively parallel processor |
31 | Alexey Kupriyanov, Dmitrij Kissler, Frank Hannig, Jürgen Teich |
Efficient event-driven simulation of parallel processor architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, Nice, France, April 20, 2007, pp. 71-80, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded tools, simulation, modeling, processor arrays |
31 | Jack L. Rosenfeld |
A case study in programming for parallel-processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Commun. ACM ![In: Commun. ACM 12(12), pp. 645-655, 1969. The full citation details ...](Pics/full.jpeg) |
1969 |
DBLP DOI BibTeX RDF |
Gauss-Seidel, Jacobi, storage interference, simulation, parallel programming, parallelism, multiprocessor, convergence, tasking, multiprogramming, relaxation, parallel-processor, electrical network |
30 | Dirk Fimmel, Renate Merker |
Propagation of I/O-Variables in Massively Parallel Processor Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), January 24-26, 1996, Portugal, pp. 501-509, 1996, IEEE Computer Society, 0-8186-7376-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
parallel processor arrays, systems of recurrence equations, automatic design methods, massive parallelism |
29 | Lorenz A. Schmitt, Stephen S. Wilson |
The AIS-5000 Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Pattern Anal. Mach. Intell. ![In: IEEE Trans. Pattern Anal. Mach. Intell. 10(3), pp. 320-330, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
AIS-5000, parallel memory organization, image-based algorithms, computer vision, computer vision, parallel architecture, parallel architectures, computerised picture processing, computerised picture processing, microprocessor chips, parallel processor, SIMD architecture |
28 | Xingzhi Wen, Uzi Vishkin |
Fpga-based prototype of a pram-on-chip processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia, Italy, May 5-7, 2008, pp. 55-66, 2008, ACM, 978-1-60558-077-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
ease-of-programming, explicit multi-threading, on-chip parallel processor, pram, parallel algorithms, xmt |
27 | Shorin Kyo, Takuya Koga, Hanno Lieske, Shouhei Nomoto, Shin'ichiro Okazaki |
A low-cost mixed-mode parallel processor architecture for embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 21th Annual International Conference on Supercomputing, ICS 2007, Seattle, Washington, USA, June 17-21, 2007, pp. 253-262, 2007, ACM, 978-1-59593-768-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded systems, parallel architectures, SIMD, MIMD, multimedia processing, tile architectures, mixed-mode |
26 | Ahmed Louri |
An Optical Content-Adressable Parallel Processor for Fast Searching and Retrieving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE (1) ![In: PARLE '91: Parallel Architectures and Languages Europe, Volume I: Parallel Architectures and Algorithms, Eindhoven, The Netherlands, June 10-13, 1991, Proceedings, pp. 338-354, 1991, Springer, 3-540-54151-9. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
25 | Falk D. Kübler, Friedrich Lücking |
Cluster oriented architecture for the mapping of parallel processor networks to high performance applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 2nd international conference on Supercomputing, ICS 1988, Saint Malo, France, July 4-8, 1988, pp. 179-189, 1988, ACM, 0-89791-272-1. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
24 | M. R. Brown, S. DasGupta |
Design of a general purpose meta-assembler for parallel processor environment in ISPS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 22nd Annual Simulation Symposium (ANSS-22 1989), Tampa, Florida, USA, 1989, pp. 105-117, 1989, IEEE Computer Society, 0-8186-1946-5. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
ISPS |
24 | Ken'ichirou Kimura, Hirofumi Amano, Akifumi Makinouchi |
Dynamic Performance Optimization Mechanism for Parallel Object-Oriented Database Programming Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IDEAS ![In: 2000 International Database Engineering and Applications Symposium, IDEAS 2000, September 18-20, 2000, Yokohoma, Japan, Proccedings, pp. 405-409, 2000, IEEE Computer Society, 0-7695-0789-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
dynamic performance optimization, parallel object-oriented database programming languages, distributed-memory parallel processor, remote object referencing, biased distribution, object relocation, simulation tests, topology, parallel languages, performance degradation, inter-processor communication, load imbalance, object allocation |
23 | Andreas Svolos, Charalampos Konstantopoulos, Christos Kaklamanis |
fficient Binary Morphological Algorithms on a Massively Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 281-286, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
hypercube, mathematical morphology, dilation, massively parallel processor, erosion, associative processor |
23 | Rainer Hauser, Reinhard Männer, Mikhail Makhaniok |
NERV: a parallel processor for standard genetic algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 782-789, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
standard genetic algorithms, MIMD multiprocessor system, NERV hardware, NERV multiprocessor, genetic algorithms, parallel algorithms, parallel architectures, parallel machines, GA, parallel processor, parallel genetic algorithms |
23 | Giuseppe Ascia, Vincenzo Catania |
Design of a VLSI parallel processor for fuzzy computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 315-320, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
VLSI parallel processor, fuzzy computing, /spl alpha/-level sets theory, memory resources, processing units, 50 MHz, scalability, VLSI, parallelism, fuzzy logic, parallel architectures, inference mechanisms, fuzzy set theory, integrated circuit design, microprocessor chips, membership functions, fuzzy inferences, clock frequency, 8 bit |
23 | Albert Y. Zomaya, Matthew Clements, Stephan Olariu |
A Framework for Reinforcement-Based Scheduling in Parallel Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 9(3), pp. 249-260, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
scheduling, Neural networks, parallel processing, reinforcement learning, randomization, task allocation |
22 | Alexey Kupriyanov, Frank Hannig, Dmitrij Kissler, Jürgen Teich, Julien Lallet, Olivier Sentieys, Sébastien Pillement |
Modeling of Interconnection Networks in Massively Parallel Processor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2007, 20th International Conference, Zurich, Switzerland, March 12-15, 2007, Proceedings, pp. 268-282, 2007, Springer, 978-3-540-71267-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Krishna Kumar Rangan, Philip A. Wilsey, Nilesh Pisolkar, Nael B. Abu-Ghazaleh |
PPIM-SIM: An Efficient Simulator for a Parallel Processor in Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 34th Annual Simulation Symposium (SS 2001), Seattle, WA, USA, 22-26 April 2001, pp. 117-124, 2001, IEEE Computer Society, 0-7695-1092-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | James A. Lupo |
Benchmarking UHGROMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (5) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 132-141, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
GROMOS, parallel Fortran preprocessor, Pfortran, Intel Corporation, IBM Corporation, massively parallel processor machines, Intel iPSC/860, Caltech Intel DELTA, IBM SP1, UHGROMOS molecular dynamics program, test application, parallel performance analysis, parallel programming, benchmarking, FORTRAN, parallel machines, parallel machines, software performance evaluation, physics, parallel languages, software portability, physics computing, porting, Intel Paragon, program processors, molecular dynamics method |
21 | Andrea Di Blas, David M. Dahle, Mark Diekhans, Leslie Grate, Jeffrey D. Hirschberg, Kevin Karplus, Hansjörg Keller, Mark Kendrick, Francisco J. Mesa-Martinez, David Pease, Eric Rice, Angela Schultz, Don Speck, Richard Hughey |
The UCSC Kestrel Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 16(1), pp. 80-92, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
VLSI system design, image processing, Parallel processing, high performance computing, computer architecture, systolic array, SIMD, DNA, computational chemistry, biological sequence analysis |
21 | Thomas Schmitt 0002, Dirk Fimmel, Mathias Kortke, Renate Merker |
Parallel Processor Array for Tomographic Reconstruction Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST'99, Vienna, Austria, September 29 - October 2, 1999, Proceedings, pp. 127-141, 1999, Springer, 3-540-67822-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Tomoo Fukazawa, Takashi Kimura, Masaaki Tomizawa, Kazumitsu Takeda, Yoshitaka Itoh |
R256: A Research Parallel Processor for Scientific Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, Israel, June 1989, pp. 344-351, 1989, ACM, 0-89791-319-1. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
21 | James D. Feldman, Louis C. Fulmer |
RADCAP: an operational parallel processing facility. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1974 National Computer Conference, 6-10 May 1974, Chicago, Illinois, USA, pp. 7-15, 1974, AFIPS Press, 978-1-4503-7920-5. The full citation details ...](Pics/full.jpeg) |
1974 |
DBLP DOI BibTeX RDF |
|
21 | Dimitris Syrivelis, Spyros Lalis |
Extracting Coarse-Grained Pipelined Parallelism Out of Sequential Applications for Parallel Processor Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2009, 22nd International Conference, Delft, The Netherlands, March 10-13, 2009. Proceedings, pp. 4-15, 2009, Springer, 978-3-642-00453-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
21 | Edward W. Davis |
Application of the massively parallel processor to database management systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1983 National Computer Conference, 16-19 May 1983, Anaheim, California, USA, pp. 299-307, 1983, AFIPS Press, 0-88283-039-2. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
|
20 | Richard Hughey, Andrea Di Blas |
Finding the Next Computational Model: Experience with the UCSC Kestrel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 53(1-2), pp. 171-186, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
biological sequence comparison, VLSI system design, application-specific array processor, parallel processing, parallel programming, computer architecture, systolic array, SIMD, sequence analysis, shared registers |
20 | Ian Buck |
GPU Computing: Programming a Massively Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Fifth International Symposium on Code Generation and Optimization (CGO 2007), 11-14 March 2007, San Jose, California, USA, pp. 17, 2007, IEEE Computer Society, 978-0-7695-2764-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Sonny Tham, John Morris |
Performance of the Achilles Router. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings, pp. 365-379, 2003, Springer, 3-540-20122-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Parallel processor interconnection, cross-bar switching, networks of workstations |
19 | Kazutoshi Kobayashi, Masao Aramoto, Yoichi Yuyama, Akihiko Higuchi, Hidetoshi Onodera |
A resource-shared VLIW processor architecture for area-efficient on-chip multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 619-622, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Albert Y. Zomaya, Matthew Clements, Stephan Olariu |
Randomized Reinforcement Based Scheduling In Parallel Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 30th Annual Hawaii International Conference on System Sciences (HICSS-30), 7-10 January 1997, Maui, Hawaii, USA, pp. 556-565, 1997, IEEE Computer Society, 0-8186-7734-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
19 | Arindam Saha |
A simulator for real-time parallel processing architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 28st Annual Simulation Symposium (SS '95), April 25-28, 1995, Santa Barbara, California, USA, pp. 74-83, 1995, IEEE Computer Society, 0-8186-7091-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
real-time parallel processing architectures, time-driven flit-based wormhole-routed parallel processor network simulator, user-friendly graphical user interface, prioritized queues, resource allocation policies, message priorities, average latency convergence, throughput monitoring, communication characteristics, performance, real-time systems, resource allocation, parallel architectures, graphical user interfaces, virtual machines, concurrency control, convergence, deadlocks, virtual channel, overlaps, real-time networks |
18 | Benoît Dupont de Dinechin |
Kalray MPPA®: Massively parallel processor array: Revisiting DSP acceleration with the Kalray MPPA Manycore processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Chips Symposium ![In: 2015 IEEE Hot Chips 27 Symposium (HCS), Cupertino, CA, USA, August 22-25, 2015, pp. 1-27, 2015, IEEE, 978-1-4673-8885-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
18 | Murali Krishnamurthi, Robert E. Young |
A multitasking implementation of system simulation: The emulation of an asynchronous parallel processor for system simulation using a single processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WSC ![In: Proceedings of the 16th conference on Winter simulation, WSC 1984, Dallas, TX, USA, November 28-30, 1984, pp. 652-662, 1984, ACM. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP BibTeX RDF |
|
18 | Zhe Liu 0005, JeoungChill Shim, Hiroyuki Kurino, Mitsumasa Koyanagi |
Design of A Novel Real-Shared Memory Module for High Performance Parallel Processor System with Shared Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA (2) ![In: 18th International Conference on Advanced Information Networking and Applications (AINA 2004), 29-31 March 2004, Fukuoka, Japan, pp. 241-244, 2004, IEEE Computer Society, 0-7695-2051-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | David C. Wong 0002, Edward W. Davis, Jeffrey O. Young |
A Software Approach to Avoiding Spatial Cache Collisions in Parallel Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 9(6), pp. 601-608, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Cache collision, cache offset, highly parallel systems, sequential DO-loops, direct-mapped cache |
18 | Su-Hui Chiang, Rajesh K. Mansharamani, Mary K. Vernon |
Use of Application Characteristics and Limited Preemption for Run-to-Completion Parallel Processor Scheduling Policies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems, Vanderbilt University, Nashville, Tennessee, USA, May 16-20, 1994, pp. 33-44, 1994, ACM, 0-89791-659-X. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
18 | Richard L. Shoemaker, Harrison H. Barrett, R. H. Seacat III |
TRIMM: A Parallel Processor for Image Reconstruction by Simulated Annealing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPSN ![In: Parallel Problem Solving from Nature, 1st Workshop, PPSN I, Dortmund, Germany, October 1-3, 1990, Proceedings, pp. 242-251, 1990, Springer, 3-540-54148-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Gary J. Nutt |
A parallel processor for evaluation studies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1976 National Computer Conference, 7-10 June 1976, New York, NY, USA, pp. 769-775, 1976, AFIPS Press, 978-1-4503-7917-5. The full citation details ...](Pics/full.jpeg) |
1976 |
DBLP DOI BibTeX RDF |
|
17 | Jeffrey C. Gealow, Frederick P. Herrmann, L. T. Hsu, Charles G. Sodini |
System design for pixel-parallel image processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 4(1), pp. 32-41, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Fong-Chih Shao, A. Yavuz Oruç |
Efficient Nonblocking Switching Networks for Interprocessor Communications in Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 6(2), pp. 132-141, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Taisuke Boku, Masayuki Umemura, Junichiro Makino, Toshiyuki Fukushige, Hajime Susa, Akira Ukawa |
Heterogeneous multi-computer system: a new platform for multi-paradigm scientific simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 16th international conference on Supercomputing, ICS 2002, New York City, NY, USA, June 22-26, 2002, pp. 26-34, 2002, ACM, 1-58113-483-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
CP-PACS, GRAPE, heterogeneous computing |
17 | David B. Thomas, Lee W. Howes, Wayne Luk |
A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 63-72, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
mppa, fpga, monte-carlo, random numbers, gpu |
17 | Albert Y. Zomaya, Chris Ward, Benjamin S. Macey |
Genetic Scheduling for Parallel Processor Systems: Comparative Studies and Performance Issues. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 10(8), pp. 795-812, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Genetic algorithms, scheduling, parallel processing, heuristics, randomization |
17 | Albert Y. Zomaya, Chris Ward, Benjamin S. Macey |
An Evolutionary Approach for Scheduling in Parallel Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1997 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '97), 18-20 December 1997, Taipei, Taiwan, pp. 369-375, 1997, IEEE Computer Society, 0-8186-8259-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Genetic algorithms, scheduling, load balancing, parallel processing |
17 | Hercule Kwan, Edward J. Powers, Earl E. Swartzlander Jr. |
Realization of a nonlinear digital filter on a DSP array processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 1997 International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '97), 14-16 July 1997, Zurich, Switzerland, pp. 24-33, 1997, IEEE Computer Society, 0-8186-7958-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
nonlinear digital filter, third-order Volterra digital filtering algorithm, AT&T DSP-3 parallel processor, nonlinear communication channel equalization, 64-QAM signal constellation, performance evaluation, digital signal processing chips, time-skewing |
17 | Eric A. Brewer, Paul Gauthier, Armando Fox, Angela Schuett |
Software Techniques for Improving MPP Bulk-Transfer Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '96, The 10th International Parallel Processing Symposium, April 15-19, 1996, Honolulu, Hawaii, USA, pp. 406-412, 1996, IEEE Computer Society, 0-8186-7255-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
software techniques, bulk-transfer performance, traffic interleaving, Thinking Machines CM-5, one-on-one communication, MIT Alewife machine, token-passing scheme, distributed dynamic scheduling, irregular traffic patterns, traffic massaging, near-permutations, performance evaluation, parallel machines, processor scheduling, software performance evaluation, telecommunication traffic, preprocessing, barriers, network congestion, algorithm performance, Intel Paragon, static scheduling, massively parallel processor, global state |
17 | Mun Choon Chan, Giovanni Pacifici, Rolf Stadler |
Prototyping Network Architectures on a Supercomputer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the 5th International Symposium on High Performance Distributed Computing (HPDC '96), Syracuse, NY, USA, August 6-9, 1996., pp. 374-382, 1996, IEEE Computer Society, 0-8186-7582-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
network architecture prototyping, dynamic behavior evaluation, overall performance evaluation, functional properties, interactive emulation platform, multimedia network services, load patterns, network management operations, KSR-1, SP2 parallel processor, graphics workstation, ATM links, performance evaluation, real-time systems, parallel programming, interactive systems, multimedia communication, data visualisation, supercomputer, software prototyping, software prototype, network operating systems, telecommunication computing, network control systems, engineering graphics, telecommunication network management, telecommunication control, real-time visualization, network sizes, dynamic properties, control system CAD |
17 | Dejan S. Milojicic, David L. Black 0001, Steven J. Sears |
Operating system support for concurrent remote task creation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 486-492, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
concurrent remote task creation, application startup, multiple nodes, remote task creation, multiple remote tasks, distributed virtual memory, paging path, operating systems, distributed memory systems, operating system kernels, virtual storage, massively parallel processor, Mach |
17 | Ranga S. Ramanujan, Jordan Bonney, Kenneth J. Thurber |
Network Shared Memory: A New Approach for Clustering Workstations for Parallel Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the 4th International Symposium on High Performance Distributed Computing (HPDC '95), Washington, DC, USA, August 2-4, 1995., pp. 48-56, 1995, IEEE Computer Society, 0-8186-7088-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
network shared memory, clustering workstations, shared memory parallel processor, performance evaluation, performance evaluation, parallel processing, parallel processing, shared memory systems, implementation model |
17 | Minsu Choi, Nohpill Park, Fabrizio Lombardi |
Hardware-Software Co-Reliability in Field Reconfigurable Multi-Processor-Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Multi-Processor-Memory System, Field Reconfiguration, HW/SW Co-reliability, Modular Redundancy |
17 | Konstantina Karagianni, Vassilis Paliouras, George Diamantakos, Thanos Stouraitis |
Operation-Saving VLSI Architectures for 3D Geometrical Transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(6), pp. 609-622, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Elementary geometrical transformations, vector unit, VLSI architecture, graphics processor |
17 | Henk Corporaal, J. G. E. Olk |
A Scalable Communication Processor Design supporting Systolic Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDMCC ![In: Distributed Memory Computing, 2nd European Conference, EDMCC2, Munich, FRG, April 22-24, 1991, Proceedings, pp. 213-223, 1991, Springer, 3-540-53951-4. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
high performance communication processor, fine-grain communication, scalability of design, message compression, routing, virtual connections |
17 | Arun Kejariwal, Alexandru Nicolau |
An Efficient Load Balancing Scheme for Grid-based High Performance Scientific Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPDC ![In: 4th International Symposium on Parallel and Distributed Computing (ISPDC 2005), 4-6 July 2005, Lille, France, pp. 217-225, 2005, IEEE Computer Society, 0-7695-2434-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Sumit Ghosh, Meng-Lin Yu |
An Asynchronous Distributed Approach for the Simulation of Behavior-Level Models on Parallel Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 6(6), pp. 639-652, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
15 | Arjuna Madanayake, Leonard T. Bruton |
A high performance distributed-parallel-processor architecture for 3D IIR digital filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1457-1460, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Stephanie McBader, Luca Clementel, Alvise Sartori, Andrea Boni, Peter Lee 0002 |
SoftTOTEM: An FPGA Implementation of the TOTEM Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 1084-1087, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Saravut Charcranoon, Thomas G. Robertazzi, Serge Luryi |
Parallel Processor Configuration Design with Processing/Transmission Costs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(9), pp. 987-991, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
single-level tree network, local search, economics, Cost, heuristic algorithm, divisible load, star network |
15 | Renate Merker, Ulrich Eckhardt, Dirk Fimmel, H. Schreiber |
A System for Designing Parallel Processor Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST'97, A Selection of Papers from the 6th International Workshop on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 24-28, 1997, Proceedings, pp. 3-12, 1997, Springer, 3-540-63811-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
15 | A. L. Kimball, Raimond L. Winslow |
Modeling the retinal horizontal cell layer on a massively parallel processor: a detailed neural network model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPDP ![In: Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, SPDP 1990, Dallas, Texas, USA, December 9-13, 1990., pp. 792-798, 1990, IEEE Computer Society, 0-8186-2087-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
15 | Kazuaki J. Murakami, Shin-ichiro Mori, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita |
The Kyushu University reconfigurable parallel processor: design of memory and intercommunicaiton architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 3rd international conference on Supercomputing, ICS 1989, Heraklion, Crete, Greece, June 5-9, 1989, pp. 351-360, 1989, ACM, 0-89791-309-4. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
15 | Claus Traulsen, Reinhard von Hanxleden |
Reactive parallel processing for synchronous dataflow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2010 ACM Symposium on Applied Computing (SAC), Sierre, Switzerland, March 22-26, 2010, pp. 483-490, 2010, ACM, 978-1-60558-639-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Scade, reactive processors, synchronous languages, parallel execution, synchronous dataflow, Lustre |
15 | Xiaoyong Wen, Faycal Bensaali, Reza Sotudeh |
Dynamic Co-operative Intelligent Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 184-189, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Masaitsu Nakajima, Takao Yamamoto, Masayuki Yamasaki, Tetsu Hosoki, Masaya Sumita |
Low Power Techniques for Mobile Application SoCs Based on Integrated Platform "UniPhier". ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 649-653, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Sam Sander, Linda M. Wills |
Retargeting Image-Processing Algorithms to Varying Processor Grain Sizes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 2006 International Conference on Parallel Processing Workshops (ICPP Workshops 2006), 14-18 August 2006, Columbus, Ohio, USA, pp. 376-383, 2006, IEEE Computer Society, 0-7695-2637-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Lewis Benton Baumstark Jr., Linda M. Wills |
Retargeting Sequential Image-Processing Programs for Data Parallel Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 31(2), pp. 116-136, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
explicitly parallel program representation, program recognition, Reengineering, SIMD processors, data-level parallelization |
15 | Marshall C. Pease |
Matrix Inversion Using Parallel Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 14(4), pp. 757-764, 1967. The full citation details ...](Pics/full.jpeg) |
1967 |
DBLP DOI BibTeX RDF |
|
15 | Daniel Madroñal, Raquel Lazcano, Himar Fabelo, Samuel Ortega, Gustavo Marrero Callicó, Eduardo Juárez 0001, César Sanz |
Hyperspectral image classification using a parallel implementation of the linear SVM on a Massively Parallel Processor Array (MPPA) platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DASIP ![In: 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), Rennes, France, October 12-14, 2016, pp. 154-160, 2016, IEEE, 979-1-0922-7915-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
15 | Hideaki Ito, Masaru Shimizu, Saburou Iida |
Parallel Algorithms of Basic Image Processing Implemented on a Linearly Connected Parallel Processor - Gray-scale and Binary Images -. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Next Gener. Inf. Technol. ![In: J. Next Gener. Inf. Technol. 2(2), pp. 45-55, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
15 | Peng Yin Choo, Abram Detofsky, Ahmed Louri |
A Multi-Wavelength Optical Content-Addressable Parallel Processor (MW-OCAPP) for High-Speed Parallel Relational Database Processing: Architectural Concepts and Preliminary Experimental System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS/SPDP Workshops ![In: Parallel and Distributed Processing, 11 IPPS/SPDP'99 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, San Juan, Puerto Rico, USA, April 12-16, 1999, Proceedings, pp. 873-886, 1999, Springer, 3-540-65831-9. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Jim Weston, Marek Szularz, Maurice Clint, Kieran Murphy |
The Parallel Computation of Partial Eigensolutions of Large Matrices on a Massively Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par, Vol. II ![In: Euro-Par '96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume II, pp. 26-33, 1996, Springer, 3-540-61627-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
15 | Anthonie B. Ruighaver, R. F. Holt, J. Semkiw |
Pandora Networks for a Massively Parallel Decoupled Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROSIM ![In: Massively Parallel Processing Applications and Develompent, Proceedings of the 1994 EUROSIM Conference on Massively Parallel Processing Applications and Develompent, 21-23 June 1994, Delft, The Netherlands, pp. 195-202, 1994, Elsevier, 0-444-81784-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
15 | C. S. Lin, A. L. Thring, J. Koga, E. J. Seiler |
A Parallel Particle-in-Cell Model for the Massively Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Parallel Distributed Comput. ![In: J. Parallel Distributed Comput. 8(2), pp. 196-199, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
15 | Thomas J. LeBlanc, Michael L. Scott, Christopher M. Brown |
Large-Scale Parallel Programming: Experience with the BBN Butterfly Parallel Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPOPP/PPEALS ![In: Proceedings of the ACM/SIGPLAN PPEALS 1988, Parallel Programming: Experience with Applications, Languages and Systems, New Haven, Connecticut, USA, July 19-21, 1988, pp. 161-172, 1988, ACM, 0-89791-276-4. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
15 | Constantine D. Polychronopoulos, David J. Kuck, David A. Padua |
Execution of Parallel Loops on Parallel Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: International Conference on Parallel Processing, ICPP'86, University Park, PA, USA, August 1986., pp. 519-527, 1986, IEEE Computer Society Press. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP BibTeX RDF |
|
14 | Manoel T. F. Cunha, Jose C. F. Telles, Alvaro L. G. A. Coutinho |
On the Implementation of Boundary Element Engineering Codes on the Cell Broadband Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VECPAR ![In: High Performance Computing for Computational Science - VECPAR 2008, 8th International Conference, Toulouse, France, June 24-27, 2008. Revised Selected Papers, pp. 490-504, 2008, Springer, 978-3-540-92858-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Parallel Programming, SIMD, Vectorization, Cell Broadband Engine, Boundary Element Method, Boundary Elements |
14 | Rainer Schaffer, Renate Merker |
Parameterized Mapping of Algorithms onto Processor Arrays with Sub-Word Parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), Samos, Greece, July 17-20, 2006, pp. 99-106, 2006, IEEE, 1-4244-0155-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | O. Volberg, Jay Walter Larson, Robert L. Jacob, John Michalakes |
Registration and Resource Allocation Mechanisms in High-Performance Application Frameworks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: 2005 IEEE International Conference on Cluster Computing (CLUSTER 2005), September 26 - 30, 2005, Boston, Massachusetts, USA, pp. 1, 2005, IEEE Computer Society, 0-7803-9485-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Taisuke Boku, Junichiro Makino, Hajime Susa, Masayuki Umemura, Toshiyuki Fukushige, Akira Ukawa |
Heterogeneous Multi-Computer System: A New Paradigm of Parallel Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 3-8, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Teruo Utsumi, Masayuki Ikeda, Moriyuki Takamura |
Architecture of the VPP500 parallel supercomputer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '94, Washington, DC, USA, November 14-18, 1994, pp. 478-487, 1994, IEEE Computer Society, 0-8186-6605-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
13 | Stefan Janson, Martin Middendorf |
Flexible Particle Swarm Optimization Tasks for Reconfigurable Processor Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Richard P. Kleihorst, Mi-Suen Lee, Anteneh A. Abbo, Eric Cohen-Solal |
Real time skin-region detection with a single-chip digital camera. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (3) ![In: Proceedings of the 2001 International Conference on Image Processing, ICIP 2001, Thessaloniki, Greece, October 7-10, 2001, pp. 306-309, 2001, IEEE, 0-7803-6725-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Seon Wook Kim, Rudolf Eigenmann |
Compiling for Speculative Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 12th International Workshop, LCPC'99, La Jolla/San Diego, CA, USA, August 4-6, 1999, Proceedings, pp. 464-467, 1999, Springer, 3-540-67858-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
13 | Kenneth E. Batcher |
MPP: a supersystem for satellite image processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1982 National Computer Conference, 7-10 June, 1982, Houston, Texas, USA, pp. 185-191, 1982, AFIPS Press, 0-88283-035-X. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
|
13 | Stanley Tzeng, Li-Yi Wei |
Parallel white noise generation on a GPU via cryptographic hash. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SI3D ![In: Proceedings of the 2008 Symposium on Interactive 3D Graphics, SI3D 2008, February 15-17, 2008, Redwood City, CA, USA, pp. 79-87, 2008, ACM, 978-1-59593-983-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
GPU techniques, parallel computation, texturing, noise, random number generation |
13 | Chih Jeng Kenneth Tan, J. A. Rod Blais |
PLFG: A Highly Scalable Parallel Pseudo-random Number Generator for Monte Carlo Simulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCN ![In: High-Performance Computing and Networking, 8th International Conference, HPCN Europe 2000, Amsterdam, The Netherlands, May 8-10, 2000, Proceedings, pp. 127-135, 2000, Springer, 3-540-67553-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Lagged Fibonnaci Generator, Parallel computation, Monte Carlo method, Pseudo-random number generator, Randomized computation |
12 | Anna Nepomniaschaya |
Associative Version of the Ramalingam Decremental Algorithm for Dynamic Updating the Single-Sink Shortest-Paths Subgraph. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PaCT ![In: Parallel Computing Technologies, 10th International Conference, PaCT 2009, Novosibirsk, Russia, August 31-September 4, 2009. Proceedings, pp. 257-268, 2009, Springer, 978-3-642-03274-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Directed weighted graph, subgraph of the shortest paths, decremental algorithm, associative parallel processor, access data by contents, adjacency matrix |
12 | George C. Caragea, A. Beliz Saybasili, Xingzhi Wen, Uzi Vishkin |
Brief announcement: performance potential of an easy-to-program PRAM-on-chip prototype versus state-of-the-art processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2009: Proceedings of the 21st Annual ACM Symposium on Parallelism in Algorithms and Architectures, Calgary, Alberta, Canada, August 11-13, 2009, pp. 163-165, 2009, ACM, 978-1-60558-606-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
ease of programming, explicit multi-treading, on-chip parallel processor, paraleap, parallel algorithms, PRAM, xmt |
12 | Erik Lindholm, John Nickolls, Stuart F. Oberman, John Montrym |
NVIDIA Tesla: A Unified Graphics and Computing Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 28(2), pp. 39-55, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
SIMT, unified graphics and parallel computing architecture, cooperative thread array, GPU, graphics processing unit, SIMD, parallel processor, Tesla, Hot Chips 19 |
12 | Wenjun Xiao, Behrooz Parhami |
A Group Construction Method with Applications to Deriving Pruned Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(5), pp. 637-643, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
geometric group theory, parallel processor architecture, pruning scheme, VLSI realization, distributed system, interconnection network, Cayley graph, network diameter, Algebraic structure |
12 | Xingzhi Wen, Uzi Vishkin |
PRAM-on-chip: first commitment to silicon. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2007: Proceedings of the 19th Annual ACM Symposium on Parallelism in Algorithms and Architectures, San Diego, California, USA, June 9-11, 2007, pp. 301-302, 2007, ACM, 978-1-59593-667-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
ease-of-programming, explicit multi-threading, on-chip parallel processor, parallel algorithms, PRAM, XMT |
12 | A. S. Nepomniaschaya, Zbigniew Kokosinski |
Associative Graph Processor and Its Properties. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 297-302, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
associative parallel processor, bit-parallel processing, associative graph processing, multiple-search |
12 | Hyesook Lim, Vincenzo Piuri, Earl E. Swartzlander Jr. |
A Serial-Parallel Architecture for Two-Dimensional Discrete Cosine and Inverse Discrete Cosine Transforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(12), pp. 1297-1309, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Application specific processor architecture, Inverse Discrete Cosine Transform, serial-parallel processor, image compression, Discrete Cosine Transform, systolic array |
12 | A. S. Nepomniaschaya |
An Associative Parallel Algorithm for Finding a Critical Cycle in Directed Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: Seventh International Conference on Parallel and Distributed Systems, ICPADS 2000, Iwate, Japan, July 4-7, 2000, pp. 455-462, 2000, IEEE Computer Society, 0-7695-0568-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Directed weighted graph, critical cycle, optimum branching, bit-serial processing, associative parallel processor, time complexity |
12 | Craig S. Freedman, Josef Burger, David J. DeWitt |
SPIFFI-A Scalable Parallel File System for the Intel Paragon. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(11), pp. 1185-1200, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
scalability, file system, high performance, Parallel I/O, massively parallel processor |
12 | Peggy Li, William H. Duquette, David W. Curkendall |
RIVA: A Versatile Parallel Rendering System for Interactive Scientific Visualization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 2(3), pp. 186-201, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Parallel terrain rendering, feed forward rendering, massively parallel processor (MPP), scientific visualization |
12 | Barry S. Fagin |
Fast Addition of Large Integers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(9), pp. 1069-1077, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
computation time asymmetry, large integers, massively parallel algorithms, average case behavior, large n-bit additions, multiple bits, parallel algorithms, computational model, digital arithmetic, massively parallel processor, binary addition, carry-lookahead |
12 | J. M. Herron, J. Farley, Kendall Preston Jr., H. Sellner |
A General-Purpose High-Speed Logical Transform Image Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 31(8), pp. 795-800, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
peripheral processor, image processor, neighborhood transform, parallel processor, Array processing, cellular logic |
12 | David C. van Voorhis, Thomas H. Morrin |
Memory Systems for Image Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 27(2), pp. 113-125, 1978. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
array storage, image processing, memory system, Array processor, parallel processor, parallel memory |
12 | Jeffrey L. DeVeber |
Letters to the editor: correction's to Stone's compiler procedures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Commun. ACM ![In: Commun. ACM 11(8), pp. 538, 1968. The full citation details ...](Pics/full.jpeg) |
1968 |
DBLP DOI BibTeX RDF |
one-pass compilation, compilation, parallel processor |
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