Results
Found 19 publication records. Showing 19 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
23 | Rahul M. Rao, Jeffrey L. Burns, Anirudh Devgan, Richard B. Brown |
Efficient techniques for gate leakage estimation. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
pattern-dependent, pattern-independent, estimation, leakage, gate leakage |
21 | Ozgur Sinanoglu |
Scan Architecture With Align-Encode. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Wilfred W. K. Lin, Allan K. Y. Wong, Tharam S. Dillon |
A Novel Traffic Independent NNC for Dynamic Buffer Tuning to Shorten the RTT of a TCP Channel. |
ICITA (2) |
2005 |
DBLP DOI BibTeX RDF |
PIDC, dynamic buffer tuning, traffic pattern independent, buffer overflow, active queue management, Neural Network Controller |
18 | Kedarnath J. Balakrishnan, Seongmoon Wang, Srimat T. Chakradhar |
PIDISC: Pattern Independent Design Independent Seed Compression Technique. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Kota Iwamoto, Kyoji Hirata |
Detection of Wipes and Digital Video Effects Based on a Pattern-Independent Model of Image Boundary Line Characteristics. |
ICIP (6) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj |
Pattern independent maximum current estimation in power and ground buses of CMOS VLSI circuits: Algorithms, signal correlations, and their resolution. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
16 | Richard Burch, Farid N. Najm, Ping Yang 0001, Dale E. Hocevar |
Pattern-Independent Current Estimation for Reliability Analysis of CMOS Circuits. |
DAC |
1988 |
DBLP BibTeX RDF |
|
12 | Catriona Eschke, Mary Katherine Heinrich, Mostafa Wahby, Heiko Hamann |
Self-Organized Adaptive Paths in Multi-Robot Manufacturing: Reconfigurable and Pattern-Independent Fibre Deployment. |
IROS |
2019 |
DBLP DOI BibTeX RDF |
|
12 | Khaled Yakdan, Sebastian Eschweiler, Elmar Gerhards-Padilla, Matthew Smith 0001 |
No More Gotos: Decompilation Using Pattern-Independent Control-Flow Structuring and Semantic-Preserving Transformations. |
NDSS |
2015 |
DBLP BibTeX RDF |
|
12 | Alexandru Calotoiu, Christian Siebert, Felix Wolf 0001 |
Pattern-Independent Detection of Manual Collectives in MPI Programs. |
Euro-Par |
2012 |
DBLP DOI BibTeX RDF |
|
12 | Jakub Janicki, Jerzy Tyszer, Avijit Dutta, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee 0001, Janusz Rajski |
EDT channel bandwidth management in SoC designs with pattern-independent test access mechanism. |
ITC |
2011 |
DBLP DOI BibTeX RDF |
|
12 | Sina Zarrieß, Jonas Kuhn |
Exploiting Translational Correspondences for Pattern-Independent MWE Identification. |
MWE@IJCNLP |
2009 |
DBLP BibTeX RDF |
|
12 | Hideyuki Nosaka, Kiyoshi Ishii, Takatomo Enoki, Tsugumichi Shibata |
A 10-Gb/s data-pattern independent clock and data recovery circuit with a two-mode phase comparator. |
IEEE J. Solid State Circuits |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Dionysios Kouroussis, Farid N. Najm |
A static pattern-independent technique for power grid voltage integrity verification. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
stat, power grid, voltage drop |
12 | Sudhakar Bobba |
Input-Pattern-Independent Estimation of Peak Current, Peak Power Dissipation, and Maximum Voltage Variation in the Power Distribution Network of VLSI Circuits |
|
2000 |
RDF |
|
7 | Subodh M. Reddy, Rajeev Murgai |
Accurate Substrate Noise Analysis Based on Library Module Characterization. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
7 | Michinobu Nakao, Yoshikazu Kiyoshige, Kazumi Hatayama, Yasuo Sato, Takaharu Nagumo |
Test Generation for Multiple-Threshold Gate-Delay Fault Model. |
Asian Test Symposium |
2001 |
DBLP DOI BibTeX RDF |
|
4 | Sudhakar Bobba, Ibrahim N. Hajj |
Maximum Current Estimation in Programmable Logic Arrays. |
Great Lakes Symposium on VLSI |
1998 |
DBLP DOI BibTeX RDF |
maximum current, PLA |
4 | Farid N. Najm, Richard Burch, Ping Yang 0001, Ibrahim N. Hajj |
Probabilistic simulation for reliability analysis of CMOS VLSI circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1990 |
DBLP DOI BibTeX RDF |
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