Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
111 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 431-436, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
performance modeling for analog circuits, posynomial response surface modeling, geometric programming |
99 | Bing-yuan Cao 0001 |
Fuzzy Reversed Posynomial Geometric Programming and Its Dual Form. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFSA (1) ![In: Foundations of Fuzzy Logic and Soft Computing, 12th International Fuzzy Systems Association World Congress, IFSA 2007, Cancun, Mexico, June 18-21, 2007, Proceedings, pp. 553-562, 2007, Springer, 978-3-540-72917-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
93 | Ji-hui Yang, Bing-yuan Cao 0001 |
Posynomial Fuzzy Relation Geometric Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFSA (1) ![In: Foundations of Fuzzy Logic and Soft Computing, 12th International Fuzzy Systems Association World Congress, IFSA 2007, Cancun, Mexico, June 18-21, 2007, Proceedings, pp. 563-572, 2007, Springer, 978-3-540-72917-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Posynomial fuzzy relation geometric programming, Dual theory, Difficult degree, Geometric programming, Optimal solution, Fuzzy relation equations |
83 | Jason Cong, Lei He 0001 |
An efficient approach to simultaneous transistor and interconnect sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 181-186, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
CH-posynomial programs, STIS, driver/buffer, transistor and interconnect sizing, wire sizing problem, circuit CAD, transistor sizing |
81 | Varun Aggarwal, Una-May O'Reilly |
Simulation-based reusable posynomial models for MOS transistor parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 69-74, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
81 | Xin Li 0001, Padmini Gopalakrishnan, Yang Xu 0017, Lawrence T. Pileggi |
Robust analog/RF circuit design with projection-based posynomial modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 855-862, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
81 | Tom Eeckelaert, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
Generalized Posynomial Performance Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10250-10255, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
64 | Bing-yuan Cao 0001 |
Lagrange Problem in Fuzzy Reversed Posynomial Geometric Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FSKD (2) ![In: Fuzzy Systems and Knowledge Discovery, Second International Conference, FSKD 2005, Changsha, China, August 27-29, 2005, Proceedings, Part II, pp. 546-550, 2005, Springer, 3-540-28331-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
64 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(5), pp. 517-534, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
64 | Tao Lin, Lawrence T. Pileggi |
RC(L) interconnect sizing with second order considerations via posynomial programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2001 International Symposium on Physical Design, ISPD 2001, Sonoma County, CA, USA, April 1-4, 2001, pp. 16-21, 2001, ACM, 1-58113-347-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
RC trees, VLSI design automation, central moments, posynomiality, convex programming, interconnect optimization |
54 | Hiran Tennakoon, Carl Sechen |
Nonconvex Gate Delay Modeling and Delay Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(9), pp. 1583-1594, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
47 | Jaskirat Singh, Vidyasagar Nookala, Zhi-Quan Luo, Sachin S. Sapatnekar |
Robust gate sizing by geometric programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 315-320, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
posynomial, uncertainty ellipsoid, optimization, gate sizing, geometric program |
46 | Han-Lin Li, Jung-Fa Tsai, Christodoulos A. Floudas |
Convex underestimation for posynomial functions of positive variables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Optim. Lett. ![In: Optim. Lett. 2(3), pp. 333-340, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Posynomials, Convex underestimators, Convex envelopes |
36 | Sanghamitra Roy, Charlie Chung-Ping Chen |
ConvexSmooth: A simultaneous convex fitting and smoothing algorithm for convex optimization problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 665-670, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
36 | Maria del Mar Hershenson |
Design of pipeline analog-to-digital converters via geometric programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 317-324, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
36 | Jason Cong, Lei He 0001 |
An efficient technique for device and interconnect optimization in deep submicron designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 1998 International Symposium on Physical Design, ISPD 1998, Monterey, CA, USA, April 6-8, 1998, pp. 45-51, 1998, ACM, 1-58113-021-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
36 | Piyush K. Sancheti, Sachin S. Sapatnekar |
Optimal design of macrocells for low power and high speed. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(9), pp. 1160-1166, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
28 | Giuseppe Carlo Calafiore, Stephane Gaubert, Corrado Possieri |
Log-Sum-Exp Neural Networks and Posynomial Models for Convex and Log-Log-Convex Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Neural Networks Learn. Syst. ![In: IEEE Trans. Neural Networks Learn. Syst. 31(3), pp. 827-838, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
28 | Marianne Akian, Xavier Allamigeon, Marin Boyet, Stéphane Gaubert |
A Convex Programming Approach to Solve Posynomial Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMS ![In: Mathematical Software - ICMS 2020 - 7th International Conference, Braunschweig, Germany, July 13-16, 2020, Proceedings, pp. 241-250, 2020, Springer, 978-3-030-52199-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
28 | Bappa Mondal, Suvankar Biswas, Arindam Garai, Tapan Kumar Roy |
Posynomial Geometric Programming in EOQ Model with Interval Neutrosophic Number. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICITAM ![In: Recent Advances in Intelligent Information Systems and Applied Mathematics, International Conference on Information Technology and Applied Mathematics, ICITAM 2019, Haldia, India, 7-9 March 2019., pp. 434-449, 2019, Springer, 978-3-030-34151-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
28 | Giuseppe Carlo Calafiore, Stephane Gaubert, Corrado Possieri |
Log-sum-exp neural networks and posynomial models for convex and log-log-convex data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1806.07850, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
28 | Xue-Gang Zhou, Xiao-Peng Yang, Bing-Yuan Cao 0001 |
Posynomial geometric programming problem subject to max-min fuzzy relation equations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Sci. ![In: Inf. Sci. 328, pp. 15-25, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
28 | Giuseppe Carlo Calafiore, Laurent El Ghaoui, Carlo Novara |
Sparse identification of posynomial models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Autom. ![In: Autom. 59, pp. 27-34, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
28 | Giuseppe Carlo Calafiore, Laurent El Ghaoui, Carlo Novara |
Sparse Identification of Polynomial and Posynomial Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1311.4362, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
28 | Bing-yuan Cao 0001 |
The more-for-less paradox in fuzzy posynomial geometric programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Sci. ![In: Inf. Sci. 211, pp. 81-92, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
28 | G. S. Mahapatra, T. K. Mandal |
Posynomial Parametric Geometric Programming with Interval Valued Coefficient. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Optim. Theory Appl. ![In: J. Optim. Theory Appl. 154(1), pp. 120-132, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
28 | Jung-Fa Tsai, Ming-Hua Lin |
An Efficient Global Approach for Posynomial Geometric Programming Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
INFORMS J. Comput. ![In: INFORMS J. Comput. 23(3), pp. 483-492, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
28 | Hao-Chun Lu, Han-Lin Li, Chrysanthos E. Gounaris, Christodoulos A. Floudas |
Convex relaxation for solving posynomial programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Glob. Optim. ![In: J. Glob. Optim. 46(1), pp. 147-154, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
28 | Akshay K. Ojha, K. K. Biswal |
Posynomial Geometric Programming Problems with Multiple Parameters ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1001.3493, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
28 | Shiang-Tai Liu |
Posynomial geometric programming with interval exponents and coefficients. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. J. Oper. Res. ![In: Eur. J. Oper. Res. 186(1), pp. 17-27, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Shiang-Tai Liu |
Posynomial geometric programming with parametric uncertainty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. J. Oper. Res. ![In: Eur. J. Oper. Res. 168(2), pp. 345-353, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Ching-Ter Chang |
Formulating the mixed integer fractional posynomial programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. J. Oper. Res. ![In: Eur. J. Oper. Res. 173(2), pp. 370-386, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Kan-Lin Hsiung, Yang Xu 0017 |
A tractable approximation of expectation-based stochastic posynomial programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACC ![In: American Control Conference, ACC 2006, Minneapolis, MN, USA, 14-16 June, 2006, pp. 1-3, 2006, IEEE, 1-4244-0209-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Jayant Rajgopal, Dennis L. Bricker |
Solving Posynomial Geometric Programming Problems via Generalized Linear Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Optim. Appl. ![In: Comput. Optim. Appl. 21(1), pp. 95-109, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
28 | Ching-Ter Chang |
On the posynomial fractional programming problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. J. Oper. Res. ![In: Eur. J. Oper. Res. 143(1), pp. 42-52, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
28 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2001, San Jose, CA, USA, November 4-8, 2001, pp. 70-74, 2001, IEEE Computer Society, 0-7803-7249-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
28 | A. J. Federowicz, Jayant Rajgopal |
Robustness of posynomial geometric programming optima. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Math. Program. ![In: Math. Program. 85(2), pp. 423-431, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | Piyush K. Sancheti, Sachin S. Sapatnekar |
Layout Optimization Using Arbitrarily High Degree Posynomial Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30 - May 3, 1995, pp. 53-56, 1995, IEEE, 0-7803-2570-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
28 | Daniel Granot, Frieda Granot |
Minimal covers, minimal sets and canonical facets of the posynomial knapsack polytope. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Appl. Math. ![In: Discret. Appl. Math. 9(2), pp. 171-185, 1984. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
|
28 | J. E. Fattler, Gintaras V. Reklaitis, Y. T. Sin, R. R. Root, K. M. Ragsdell |
On the computational utility of posynomial geometric programming solution methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Math. Program. ![In: Math. Program. 22(1), pp. 163-201, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
|
28 | Ron S. Dembo |
Second order algorithms for the posynomial geometric programming dual, part I: Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Math. Program. ![In: Math. Program. 17(1), pp. 156-175, 1979. The full citation details ...](Pics/full.jpeg) |
1979 |
DBLP DOI BibTeX RDF |
|
28 | Robert A. Abrams |
Consistency, Superconsistency, and Dual Degeneracy in Posynomial Geometric Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Oper. Res. ![In: Oper. Res. 24(2), pp. 325-335, 1976. The full citation details ...](Pics/full.jpeg) |
1976 |
DBLP DOI BibTeX RDF |
|
18 | Samiran DasGupta, Pradip Mandal |
An automated design approach for CMOS LDO regulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 510-515, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
18 | Jaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar |
A Geometric Programming-Based Worst Case Gate Sizing Method Incorporating Spatial Correlation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2), pp. 295-308, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Victoria Wang, Kanak Agarwal, Sani R. Nassif, Kevin J. Nowka, Dejan Markovic |
A Design Model for Random Process Variability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 734-737, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
random process variability, current variation, modeling, principal component analysis |
18 | Xin Li 0001, Padmini Gopalakrishnan, Yang Xu 0017, Lawrence T. Pileggi |
Robust Analog/RF Circuit Design With Projection-Based Performance Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(1), pp. 2-15, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Sanghamitra Roy, Charlie Chung-Ping Chen |
SmartSmooth: A linear time convexity preserving smoothing algorithm for numerically convex data with application to VLSI design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 559-564, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Cheng Zhuo, Huafeng Zhang, Rupak Samanta, Jiang Hu, Kangsheng Chen |
Modeling, optimization and control of rotary traveling-wave oscillator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 476-480, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Iris Hui-Ru Jiang, Song-Ra Pan, Yao-Wen Chang, Jing-Yang Jou |
Reliable crosstalk-driven interconnect optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(1), pp. 88-103, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
post-layout optimization, VLSI, interconnect, lagrangian relaxation |
18 | Mihir R. Choudhury, Quming Zhou, Kartik Mohanram |
Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 204-209, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Kan-Lin Hsiung |
Design of High-Speed Metal-Semiconductor-Metal Photodetectors: An Optimization-Based Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2006), 17-19 January 2006, Kuala Lumpur, Malaysia, pp. 83-84, 2006, IEEE Computer Society, 0-7695-2500-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Trent McConaghy, Georges G. E. Gielen |
Analysis of simulation-driven numerical performance modeling techniques for application to analog circuit optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1298-1301, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin Cheung, Mark Horowitz, Stephen P. Boyd |
A New Method for Design of Robust Digital Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 676-681, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Tholom Kiely, Georges G. E. Gielen |
Performance Modeling of Analog Integrated Circuits Using Least-Squares Support Vector Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 448-453, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Maria del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee |
Optimal design of a CMOS op-amp via geometric programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(1), pp. 1-21, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Pradip Mandal, V. Visvanathan |
CMOS op-amp sizing using a geometric programming formulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(1), pp. 22-38, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Maria del Mar Hershenson, Ali Hajimiri, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee |
Design and optimization of LC oscillators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 65-69, 1999, IEEE Computer Society, 0-7803-5832-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
18 | Rony Kay, Lawrence T. Pileggi |
EWA: efficient wiring-sizing algorithm for signal nets and clock nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(1), pp. 40-49, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|