Search results for "posynomial"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
111	Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen	An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits.	DAC	2002	DBLP DOI BibTeX RDF	performance modeling for analog circuits, posynomial response surface modeling, geometric programming
99	Bing-yuan Cao 0001	Fuzzy Reversed Posynomial Geometric Programming and Its Dual Form.	IFSA (1)	2007	DBLP DOI BibTeX RDF
93	Ji-hui Yang, Bing-yuan Cao 0001	Posynomial Fuzzy Relation Geometric Programming.	IFSA (1)	2007	DBLP DOI BibTeX RDF	Posynomial fuzzy relation geometric programming, Dual theory, Difficult degree, Geometric programming, Optimal solution, Fuzzy relation equations
83	Jason Cong, Lei He 0001	An efficient approach to simultaneous transistor and interconnect sizing.	ICCAD	1996	DBLP DOI BibTeX RDF	CH-posynomial programs, STIS, driver/buffer, transistor and interconnect sizing, wire sizing problem, circuit CAD, transistor sizing
81	Varun Aggarwal, Una-May O'Reilly	Simulation-based reusable posynomial models for MOS transistor parameters.	DATE	2007	DBLP DOI BibTeX RDF
81	Xin Li 0001, Padmini Gopalakrishnan, Yang Xu 0017, Lawrence T. Pileggi	Robust analog/RF circuit design with projection-based posynomial modeling.	ICCAD	2004	DBLP DOI BibTeX RDF
81	Tom Eeckelaert, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen	Generalized Posynomial Performance Modeling.	DATE	2003	DBLP DOI BibTeX RDF
64	Bing-yuan Cao 0001	Lagrange Problem in Fuzzy Reversed Posynomial Geometric Programming.	FSKD (2)	2005	DBLP DOI BibTeX RDF
64	Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen	Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
64	Tao Lin, Lawrence T. Pileggi	RC(L) interconnect sizing with second order considerations via posynomial programming.	ISPD	2001	DBLP DOI BibTeX RDF	RC trees, VLSI design automation, central moments, posynomiality, convex programming, interconnect optimization
54	Hiran Tennakoon, Carl Sechen	Nonconvex Gate Delay Modeling and Delay Optimization.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
47	Jaskirat Singh, Vidyasagar Nookala, Zhi-Quan Luo, Sachin S. Sapatnekar	Robust gate sizing by geometric programming.	DAC	2005	DBLP DOI BibTeX RDF	posynomial, uncertainty ellipsoid, optimization, gate sizing, geometric program
46	Han-Lin Li, Jung-Fa Tsai, Christodoulos A. Floudas	Convex underestimation for posynomial functions of positive variables.	Optim. Lett.	2008	DBLP DOI BibTeX RDF	Posynomials, Convex underestimators, Convex envelopes
36	Sanghamitra Roy, Charlie Chung-Ping Chen	ConvexSmooth: A simultaneous convex fitting and smoothing algorithm for convex optimization problems.	ISQED	2006	DBLP DOI BibTeX RDF
36	Maria del Mar Hershenson	Design of pipeline analog-to-digital converters via geometric programming.	ICCAD	2002	DBLP DOI BibTeX RDF
36	Jason Cong, Lei He 0001	An efficient technique for device and interconnect optimization in deep submicron designs.	ISPD	1998	DBLP DOI BibTeX RDF
36	Piyush K. Sancheti, Sachin S. Sapatnekar	Optimal design of macrocells for low power and high speed.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1996	DBLP DOI BibTeX RDF
28	Giuseppe Carlo Calafiore, Stephane Gaubert, Corrado Possieri	Log-Sum-Exp Neural Networks and Posynomial Models for Convex and Log-Log-Convex Data.	IEEE Trans. Neural Networks Learn. Syst.	2020	DBLP DOI BibTeX RDF
28	Marianne Akian, Xavier Allamigeon, Marin Boyet, Stéphane Gaubert	A Convex Programming Approach to Solve Posynomial Systems.	ICMS	2020	DBLP DOI BibTeX RDF
28	Bappa Mondal, Suvankar Biswas, Arindam Garai, Tapan Kumar Roy	Posynomial Geometric Programming in EOQ Model with Interval Neutrosophic Number.	ICITAM	2019	DBLP DOI BibTeX RDF
28	Giuseppe Carlo Calafiore, Stephane Gaubert, Corrado Possieri	Log-sum-exp neural networks and posynomial models for convex and log-log-convex data.	CoRR	2018	DBLP BibTeX RDF
28	Xue-Gang Zhou, Xiao-Peng Yang, Bing-Yuan Cao 0001	Posynomial geometric programming problem subject to max-min fuzzy relation equations.	Inf. Sci.	2016	DBLP DOI BibTeX RDF
28	Giuseppe Carlo Calafiore, Laurent El Ghaoui, Carlo Novara	Sparse identification of posynomial models.	Autom.	2015	DBLP DOI BibTeX RDF
28	Giuseppe Carlo Calafiore, Laurent El Ghaoui, Carlo Novara	Sparse Identification of Polynomial and Posynomial Models.	CoRR	2013	DBLP BibTeX RDF
28	Bing-yuan Cao 0001	The more-for-less paradox in fuzzy posynomial geometric programming.	Inf. Sci.	2012	DBLP DOI BibTeX RDF
28	G. S. Mahapatra, T. K. Mandal	Posynomial Parametric Geometric Programming with Interval Valued Coefficient.	J. Optim. Theory Appl.	2012	DBLP DOI BibTeX RDF
28	Jung-Fa Tsai, Ming-Hua Lin	An Efficient Global Approach for Posynomial Geometric Programming Problems.	INFORMS J. Comput.	2011	DBLP DOI BibTeX RDF
28	Hao-Chun Lu, Han-Lin Li, Chrysanthos E. Gounaris, Christodoulos A. Floudas	Convex relaxation for solving posynomial programs.	J. Glob. Optim.	2010	DBLP DOI BibTeX RDF
28	Akshay K. Ojha, K. K. Biswal	Posynomial Geometric Programming Problems with Multiple Parameters	CoRR	2010	DBLP BibTeX RDF
28	Shiang-Tai Liu	Posynomial geometric programming with interval exponents and coefficients.	Eur. J. Oper. Res.	2008	DBLP DOI BibTeX RDF
28	Shiang-Tai Liu	Posynomial geometric programming with parametric uncertainty.	Eur. J. Oper. Res.	2006	DBLP DOI BibTeX RDF
28	Ching-Ter Chang	Formulating the mixed integer fractional posynomial programming.	Eur. J. Oper. Res.	2006	DBLP DOI BibTeX RDF
28	Kan-Lin Hsiung, Yang Xu 0017	A tractable approximation of expectation-based stochastic posynomial programs.	ACC	2006	DBLP DOI BibTeX RDF
28	Jayant Rajgopal, Dennis L. Bricker	Solving Posynomial Geometric Programming Problems via Generalized Linear Programming.	Comput. Optim. Appl.	2002	DBLP DOI BibTeX RDF
28	Ching-Ter Chang	On the posynomial fractional programming problems.	Eur. J. Oper. Res.	2002	DBLP DOI BibTeX RDF
28	Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen	Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing.	ICCAD	2001	DBLP DOI BibTeX RDF
28	A. J. Federowicz, Jayant Rajgopal	Robustness of posynomial geometric programming optima.	Math. Program.	1999	DBLP DOI BibTeX RDF
28	Piyush K. Sancheti, Sachin S. Sapatnekar	Layout Optimization Using Arbitrarily High Degree Posynomial Models.	ISCAS	1995	DBLP DOI BibTeX RDF
28	Daniel Granot, Frieda Granot	Minimal covers, minimal sets and canonical facets of the posynomial knapsack polytope.	Discret. Appl. Math.	1984	DBLP DOI BibTeX RDF
28	J. E. Fattler, Gintaras V. Reklaitis, Y. T. Sin, R. R. Root, K. M. Ragsdell	On the computational utility of posynomial geometric programming solution methods.	Math. Program.	1982	DBLP DOI BibTeX RDF
28	Ron S. Dembo	Second order algorithms for the posynomial geometric programming dual, part I: Analysis.	Math. Program.	1979	DBLP DOI BibTeX RDF
28	Robert A. Abrams	Consistency, Superconsistency, and Dual Degeneracy in Posynomial Geometric Programming.	Oper. Res.	1976	DBLP DOI BibTeX RDF
18	Samiran DasGupta, Pradip Mandal	An automated design approach for CMOS LDO regulators.	ASP-DAC	2009	DBLP DOI BibTeX RDF
18	Jaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar	A Geometric Programming-Based Worst Case Gate Sizing Method Incorporating Spatial Correlation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
18	Victoria Wang, Kanak Agarwal, Sani R. Nassif, Kevin J. Nowka, Dejan Markovic	A Design Model for Random Process Variability.	ISQED	2008	DBLP DOI BibTeX RDF	random process variability, current variation, modeling, principal component analysis
18	Xin Li 0001, Padmini Gopalakrishnan, Yang Xu 0017, Lawrence T. Pileggi	Robust Analog/RF Circuit Design With Projection-Based Performance Modeling.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
18	Sanghamitra Roy, Charlie Chung-Ping Chen	SmartSmooth: A linear time convexity preserving smoothing algorithm for numerically convex data with application to VLSI design.	ASP-DAC	2007	DBLP DOI BibTeX RDF
18	Cheng Zhuo, Huafeng Zhang, Rupak Samanta, Jiang Hu, Kangsheng Chen	Modeling, optimization and control of rotary traveling-wave oscillator.	ICCAD	2007	DBLP DOI BibTeX RDF
18	Iris Hui-Ru Jiang, Song-Ra Pan, Yao-Wen Chang, Jing-Yang Jou	Reliable crosstalk-driven interconnect optimization.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	post-layout optimization, VLSI, interconnect, lagrangian relaxation
18	Mihir R. Choudhury, Quming Zhou, Kartik Mohanram	Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques.	ICCAD	2006	DBLP DOI BibTeX RDF
18	Kan-Lin Hsiung	Design of High-Speed Metal-Semiconductor-Metal Photodetectors: An Optimization-Based Approach.	DELTA	2006	DBLP DOI BibTeX RDF
18	Trent McConaghy, Georges G. E. Gielen	Analysis of simulation-driven numerical performance modeling techniques for application to analog circuit optimization.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
18	Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin Cheung, Mark Horowitz, Stephen P. Boyd	A New Method for Design of Robust Digital Circuits.	ISQED	2005	DBLP DOI BibTeX RDF
18	Tholom Kiely, Georges G. E. Gielen	Performance Modeling of Analog Integrated Circuits Using Least-Squares Support Vector Machines.	DATE	2004	DBLP DOI BibTeX RDF
18	Maria del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee	Optimal design of a CMOS op-amp via geometric programming.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
18	Pradip Mandal, V. Visvanathan	CMOS op-amp sizing using a geometric programming formulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
18	Maria del Mar Hershenson, Ali Hajimiri, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee	Design and optimization of LC oscillators.	ICCAD	1999	DBLP DOI BibTeX RDF
18	Rony Kay, Lawrence T. Pileggi	EWA: efficient wiring-sizing algorithm for signal nets and clock nets.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF