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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 7 occurrences of 6 keywords
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Results
Found 13 publication records. Showing 13 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
34 | João Navarro, Maximiliam Luppe |
Performance Comparison of High-Speed Dual Modulus Prescalers Using Metaheuristic Sizing/Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: 33rd Symposium on Integrated Circuits and Systems Design, SBCCI 2020, Campinas, Brazil, August 24-28, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9625-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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34 | Jing Jin 0005, Bukun Pan, Xiaoming Liu 0008, Jianjun Zhou |
Injection-Locking Frequency Divider based dual-modulus prescalers with extended locking range. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014, pp. 502-505, 2014, IEEE, 978-1-4799-3431-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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34 | Jian Shi, Taishan Mo, Chengyan Ma, Tianchun Ye 0001 |
A current-shaping technique for static MOS current-mode logic prescalers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 10(2), pp. 20120887, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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34 | Prashant Dekate, William Redman-White, Domine Leenaerts, John R. Long |
Broad-Band Odd-Number CMOS Prescalers With Quadrature/Symmetrical Outputs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 59-II(7), pp. 399-403, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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34 | Seon-Woo Hwang, Yongsam Moon |
Divide-by-N and divide-by-N/N+1 prescalers based on a shift register and a multi-input NOR gate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 9(20), pp. 1611-1616, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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34 | Wu-Hsin Chen, Byunghoo Jung |
High-Speed Low-Power True Single-Phase Clock Dual-Modulus Prescalers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 58-II(3), pp. 144-148, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
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34 | Ranganathan Desikachari, Mark Steeds, Jeffrey M. Huard, Un-Ku Moon |
An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS Prescalers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 14th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2007, Marrakech, Morocco, December 11-14, 2007, pp. 645-648, 2007, IEEE, 978-1-4244-1377-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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34 | Sheng-Che Tseng, Chinchun Meng, Wei-Yu Chen |
True 50% Duty-Cycle SSH and SHH SiGe BiCMOS Divide-by-3 Prescalers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 89-C(6), pp. 725-731, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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34 | Herbert Knapp, Josef Böck, Martin Wurzer, Günter Ritzberger, Klaus Aufinger, Ludwig Treitinger |
2-GHz/2-mW and 12-GHz/30-mW dual-modulus prescalers in silicon bipolar technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 36(9), pp. 1420-1423, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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33 | Mircea R. Stan |
Synchronous Up/Down Counter with Clock Period Independent of Counter Size. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 13th Symposium on Computer Arithmetic (ARITH-13 '97), 6-9 July 1997, Asilomar, CA, USA, pp. 274-281, 1997, IEEE Computer Society, 0-8186-7846-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
up/down counters, constant time counters, prescalers |
33 | Luis A. Montalvo, Alain Guyot |
Svoboda-Tung division with no compensation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 381-385, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Svoboda-Tung division, radix-b division algorithm, iteration overflow, most significant digits, radix-b algorithm, IEEE normalised divisor, pre-scaling technique, stepwise approximation, VLSI, iterative methods, digital arithmetic, VLSI implementation, prescalers, dividing circuits |
30 | Quan Yuan, Haigang Yang, Fang-yuan Dong, Tao Yin |
"Time borrowing" technique for design of low-power high-speed multi-modulus prescaler in frequency synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 1004-1007, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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30 | Ping Wu, Kai He |
A CMOS triple-band fractional-N frequency synthesizer for GSM/GPRS/EDGE applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 706-709, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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