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Found 2764 publication records. Showing 2764 according to the selection in the facets
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Authors |
Title |
Venue |
Year |
Link |
Author keywords |
77 | Fengbin Qi, Xianyi Zhang, Shanshan Wang, Xingquan Mao |
RCC: A New Programming Language for Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: 11th IEEE International Conference on High Performance Computing and Communications, HPCC 2009, 25-27 June 2009, Seoul, Korea, pp. 688-693, 2009, IEEE, 978-0-7695-3738-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
52 | Wenyin Fu, Katherine Compton |
A Simulation Platform for Reconfigurable Computing Research. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-7, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
52 | Wenyin Fu, Katherine Compton |
An Execution Environment for Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 17-20 April 2005, Napa, CA, USA, Proceedings, pp. 149-158, 2005, IEEE Computer Society, 0-7695-2445-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
52 | Russell Tessier, Wayne P. Burleson |
Reconfigurable Computing for Digital Signal Processing: A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 28(1-2), pp. 7-27, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
FPGA, survey, reconfigurable computing, signal processing |
49 | Vikas Aggarwal, Alan D. George, Kishore Yalamanchili, Changil Yoon, Herman Lam, Greg Stitt |
Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA@SC ![In: Proceedings of the Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications, HPRTCA 2009, November 15, 2009, Portland, Oregon, USA, pp. 47-54, 2009, ACM, 978-1-60558-721-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel programming, programming language, reconfigurable computing, productivity, portability, programming model |
45 | Katherine Compton, Scott Hauck |
Reconfigurable computing: a survey of systems and software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Comput. Surv. ![In: ACM Comput. Surv. 34(2), pp. 171-210, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
field-programmable, manual design, FPGA, reconfigurable computing, reconfigurable architectures, reconfigurable systems, Automatic design |
44 | Yeong-Kang Lai, Lien-Fei Chen, Jian-Chou Chen, Chun-Wei Chiu |
A two-way SIMD-based reconfigurable computing architecture for multimedia applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4578-4581, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
44 | Chih-Hao Tseng, Pao-Ann Hsiung |
UML-Based Design Flow and Partitioning Methodology for Dynamically Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing - EUC 2005, International Conference EUC 2005, Nagasaki, Japan, December 6-9, 2005, Proceedings, pp. 479-488, 2005, Springer, 3-540-30807-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
FPGA, UML, partitioning, reconfigurable computing, codesign, sequence diagram, design flow |
43 | Reiner W. Hartenstein |
The Neumann Syndrome calls for a revolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA ![In: Proceedings of the 1st international workshop on High-performance reconfigurable computing technology and applications, HPRCTA 2007,held in conjunction with SC07, Reno, Nevada, USA, November 11, 2007, 2007, ACM Press, 978-1-59593-894-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
42 | Haibin Shen, Rongquan You, Yier Jin, Aiming Ji |
Interconnect Estimation for Mesh-Based Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2006, Seoul, Korea, August 1-4, 2006, Proceedings, pp. 766-775, 2006, Springer, 3-540-36679-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
mesh-based, probability, Interconnect, reconfigurable computing |
42 | Youngsun Han, Seon Kim, Chulwoo Kim |
Jaguar: A Compiler Infrastructure for Java Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICESS ![In: Embedded Software and Systems, Second International Conference, ICESS 2005, Xi'an, China, December 16-18, 2005, Proceedings, pp. 386-397, 2005, Springer, 3-540-30881-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Java, FPGA, compiler, Reconfigurable computing, Verilog |
41 | Wenyin Fu, Katherine Compton |
An execution environment for reconfigurable computing (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 267, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
41 | David R. Martinez, Tyler J. Moeller, Ken Teitelbaum |
Application of Reconfigurable Computing to a High Performance Front-End Radar Signal Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 28(1-2), pp. 63-83, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
VLSI rader signal processor, front end high performance filtering, digital filtering mapped to reconfigurable computing, commercial FPGA hardware, reconfigurable hardware |
40 | Esam El-Araby, Iván González, Tarek A. El-Ghazawi |
Performance bounds of partial run-time reconfiguration in high-performance reconfigurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA ![In: Proceedings of the 1st international workshop on High-performance reconfigurable computing technology and applications, HPRCTA 2007,held in conjunction with SC07, Reno, Nevada, USA, November 11, 2007, pp. 11-20, 2007, ACM Press, 978-1-59593-894-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
field programmable gate arrays (FPGA), high performance computing, reconfigurable computing, dynamic partial reconfiguration |
39 | Abdellah Touhafi |
A Multi-node Dynamic Reconfigurable Computing System with Distributed Reconfiguration Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 469-474, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Kang Sun, Jun Zheng, Yuanyuan Li, Xuezeng Pan |
Design of a Simulator for Mesh-Based Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NPC ![In: Network and Parallel Computing, IFIP International Conference, NPC 2007, Dalian, China, September 18-21, 2007, Proceedings, pp. 526-535, 2007, Springer, 978-3-540-74783-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
simulator, reconfigurable computing, dynamic reconfiguration, reconfigurable mesh |
38 | Reiner W. Hartenstein |
Reconfigurable Computing: A New Business Model and its Impact on SoC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 4-6 September 2001, Warsaw, Poland, pp. 103-111, 2001, IEEE Computer Society, 0-7695-1239-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
38 | Yong Dou, Guiming Wu, Jinhui Xu 0002, Xingming Zhou |
A coarse-grained reconfigurable computing architecture with loop self-pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 52(4), pp. 575-587, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
reconfigurable computing, data driven, loop pipelining, register promotion |
37 | Yong-Sheng Yin, Gaoming Du, Yu-Kun Song |
Study on the Multi-pipeline Reconfigurable Computing System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSSE (4) ![In: International Conference on Computer Science and Software Engineering, CSSE 2008, Volume 4: Embedded Programming / Database Technology / Neural Networks and Applications / Other Applications, December 12-14, 2008, Wuhan, China, pp. 122-125, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
37 | Eylon Caspi, Michael Chu, Randy Huang, Joseph Yeh, John Wawrzynek, André DeHon |
Stream Computations Organized for Reconfigurable Execution (SCORE). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 605-614, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
36 | Maya B. Gokhale |
RAW keynote 1: the outer limits: reconfigurable computing in space and in orbit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
36 | Phan Cong Vinh, Jonathan P. Bowen |
Continuity aspects of embedded reconfigurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Innov. Syst. Softw. Eng. ![In: Innov. Syst. Softw. Eng. 1(1), pp. 41-53, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Reconfigurable computing Software development, Embedded systems, Formal methods, Dynamic reconfiguration |
35 | Shawn A. Bohner, Ramya Ravichandar, James D. Arthur |
Model-based engineering for change-tolerant systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Innov. Syst. Softw. Eng. ![In: Innov. Syst. Softw. Eng. 3(4), pp. 237-257, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Change tolerance, Capabilities engineering, Model-driven architecture, Reconfigurable computing, Complex systems, Agent-based systems, Model-based engineering |
35 | Timothy O'Sullivan, Richard Studdert |
Agent technology and reconfigurable computing for mobile devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2005 ACM Symposium on Applied Computing (SAC), Santa Fe, New Mexico, USA, March 13-17, 2005, pp. 963-969, 2005, ACM, 1-58113-964-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Jawad Khan, Ranga Vemuri |
Battery-Efficient Task Execution on Reconfigurable Computing Platforms with Multiple Processing Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Katarzyna Leijten-Nowak, Jef L. van Meerbergen |
Embedded Reconfigurable Logic Core for DSP Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 89-101, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Phan Cong Vinh, Jonathan P. Bowen |
A Formal Approach to Aspect-Oriented Modular Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TASE ![In: First Joint IEEE/IFIP Symposium on Theoretical Aspects of Software Engineering, TASE 2007, June 5-8, 2007, Shanghai, China, pp. 369-378, 2007, IEEE Computer Society, 0-7695-2856-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Miljan Vuletic, Laura Pozzi, Paolo Ienne |
Programming Transparency and Portable Hardware Interfacing: Towards General-Purpose Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 15th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2004), 27-29 September 2004, Galveston, TX, USA, pp. 339-351, 2004, IEEE Computer Society, 0-7695-2226-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Christian Siemers, Sybille Siemers |
Reconfigurable Computing Based on Universal Configurable Blocks-A New Approach for Supporting Performance- and Realtime-Dominated Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACAC ![In: 5th Australasian Computer Architecture Conference (ACAC 2000), 31 January - 3 February 2000, Canberra, Australia, pp. 82-89, 2000, IEEE Computer Society, 0-7695-0512-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Block-based Instruction Set Architecture, Realtime-dominated Environment, Reconfigurable Computing |
34 | Christian Haubelt |
Design Space Exploration for Distributed Hardware Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 1171, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner 0001, Jürgen Becker 0001 |
FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings, pp. 62-73, 2009, Springer, 978-3-642-00640-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
design assurance, bitstream debugging, security, FPGA, Reconfigurable Computing, design verification, EDA tools |
33 | Ling Zhuo, Viktor K. Prasanna |
Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(4), pp. 433-448, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
computations on matrices, field-programmable gate arrays, parallel algorithms, Scientific computing, reconfigurable hardware |
33 | Walid A. Najjar, Jason R. Villarreal |
Reconfigurable Computing in the New Age of Parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings, pp. 255-262, 2009, Springer, 978-3-642-03137-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
FPGAs, Reconfigurable computing |
33 | Benjamin Carrión Schäfer, Steven F. Quigley, Andrew H. C. Chan |
Scalable Implementation of the Discrete Element Method on a Reconfigurable Computing Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 925-934, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
33 | Juanjo Noguera, Rosa M. Badia |
HW/SW codesign techniques for dynamically reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(4), pp. 399-415, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
32 | Reiner W. Hartenstein |
RAW keynote 2: new horizons of very high performance computing (VHPC): hurdles and chances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
32 | Kang Sun, Xuezeng Pan, Lingdi Ping |
A Reconfigurable Computing Engine for Wavelet Transforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-5, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
32 | André DeHon, Joshua Adams, Michael DeLorimier, Nachiket Kapre, Yuki Matsuda 0007, Helia Naeimi, Michael C. Vanier, Michael G. Wrighton |
Design Patterns for Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, CA, USA, Proceedings, pp. 13-23, 2004, IEEE Computer Society, 0-7695-2230-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
32 | Katherine Compton, Zhiyuan Li 0008, James Cooley, Stephen Knol, Scott Hauck |
Configuration relocation and defragmentation for run-time reconfigurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(3), pp. 209-220, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
31 | Ananth Nallamuthu, Melissa C. Smith, Scott S. Hampton, Pratul K. Agarwal, Sadaf R. Alam |
Energy efficient biomolecular simulations with FPGA-based reconfigurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 83-84, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
biomolecular simulations, lammps, fpga, reconfigurable computing, molecular dynamics |
31 | Grant B. Wigley, David A. Kearney, David Warren |
Introducing ReConfigME: An Operating System for Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 687-697, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
31 | Yu Zhang, Dan Feng 0001 |
An Active Storage System for High Performance Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA ![In: 22nd International Conference on Advanced Information Networking and Applications, AINA 2008, GinoWan, Okinawa, Japan, March 25-28, 2008, pp. 644-651, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
High Performance Computing, Reconfigurable Computing, Active Storage |
31 | David Caliga, David Peter Barker |
Delivering acceleration: the potential for increased HPC application performance using reconfigurable logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the 2001 ACM/IEEE conference on Supercomputing, Denver, CO, USA, November 10-16, 2001, CD-ROM, pp. 32, 2001, ACM, 1-58113-293-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
FPGA, reconfigurable computing |
30 | Foad Lotfifar, Hadi Shahriar Shahhoseini |
Performance modeling of partially reconfigurable computing systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICCSA ![In: The 6th ACS/IEEE International Conference on Computer Systems and Applications, AICCSA 2008, Doha, Qatar, March 31 - April 4, 2008, pp. 94-99, 2008, IEEE Computer Society, 978-1-4244-1967-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Timothy J. Callahan, John Wawrzynek |
Instruction-Level Parallelism for Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August 31 - September 3, 1998, Proceedings, pp. 248-257, 1998, Springer, 3-540-64948-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
30 | Issam W. Damaj, Hassan B. Diab |
Performance Analysis of Linear Algebraic Functions Using Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 24(1), pp. 91-107, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
MorphoSys, coarse grained systems, performance evaluation, parallel algorithms, parallel processing, Reconfigurable computing, geometrical transformations |
30 | Issam W. Damaj, Hassan B. Diab |
Performance Analysis of Extended Vector-Scalar Operations Using Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICCSA ![In: 2001 ACS / IEEE International Conference on Computer Systems and Applications (AICCSA 2001), 26-29 June 2001, Beirut, Lebanon, pp. 227-, 2001, IEEE Computer Society, 0-7695-1165-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Parallel Processing, Reconfigurable Computing, Algorithm Mapping, Algebraic Functions |
30 | Wayne Luk, T. K. Lee, J. Rice, Nabeel Shirazi, Peter Y. K. Cheung |
Reconfigurable Computing for Augmented Reality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, pp. 136-145, 1999, IEEE Computer Society, 0-7695-0375-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
FPGAs, augmented reality, reconfigurable computing, video analysis, video synthesis |
29 | Zhi Guo, Betul Buyukkurt, Walid A. Najjar |
Input data reuse in compiling window operations onto reconfigurable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'04), Washington, DC, USA, June 11-13, 2004, pp. 249-256, 2004, ACM, 1-58113-806-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
reuse analysis, compilation, high-level synthesis, VHDL, reconfigurable computing |
29 | Guido Araujo, Sharad Malik, Zhining Huang, Nahri Moreano |
Datapath Merging and Interconnection Sharing for Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 38-43, 2002, ACM / IEEE Computer Society, 1-58113-576-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
high level and architectural synthesis, reconfigurable computing |
29 | Eduardo Augusto Bezerra, Fabian Vargas 0001, Michael Paul Gough |
Improving Reconfigurable Systems Reliability by Combining Periodical Test and Redundancy Techniques: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(2), pp. 163-174, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
programmable-logic-array and space applications, fault tolerance, test, reconfigurable computing |
29 | Miguel A. Vega-Rodríguez, Juan Antonio Gómez Pulido, Juan Manuel Sánchez-Pérez, José M. Granado Criado, Manuel Rubio del Solar |
Reconfigurable Computing and Parallelism for Implementing and Accelerating Evolutionary Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Parallel Evolutionary Computations ![In: Parallel Evolutionary Computations, pp. 71-93, 2006, Springer, 978-3-540-32837-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Christophe Bobda |
Building Up a Course in Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2005 International Conference on Microelectronics Systems Education, MSE 2005, Anaheim, CA, USA, June 12-13, 2005, pp. 7-8, 2005, IEEE Computer Society, 0-7695-2374-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Juanjo Noguera, Rosa M. Badia, Jordi Domingo-Pascual, Josep Solé-Pareta |
Reconfigurable Computing: An Innovative Solution for Multimedia and Telecommunication Networks Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 25th EUROMICRO '99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy, pp. 2367-2374, 1999, IEEE Computer Society, 0-7695-0321-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Dinesh Bhatia |
Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 356-359, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
28 | Gongyu Wang, Greg Stitt, Herman Lam, Alan D. George |
A framework for core-level modeling and design of reconfigurable computing algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA@SC ![In: Proceedings of the Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications, HPRTCA 2009, November 15, 2009, Portland, Oregon, USA, pp. 29-38, 2009, ACM, 978-1-60558-721-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
28 | Grant B. Wigley, David A. Kearney |
The First Real Operating System for Reconfigurable Computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSAC ![In: 6th Australasian Computer Systems Architecture Conference (ACSAC 2001), 29-30 January 2001, Gold Coast, Queensland, Australia, pp. 130-137, 2001, IEEE Computer Society, 0-7695-0954-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
28 | Juanjo Noguera, Rosa M. Badia |
Run-Time HW/SW Codesign for Discrete Event Systems using Dynamically Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 13th International Symposium on System Synthesis, ISSS'00, Madrid, Spain, September 20-22, 2000., pp. 100-106, 2000, ACM / IEEE Computer Society, 0-7695-0765-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
28 | Mateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda |
The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 47(1), pp. 15-31, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
FPGA-based computer, rekonfiguration manager, platform, relocation, partiall dynamic reconfiguration, ESM |
27 | Reiner W. Hartenstein |
The digital divide of computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the First Conference on Computing Frontiers, 2004, Ischia, Italy, April 14-16, 2004, pp. 357-362, 2004, ACM, 1-58113-741-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
morphware, performance, SoC, reconfigurable computing |
27 | Luigi Carro, Stephan Wong |
Introduction to the Future of Reconfigurable Computing and Processor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings, pp. 226, 2009, Springer, 978-3-642-03137-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
27 | Jim Tørresen, Kyrre Glette |
Improving Flexibility in On-Line Evolvable Systems by Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings, pp. 391-402, 2007, Springer, 978-3-540-74625-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Janette Frigo, David Palmer 0006, Maya B. Gokhale, Marc Popkin-Paine |
Gamma-Ray Pulsar Detection using Reconfigurable Computing Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 8-11 April 2003, Napa, CA, USA, Proceedings, pp. 155-161, 2003, IEEE Computer Society, 0-7695-1979-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
27 | Eric Sivertson |
Keynote 2 - "Reconfigurable Computing and Trust: Foundational technologies to enable trusted reconfigurable platforms". ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2012, Cancun, Mexico, December 5-7, 2012, pp. 1, 2012, IEEE, 978-1-4673-2919-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
27 | Esam El-Araby, Iván González 0004, Tarek A. El-Ghazawi |
Virtualizing and sharing reconfigurable resources in High-Performance Reconfigurable Computing systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA@SC ![In: 2008 Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications, HPRCTA@SC 2008, Austin, TX, USA, November 17, 2008, pp. 1-8, 2008, IEEE, 978-1-4244-2826-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Nilton B. Armstrong, Heitor S. Lopes, Carlos Raimundo Erig Lima |
Reconfigurable Computing for Accelerating Protein Folding Simulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, Third International Workshop, ARC 2007, Mangaratiba, Brazil, March 27-29, 2007., pp. 314-325, 2007, Springer, 978-3-540-71430-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Tony Stansfield |
Wordlength as an Architectural Parameter for Reconfigurable Computing Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 667-676, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
26 | Christian Siemers |
Reconfigurable Computing between Classifications and Metrics - The Approach of Space/Time-Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 769-772, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
26 | Jihan Zhu, George J. Milne |
Implementing Kak Neural Networks on a Reconfigurable Computing Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 260-269, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
26 | Deepak Sreedharan, Ali Akoglu |
A hybrid processing element based reconfigurable architecture for hashing algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Ali Akoglu, Aravind Dasu, Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan |
Pattern Recognition Tool to Detect Reconfigurable Patterns in MPEG4 Video Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
reconfigurable media processor, recurring pattern analyzer, mobile multimedia processing, partition, dynamic reconfiguration, reconfigurable architectures, data flow graph, control flow graph, MPEG4, hardware software co-design, hardware software partitioning, routing architecture |
26 | Wenyin Fu, Katherine Compton |
Active kernel monitoring to combat scheduler gaming in reconfigurable computing systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 611-614, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Proshanta Saha |
Automatic Software Hardware Co-Design for Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 507-508, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Proshanta Saha, Tarek A. El-Ghazawi |
Software/Hardware Co-Scheduling for Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 299-300, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Juanjo Noguera, Rosa M. Badia |
System-level power-performance tradeoffs for reconfigurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(7), pp. 730-739, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Farhad Mehdipour, Morteza Saheb Zamani, Hamid Reza Ahmadifar, Mehdi Sedighi, Kazuaki J. Murakami |
Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Rajagopal Subramaniyan, Ian A. Troxel, Alan D. George, Melissa C. Smith |
Simulative analysis of dynamic scheduling heuristics for reconfigurable computing of parallel applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, FPGA 2006, Monterey, California, USA, February 22-24, 2006, pp. 230, 2006, ACM, 1-59593-292-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Rafael Maestre, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh, Román Hermida, Milagros Fernández |
Kernel Scheduling in Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 90-96, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
25 | Juanjo Noguera, Rosa M. Badia |
Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 3(2), pp. 385-406, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Adaptable architectures and microarchitectures, runtime support for dynamic reconfiguration, dynamic scheduling |
25 | Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins |
Designing an Operating System for a Heterogeneous Reconfigurable So. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 174, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Hartej Singh, Ming-Hau Lee, Guangming Lu, Fadi J. Kurdahi, Nader Bagherzadeh, Eliseu M. Chaves Filho |
MorphoSys: An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(5), pp. 465-481, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
reconfigurable cell array, bit-correlation, dynamic reconfiguration, Single Instruction Multiple Data, multimedia applications, video compression, MPEG-2, Reconfigurable systems, data encryption, target recognition |
25 | Ann Garrison Darrin, Richard Conde, Bobbie Chern, Phil Luers, Steve Jurczyk, Carl Mills |
Adaptive Instrument Module: Space Instrument Controller "brain" Through Programmable Logic Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 12-14 July 2001, Long Beach, CA, USA, pp. 256-260, 2001, IEEE Computer Society, 0-7695-1180-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
24 | Sunita Chandrasekaran, Shilpa Shanbagh, Douglas L. Maskell |
A dependency graph based methodology for parallelizing HLL applications on FPGA (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 286, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
fpgas, bioinformatics, sequence alignment, data dependency analysis, smith-waterman algorithm |
24 | Sayyed Arash Ostadzadeh, Roel Meeuws, Kamana Sigdel, Koen Bertels |
A clustering framework for task partitioning based on function-level data usage analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 279, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
task clustering, reconfigurable computing, hardware/software co-design, heterogeneous multiprocessors |
24 | Surin Kittitornkun, Yu Hen Hu |
Processor Array Synthesis from Shift-Variant Deep Nested Do Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 24(3), pp. 229-249, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
systolic mapping, FPGA, motion estimation, reconfigurable computing, nested loop |
24 | Ocean Y. H. Cheung, Kuen Hung Tsoi, Philip Heng Wai Leong, Monk-Ping Leong |
Tradeoffs in Parallel and Serial Implementations of the International Data Encryption Algorithm IDEA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2001, Third International Workshop, Paris, France, May 14-16, 2001, Proceedings, pp. 333-347, 2001, Springer, 3-540-42521-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
performance-tradeoffs, reconfigurable-computing, digital-design, Cryptographic hardware |
24 | T. Boggess, F. Shirley |
High-performance scalable computing for real-time applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCN ![In: Proceedings of the International Conference On Computer Communications and Networks (ICCCN 1997), September 22-25, 1997 Las Vegas, NV, USA, pp. 332-335, 1997, IEEE Computer Society, 0-8186-8186-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
high-performance scalable computing, interconnect technologies, high-performance computing technologies, embedded military applications, heterogeneous computer nodes, high-throughput system area network, standardized intelligent node-to-network interface, LANai, Sanders, Ptolemy environment, high density interconnect packaging, avionics applications, PacketWay, Internet Engineering Task Force proposed standard, high speed inter-SAN encryption, simulation, modeling, real-time systems, reconfigurable computing, real-time applications, RISC, switched network, digital signal processor, Myrinet |
24 | Kristian Stevens, Henry Chen, Terry Filiba, Peter L. McMahon, Yun S. Song |
Application of a reconfigurable computing cluster to ultra high throughput genome resequencing (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 284, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
genome resequencing, fpga, acceleration, reconfigurable logic |
24 | Ling Zhuo, Viktor K. Prasanna |
Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(12), pp. 1661-1675, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Ling Zhuo, Viktor K. Prasanna |
Hardware/Software Co-Design for Matrix Computations on Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-10, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Ling Zhuo, Viktor K. Prasanna |
Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS (1) ![In: 12th International Conference on Parallel and Distributed Systems, ICPADS 2006, Minneapolis, Minnesota, USA, July 12-15, 2006, pp. 87-95, 2006, IEEE Computer Society, 0-7695-2612-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky |
A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 17-19 April 2000, Napa Valley, CA, USA, Proceedings, pp. 39-48, 2000, IEEE Computer Society, 0-7695-0871-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
24 | Esam El-Araby, Iván González 0004, Tarek A. El-Ghazawi |
Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 1(4), pp. 21:1-21:23, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
field programmable gate arrays (FPGA), High performance computing, reconfigurable computing, dynamic partial reconfiguration |
24 | Sven Eisenhardt, Thomas Schweizer, Andreas Bernauer, Tommy Kuhn, Wolfgang Rosenstiel |
Prevention of Hot Spot Development on Coarse-Grained Dynamically Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 12-17, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
temperature optimization, reliability, reconfigurable computing, hot spot, coarse-grained |
24 | Juan Fernando Eusse Giraldo, Ricardo Pezzuol Jacobi |
Signal Processing Domain Application Mapping on the Brick Reconfigurable Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 356-361, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Expression Grain, Reconfigurable Computing, Signal Processing, Application Mapping |
24 | Asadollah Shahbahrami, Mahmood Ahmadi, Stephan Wong, Koen Bertels |
A New Approach to Implement Discrete Wavelet Transform Using Collaboration of Reconfigurable Elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 344-349, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Grid Computing, Reconfigurable Computing, DWT |
24 | Mahmood Fazlali, Mohammad K. Fallah, Mahdy Zolghadr, Ali Zakerolhosseini |
A New Datapath Merging Method for Reconfigurable System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings, pp. 157-168, 2009, Springer, 978-3-642-00640-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Datapath Merging, Maximum Weighted Clique Algorithm, High Level Synthesis, Reconfigurable Computing |
24 | Maciej Wielgosz, Ernest Jamro, Kazimierz Wiatr |
Accelerating Calculations on the RASC Platform: A Case Study of the Exponential Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings, pp. 306-311, 2009, Springer, 978-3-642-00640-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
HPRC (High Performance Reconfigurable Computing), exponent function, FPGA |
24 | Krishna K. Nagar, Yan Zhang, Jason D. Bakos |
An integrated reduction technique for a double precision accumulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA@SC ![In: Proceedings of the Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications, HPRTCA 2009, November 15, 2009, Portland, Oregon, USA, pp. 11-18, 2009, ACM, 978-1-60558-721-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
high-performance computing, reconfigurable computing, scientific computing, reduction, accumulator, IEEE 754, double precision |
24 | Vikas Aggarwal, Rafael García, Greg Stitt, Alan D. George, Herman Lam |
SCF: a device- and language-independent task coordination framework for reconfigurable, heterogeneous systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA@SC ![In: Proceedings of the Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications, HPRTCA 2009, November 15, 2009, Portland, Oregon, USA, pp. 19-28, 2009, ACM, 978-1-60558-721-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
communication, coordination, reconfigurable computing, productivity, portability, heterogeneous computing, accelerators |
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