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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 38 occurrences of 23 keywords
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Results
Found 54 publication records. Showing 54 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
254 | Onur Mutlu, Hyesoon Kim, Yale N. Patt |
Techniques for Efficient Processing in Runahead Execution Engines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 32st International Symposium on Computer Architecture (ISCA 2005), 4-8 June 2005, Madison, Wisconsin, USA, pp. 370-381, 2005, IEEE Computer Society, 978-0-7695-2270-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
235 | Kenzo Van Craeynest, Stijn Eyerman, Lieven Eeckhout |
MLP-Aware Runahead Threads in a Simultaneous Multithreading Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings, pp. 110-124, 2009, Springer, 978-3-540-92989-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
147 | Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero |
Kilo-instruction processors, runahead and prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Third Conference on Computing Frontiers, 2006, Ischia, Italy, May 3-5, 2006, pp. 269-278, 2006, ACM, 1-59593-302-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
runahead, prefetching, speculative execution, memory wall, Kilo-instruction processors |
122 | Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt |
Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-Order Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), Anaheim, California, USA, February 8-12, 2003, pp. 129-140, 2003, IEEE Computer Society, 0-7695-1871-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
103 | Onur Mutlu, Hyesoon Kim, Jared Stark, Yale N. Patt |
On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 4(1), pp. 2, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
101 | Onur Mutlu, Hyesoon Kim, Yale N. Patt |
Address-Value Delta (AVD) Prediction: A Hardware Technique for Efficiently Parallelizing Dependent Cache Misses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(12), pp. 1491-1508, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
value prediction, memory-level parallelism, runahead execution, Single data stream architectures |
90 | Polychronis Xekalakis, Nikolas Ioannou, Marcelo Cintra |
Combining thread level speculation helper threads and runahead execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 410-420, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
multi-cores, thread-level speculation, helper threads, runahead execution |
90 | Onur Mutlu, Hyesoon Kim, Yale N. Patt |
Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(1), pp. 10-20, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
memory latency tolerance, processors, Runahead execution |
90 | Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt |
An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(12), pp. 1556-1571, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
processor performance modeling, speculative execution, runahead execution, Single data stream architectures |
84 | Martin Karlsson, Erik Hagersten |
Conserving Memory Bandwidth in Chip Multiprocessors with Runahead Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-10, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
84 | Onur Mutlu, Hyesoon Kim, Yale N. Patt |
Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 233-244, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
57 | Yuan Chou, Brian Fahs, Santosh G. Abraham |
Microarchitecture Optimizations for Exploiting Memory-Level Parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 31st International Symposium on Computer Architecture (ISCA 2004), 19-23 June 2004, Munich, Germany, pp. 76-89, 2004, IEEE Computer Society, 0-7695-2143-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
55 | Milad Hashemi, Yale N. Patt |
Filtered runahead execution with a runahead buffer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 48th International Symposium on Microarchitecture, MICRO 2015, Waikiki, HI, USA, December 5-9, 2015, pp. 358-369, 2015, ACM, 978-1-4503-4034-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
46 | Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero |
Runahead Threads to improve SMT performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 16-20 February 2008, Salt Lake City, UT, USA, pp. 149-158, 2008, IEEE Computer Society, 978-1-4244-2070-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
46 | Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero |
Runahead Threads: Reducing Resource Contention in SMT Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 423, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
46 | Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt |
Runahead Execution: An Effective Alternative to Large Instruction Windows. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 23(6), pp. 20-25, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
44 | Peng Zhou, Soner Önder |
Improving single-thread performance with fine-grain state maintenance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia, Italy, May 5-7, 2008, pp. 251-260, 2008, ACM, 978-1-60558-077-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
processor state, runahead, simultaneous multi-threading, checkpoint, recovery |
44 | Ilya Ganusov, Martin Burtscher |
On the importance of optimizing the configuration of stream prefetchers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Memory System Performance ![In: Proceedings of the 2005 workshop on Memory System Performance, Chicago, Illinois, USA, June 12, 2005, pp. 54-61, 2005, ACM, 1-59593-147-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
hardware prefetching, stream prefetcher, runahead execution |
38 | Luis Ceze, Karin Strauss, James Tuck 0001, Josep Torrellas, Jose Renau |
CAVA: Using checkpoint-assisted value prediction to hide L2 misses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 3(2), pp. 182-208, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
checkpointed processor architectures, multiprocessor, memory hierarchies, Value prediction |
27 | Chaoqun Shen, Gang Qu 0001, Jiliang Zhang 0002 |
SPECRUN: The Danger of Speculative Runahead Execution in Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2312.01832, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Ajeya Naithani, Jaime Roelandts, Sam Ainsworth 0001, Timothy M. Jones 0001, Lieven Eeckhout |
Decoupled Vector Runahead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2023, Toronto, ON, Canada, 28 October 2023 - 1 November 2023, pp. 17-31, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Mohammad Bakhshalipour, Mohamad Qadri, Dominic Guri, Seyed Borna Ehsani, Maxim Likhachev, Phillip B. Gibbons |
Runahead A*: Speculative Parallelism for A* with Slow Expansions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICAPS ![In: Proceedings of the Thirty-Third International Conference on Automated Planning and Scheduling, July 8-13, 2023, Prague, Czech Republic, pp. 31-41, 2023, AAAI Press. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Ajeya Naithani, Sam Ainsworth 0001, Timothy M. Jones 0001, Lieven Eeckhout |
Vector Runahead for Indirect Memory Accesses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 42(4), pp. 116-123, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
27 | Ajeya Naithani, Lieven Eeckhout |
Reliability-Aware Runahead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2022, Seoul, South Korea, April 2-6, 2022, pp. 772-785, 2022, IEEE, 978-1-6654-2027-3. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
27 | Stephen Pruett, Yale N. Patt |
Branch Runahead: An Alternative to Branch Prediction for Impossible to Predict Branches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021, pp. 804-815, 2021, ACM, 978-1-4503-8557-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Hikaru Takayashiki, Masayuki Sato 0001, Kazuhiko Komatsu, Hiroaki Kobayashi |
Register Flush-free Runahead Execution for Modern Vector Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 33rd IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2021, Belo Horizonte, Brazil, October 26-29, 2021, pp. 114-125, 2021, IEEE, 978-1-6654-4301-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Ajeya Naithani, Sam Ainsworth 0001, Timothy M. Jones 0001, Lieven Eeckhout |
Vector Runahead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 48th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2021, Virtual Event / Valencia, Spain, June 14-18, 2021, pp. 195-208, 2021, IEEE, 978-1-6654-3333-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Fatemeh Golshan, Mohammad Bakhshalipour, Mehran Shakerinava, Ali Ansari 0001, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad |
Harnessing Pairwise-Correlating Data Prefetching With Runahead Metadata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 19(2), pp. 130-133, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Susumu Mashimo, Ryota Shioya, Koji Inoue |
Energy Efficient Runahead Execution on a Tightly Coupled Heterogeneous Core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPC Asia ![In: Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, HPC Asia 2020, Fukuoka, Japan, January 15-17, 2020, pp. 207-216, 2020, ACM, 978-1-4503-7236-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Ajeya Naithani, Josué Feliu, Almutaz Adileh, Lieven Eeckhout |
Precise Runahead Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High Performance Computer Architecture, HPCA 2020, San Diego, CA, USA, February 22-26, 2020, pp. 397-410, 2020, IEEE, 978-1-7281-6149-5. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Danilo Gallo, Shreepriya Shreepriya, Jutta Willamowski |
RunAhead: Exploring Head Scanning based Navigation for Runners. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHI ![In: CHI '20: CHI Conference on Human Factors in Computing Systems, Honolulu, HI, USA, April 25-30, 2020, pp. 1-13, 2020, ACM, 978-1-4503-6708-0. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Danilo Gallo, Shreepriya Shreepriya, Jutta Willamowski |
RunAhead: Providing Head Scanning based Navigation feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHI Extended Abstracts ![In: Extended Abstracts of the 2020 CHI Conference on Human Factors in Computing Systems, CHI 2020, Honolulu, HI, USA, April 25-30, 2020, pp. 1-4, 2020, ACM, 978-1-4503-6819-3. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Ajeya Naithani, Josué Feliu, Almutaz Adileh, Lieven Eeckhout |
Precise Runahead Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 18(1), pp. 71-74, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Shane T. Fleming, David B. Thomas |
Using Runahead Execution to Hide Memory Latency in High Level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2017, Napa, CA, USA, April 30 - May 2, 2017, pp. 109-116, 2017, IEEE Computer Society, 978-1-5386-4037-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
27 | Milad Hashemi, Onur Mutlu, Yale N. Patt |
Continuous runahead: Transparent hardware acceleration for memory intensive workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 49th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2016, Taipei, Taiwan, October 15-19, 2016, pp. 61:1-61:12, 2016, IEEE Computer Society, 978-1-5090-3508-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
27 | Zimo Li, Joshua San Miguel, Natalie D. Enright Jerger |
The runahead network-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 2016 IEEE International Symposium on High Performance Computer Architecture, HPCA 2016, Barcelona, Spain, March 12-16, 2016, pp. 333-344, 2016, IEEE Computer Society, 978-1-4673-9211-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
27 | Xi Tao, Qi Zeng 0006, Jih-Kwon Peir, Shih-Lien Lu |
Runahead Cache Misses Using Bloom Filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDCAT ![In: 17th International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2016, Guangzhou, China, December 16-18, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-5090-5081-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
27 | Sonya R. Wolff, Ronald D. Barnes |
Revisiting Using the Results of Pre-Executed Instructions in Runahead Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 13(2), pp. 97-100, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
27 | Kaveh Aasaraai, Andreas Moshovos |
NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Reconfigurable Comput. ![In: Int. J. Reconfigurable Comput. 2012, pp. 915178:1-915178:12, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
27 | Kaveh Aasaraai, Andreas Moshovos |
SPREX: A soft processor with Runahead execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2012, Cancun, Mexico, December 5-7, 2012, pp. 1-7, 2012, IEEE, 978-1-4673-2919-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
27 | Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Onur Mutlu, Mateo Valero |
Efficient runahead threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 19th International Conference on Parallel Architectures and Compilation Techniques, PACT 2010, Vienna, Austria, September 11-15, 2010, pp. 443-452, 2010, ACM, 978-1-4503-0178-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
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27 | Harold W. Cain, Priya Nagpurkar |
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2010, 28-30 March 2010, White Plains, NY, USA, pp. 203-212, 2010, IEEE Computer Society, 978-1-4244-6022-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
27 | Tanausú Ramírez |
Runahead threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2010 |
RDF |
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27 | Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero |
Code Semantic-Aware Runahead Threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: ICPP 2009, International Conference on Parallel Processing, Vienna, Austria, 22-25 September 2009, pp. 437-444, 2009, IEEE Computer Society, 978-0-7695-3802-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Walter Yuan-Hwa Li, Chin-Ling Huang, Chung-Ping Chung |
Tolerating Load Miss-Latency by Extending Effective Instruction Window with Low Complexity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: International Conference on Parallel Processing, ICPP 2011, Taipei, Taiwan, September 13-16, 2011, pp. 83-92, 2011, IEEE Computer Society, 978-1-4577-1336-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
Execute Ahead, Hardware Speculation, Instruction-Level Parallelism, Processor Architecture, Memory-Level Parallelism, Runahead Execution |
25 | Ronald D. Barnes, John W. Sias, Erik M. Nystrom, Sanjay J. Patel, Nacho Navarro, Wen-mei W. Hwu |
Beating In-Order Stalls with "Flea-Flicker" Two-Pass Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(1), pp. 18-33, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cache-miss tolerance, prefetching, out-of-order execution, Runahead execution |
25 | Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt |
Using the First-Level Caches as Filters to Reduce the Pollution Caused by Speculative Memory References. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 33(5), pp. 529-559, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cache filtering, speculative memory references, Caches, runahead execution, cache pollution |
19 | Weifeng Zhang 0003, Dean M. Tullsen, Brad Calder |
Accelerating and Adapting Precomputation Threads for Effcient Prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 10-14 February 2007, Phoenix, Arizona, USA, pp. 85-95, 2007, IEEE Computer Society, 1-4244-0804-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Ilya Ganusov, Martin Burtscher |
Future execution: A prefetching mechanism that uses multiple cores to speed up single threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 3(4), pp. 424-449, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Future execution, chip multiprocessors, prefetching, memory wall |
19 | Zhen Yang, Xudong Shi 0003, Feiqi Su, Jih-Kwon Peir |
Overlapping dependent loads with addressless preload. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), Seattle, Washington, USA, September 16-20, 2006, pp. 275-284, 2006, ACM, 1-59593-264-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
instruction and issue window, pointer-chasing loads, data prefetching, memory-level parallelism |
19 | Ilya Ganusov, Martin Burtscher |
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 17-21 September 2005, St. Louis, MO, USA, pp. 350-360, 2005, IEEE Computer Society, 0-7695-2429-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Matthew Curtis-Maury, Tanping Wang |
Integrating Multiple Forms of Multithreaded Execution on multi-SMT Systems: A Study with Scientific Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
QEST ![In: Second International Conference on the Quantitative Evaluaiton of Systems (QEST 2005), 19-22 September 2005, Torino, Italy, pp. 199-209, 2005, IEEE Computer Society, 0-7695-2427-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Ronald D. Barnes, Shane Ryoo, Wen-mei W. Hwu |
"Flea-flicker" Multipass Pipelining: An Alternative to the High-Power Out-of-Order Offense. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 319-330, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Sorin Iacobovici, Lawrence Spracklen, Sudarshan Kadambi, Yuan Chou, Santosh G. Abraham |
Effective stream-based and execution-based data prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 18th Annual International Conference on Supercomputing, ICS 2004, Saint Malo, France, June 26 - July 01, 2004, pp. 1-11, 2004, ACM, 1-58113-839-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
hardware prefetcher, multiple strides, stream prefetching |
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