Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
57 | Xiaoping Tang, Ruiqi Tian, Martin D. F. Wong |
Fast evaluation of sequence pair in block placement by longestcommon subsequence computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(12), pp. 1406-1413, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
55 | Xiaoping Tang, D. F. Wong 0001, Ruiqi Tian |
Fast Evaluation of Sequence Pair in Block Placement by Longest Common Subsequence Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 106-111, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
51 | Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura |
Construction of an (r11, r12, r22)-Tournament from a Score Sequence Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 3403-3406, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
49 | Chikaaki Kodama, Kunihiro Fujiyoshi |
An efficient decoding method of sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (2) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 131-136, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
46 | Xiaoping Tang, Martin D. F. Wong |
On handling arbitrary rectilinear shape constraint. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 38-41, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
45 | Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura |
Realizability of Score Sequence Pair of an (r1l, r12, r22)-Tournament. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1019-1022, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
45 | Xiaoping Tang, D. F. Wong 0001 |
FAST-SP: a fast algorithm for block placement based on sequence pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 521-526, 2001, ACM, 0-7803-6634-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
43 | Gang Huang, Xianlong Hong, Changge Qiao, Yici Cai |
A Timing-Driven Block Placer Based on Sequence Pair Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999, pp. 249-252, 1999, IEEE Computer Society, 0-7803-5012-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
timing-driven, building block placement, sequence pair, simulated annealing algorithm |
40 | Hiroshi Miyashita, Yoji Kajitani |
On the equivalence of the sequence pair for rectangle packing to the dimension of partial orders [floorplanning]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (2) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 367-370, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
40 | Shinichi Kouda, Chikaaki Kodama, Kunihiro Fujiyoshi |
Improved method of cell placement with symmetry constraints for analog IC layout design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 2006, pp. 192-199, 2006, ACM, 1-59593-299-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
symmetry constraints, linear programming, placement, analog circuits, sequence-pair |
38 | Xiaoping Tang, D. F. Wong 0001 |
Floorplanning with alignment and performance constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 848-853, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
floorplanning, longest common subsequence, sequence pair |
34 | Takashi Nojima, Yasuhiro Takashima, Shigetoshi Nakatake, Yoji Kajitani |
A device-level placement with multi-directional convex clustering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 196-201, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
cluster-constraint, device-level placement, directional convex, rectangle packing, sequence-pair |
31 | Chikaaki Kodama, Kunihiro Fujiyoshi |
Selected sequence-pair: an efficient decodable packing representation in linear time using sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 2003, pp. 331-337, 2003, ACM, 0-7803-7660-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Kunihiro Fujiyoshi, Hiroshi Murata |
Arbitrary convex and concave rectilinear block packing usingsequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(2), pp. 224-233, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
28 | Hiroaki Saito, Kazuya Wakata, Kunihiro Fujiyoshi, Keishi Sakanushi, Takayuki Obata |
An improved method of convex-shaped block packing based on sequence-pair [VLSI layout]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (2) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 125-130, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
28 | Florin Balasa, Koen Lampaert |
Symmetry within the sequence-pair representation in the context ofplacement for analog design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(7), pp. 721-731, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
28 | Hiroshi Murata, Kunihiro Fujiyoshi, Mineo Kaneko |
VLSI/PCB placement with obstacles based on sequence pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(1), pp. 60-68, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
28 | Hiroshi Murata, Ernest S. Kuh |
Sequence-pair based placement method for hard/soft/pre-placed modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 1998 International Symposium on Physical Design, ISPD 1998, Monterey, CA, USA, April 6-8, 1998, pp. 167-172, 1998, ACM, 1-58113-021-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
28 | Song Chen 0001, Takeshi Yoshimura |
A stable fixed-outline floorplanning method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007, pp. 119-126, 2007, ACM, 978-1-59593-613-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
floorplanning, sequence pair, fixed-outline |
27 | Takafumi Hayashi |
Zero-Correlation Zone Sequence Set Constructed from a Perfect Sequence and a Complementary Sequence Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(7), pp. 1676-1681, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Hiroshi Murata, Kunihiro Fujiyoshi, Shigetoshi Nakatake, Yoji Kajitani |
VLSI module placement based on rectangle-packing by the sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(12), pp. 1518-1524, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
25 | Hui-long Jin, Shu-li Qi, Miao Zhang, Zhiyuan Wang |
Punctured Difference Set Pair and Perfect Punctured Binary Sequence Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Networks ![In: J. Networks 8(9), pp. 1982-1989, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Ankit Agrawal 0001, Xiaoqiu Huang 0001 |
DNAlignTT: Pairwise DNA alignment with sequence specific transition-transversion ratio. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EIT ![In: 2008 IEEE International Conference on Electro/Information Technology, EIT 2008, held at Iowa State University, Ames, Iowa, USA, May 18-20, 2008, pp. 453-455, 2008, IEEE, 978-1-4244-2030-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Mingxu Huo, Koubao Ding |
An Improved Algorithm for Sequence Pair Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (1) ![In: Computational Science - ICCS 2006, 6th International Conference, Reading, UK, May 28-31, 2006, Proceedings, Part I, pp. 482-489, 2006, Springer, 3-540-34379-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Keiji Kida, Takehiko Matsuo, Tetsuya Tashiro, Shigetoshi Nakatake |
Sequence-Pair Based Compaction under Equi-Length Constraint. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1015-1018, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Mingxu Huo, Koubao Ding |
A Quick Generation Method of Sequence Pair for Block Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (3) ![In: Computational Science - ICCS 2005, 5th International Conference, Atlanta, GA, USA, May 22-25, 2005, Proceedings, Part III, pp. 954-957, 2005, Springer, 3-540-26044-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Jianbang Lai, Ming-Shiun Lin, Ting-Chi Wang, Li-C. Wang |
Module placement with boundary constraints using the sequence-pair representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 515-520, 2001, ACM, 0-7803-6634-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng |
Sequence-pair approach for rectilinear module placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(4), pp. 484-493, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Koichi Hatta, Shin'ichi Wakabayashi, Tetsushi Koide |
Solving the Rectangular Packing Problem by an Adaptive GA Based on Sequence-Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999, pp. 181-184, 1999, IEEE Computer Society, 0-7803-5012-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng |
Rectilinear block placement using sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 1998 International Symposium on Physical Design, ISPD 1998, Monterey, CA, USA, April 6-8, 1998, pp. 173-178, 1998, ACM, 1-58113-021-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
22 | Takafumi Hayashi, Shinya Matsufuji |
A Generalized Construction of Optimal Zero-Correlation Zone Sequence Set from a Perfect Sequence Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(11), pp. 2337-2344, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Ankit Agrawal 0001, Xiaoqiu Huang 0001 |
Pairwise Statistical Significance of Local Sequence Alignment Using Substitution Matrices with Sequence-Pair-Specific Distance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIT ![In: 2008 International Conference on Information Technology, ICIT '08, Bhubaneswar, India, December 17-20, 2008, pp. 94-99, 2008, IEEE Computer Society, 978-1-4244-3745-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Yiu-Cheong Tam, Evangeline F. Y. Young, Chris C. N. Chu |
Analog placement with symmetry and other placement constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 349-354, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
symmetry constraints, placement, analog circuits, sequence-pair |
22 | Hayward H. Chan, Saurabh N. Adya, Igor L. Markov |
Are floorplan representations important in digital design? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005, pp. 129-136, 2005, ACM, 1-59593-021-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
B*-tree, floorplanning, sequence pair, circuit layout |
22 | Michael A. Riepe, Karem A. Sakallah |
Transistor placement for noncomplementary digital VLSI cell synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 8(1), pp. 81-107, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Cell Synthesis, Euler graphs, noncomplementary circuits, sequence pair optimization, transistor chaining, transistor placement, digital circuits, benchmark circuits |
22 | Matthew Moe, Herman Schmit |
Floorplanning of pipelined array modules using sequence pairs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 143-150, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
pipelined array, floorplan, sequence pair |
22 | Yukiko Kubo, Shigetoshi Nakatake, Yoji Kajitani, Masahiro Kawakita |
Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 467-472, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
mixed signal design, shape-based layout, placement, analog design, sequence-pair |
19 | Jai-Ming Lin, Yao-Wen Chang |
TCG: A transitive closure graph-based representation for general floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(2), pp. 288-292, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Shinichi Koda, Chikaaki Kodama, Kunihiro Fujiyoshi |
Linear Programming-Based Cell Placement With Symmetry Constraints for Analog IC Layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(4), pp. 659-668, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Shigetoshi Nakatake |
Structured Placement with Topological Regularity Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 215-220, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Shigetoshi Nakatake, Yukiko Kubo, Yoji Kajitani |
Consistent floorplanning with hierarchical superconstraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(1), pp. 42-49, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
16 | Hong-Wen Chiou, Jia-Hao Jiang, Yu-Teng Chang, Yu-Min Lee, Chi-Wen Pan |
Chiplet Placement for 2.5D IC with Sequence Pair Based Tree and Thermal Consideration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 28th Asia and South Pacific Design Automation Conference, ASPDAC 2023, Tokyo, Japan, January 16-19, 2023, pp. 7-12, 2023, ACM, 978-1-4503-9783-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Erzhong Xue, Zilong Wang 0001, Guang Gong |
Non-standard Golay Complementary Sequence Pair over QAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2208.12533, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Kai Jye Chee, Dzati Athiar Ramli |
Electrocardiogram Biometrics Using Transformer's Self-Attention Mechanism for Sequence Pair Feature Extractor and Flexible Enrollment Scope Identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 22(9), pp. 3446, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Atul Prakash 0002, Rajesh Kumar Lal |
Floorplanning for Area Optimization Using Parallel Particle Swarm Optimization and Sequence Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Pers. Commun. ![In: Wirel. Pers. Commun. 118(1), pp. 323-342, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
16 | Jing-Xin Guan, Jian-Hua Yin, Yue Zhang |
The sum necessary to ensure that a degree sequence pair has an A-connected realization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Appl. Math. ![In: Discret. Appl. Math. 292, pp. 97-107, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
16 | Zilong Wang 0001, Erzhong Xue, Guang Gong |
A New Construction of QAM Golay Complementary Sequence Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISIT ![In: IEEE International Symposium on Information Theory, ISIT 2020, Los Angeles, CA, USA, June 21-26, 2020, pp. 269-273, 2020, IEEE, 978-1-7281-6432-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
16 | Lian He, Zhenxin Zhao, Yuanzhu Chen 0001, Lihong Zhang |
Placement with Sequence-Pair-Driven TCG for Advanced Analog Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: IEEE Canadian Conference on Electrical and Computer Engineering, CCECE 2020, London, ON, Canada, August 30 - September 2, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-5442-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
16 | Xiaoli Zeng, Longye Wang, Hong Wen 0001 |
Designs of Zero Correlation Zone Sequence Pair Set with Inter-Subset Uncorrelated Property. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(9), pp. 1936-1941, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Andrzej Kozik |
Handling precedence constraints in scheduling problems by the sequence pair representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comb. Optim. ![In: J. Comb. Optim. 33(2), pp. 445-472, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Longye Wang, Xiaoli Zeng, Hong Wen 0001 |
Families of asymmetric sequence pair set with zero-correlation zone via interleaved technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Commun. ![In: IET Commun. 10(3), pp. 229-234, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Qin Wang 0005, Yizhong Ru, Hailong Yao, Tsung-Yi Ho, Yici Cai |
Sequence-pair-based placement and routing for flow-based microfluidic biochips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016, pp. 587-592, 2016, IEEE, 978-1-4673-9569-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Tomislav Rolich, Daniel Domovic, M. Golub |
Bottom-left and sequence pair for solving packing problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIPRO ![In: 39th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2016, Opatija, Croatia, May 30 - June 3, 2016, pp. 1318-1323, 2016, IEEE, 978-953-233-086-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Taher Kourany, Emad Hegazi, Yehea Ismail |
TCG-SP: An improved floorplan representation based on an efficient hybrid of Transitive Closure Graph and Sequence Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016, pp. 1934-1937, 2016, IEEE, 978-1-4799-5341-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Daniel Domovic, Tomislav Rolich |
Solving strip-packing problem using sequence pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIPRO ![In: 38th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2015, Opatija, Croatia, May 25-29, 2015, pp. 1183-1188, 2015, IEEE, 978-9-5323-3082-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Andrzej Kozik |
Fully Dynamic Evaluation of Sequence Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(6), pp. 894-904, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Jiong Shi, Liping Jin, Zhaoxi Fang, Ting Jiang, Zheng Zhou |
Binary sequence pair based time-domain superimposed training for OFDM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCNC ![In: 2013 IEEE Wireless Communications and Networking Conference (WCNC), Shanghai, Shanghai, China, April 7-10, 2013, pp. 3910-3914, 2013, IEEE, 978-1-4673-5938-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Masaya Yamagata, Hiromasa Habuchi |
On the modified pseudo-ternary M-sequence pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSDA ![In: The Sixth International Workshop on Signal Design and Its Applications in Communications, IWSDA 2013, Tokyo, Japan, October 27 - November 1, 2013, pp. 170-173, 2013, IEEE, 978-1-4799-6028-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Lei Xu 0007, Qilian Liang |
Zero Correlation Zone Sequence Pair Sets for MIMO Radar. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Aerosp. Electron. Syst. ![In: IEEE Trans. Aerosp. Electron. Syst. 48(3), pp. 2100-2113, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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16 | Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov |
Multi-objective voltage island floorplanning using sequence pair representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sustain. Comput. Informatics Syst. ![In: Sustain. Comput. Informatics Syst. 2(2), pp. 58-70, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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16 | Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov, Res Saleh |
Sequence pair based voltage island floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IGCC ![In: 2011 International Green Computing Conference and Workshops, IGCC 2012, Orlando, FL, USA, July 25-28, 2011, pp. 1-6, 2011, IEEE Computer Society, 978-1-4577-1220-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
16 | Adam Janiak, Andrzej Kozik, Maciej Lichtenstein |
New perspectives in VLSI design automation: deterministic packing by Sequence Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Oper. Res. ![In: Ann. Oper. Res. 179(1), pp. 35-56, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
16 | Lei Xu 0007, Qilian Liang |
Optimized Punctured ZCZ Sequence-Pair Set: Design, Analysis, and Application to Radar System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURASIP J. Wirel. Commun. Netw. ![In: EURASIP J. Wirel. Commun. Netw. 2010, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
16 | Won Ha Choi, Xun Liu |
Case Study: GPU-based implementation of sequence pair based floorplanning using CUDA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France, pp. 917-920, 2010, IEEE, 978-1-4244-5308-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
16 | Kunihiro Fujiyoshi, Chikaaki Kodama, Akira Ikeda |
A fast algorithm for rectilinear block packing based on selected sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 40(3), pp. 274-284, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura |
Score Sequence Pair Problems of (r11, r12, r22)-Tournaments - - Determination of Realizability - - . ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 90-D(2), pp. 440-448, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Russell D. Meller, Weiping Chen, Hanif D. Sherali |
Applying the sequence-pair representation to optimal facility layout designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Oper. Res. Lett. ![In: Oper. Res. Lett. 35(5), pp. 651-659, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Norihide Okada, Chikaaki Kodama, Takashi Sato, Kunihiro Fujiyoshi |
Thermal Driven Module Placement Using Sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1871-1874, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Chao Zhang, Xiaokang Lin, Mitsutoshi Hatori |
Novel Sequence Pair and Set with Three Zero Correlation Windows. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Commun. ![In: IEICE Trans. Commun. 88-B(4), pp. 1517-1522, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Chikaaki Kodama, Kunihiro Fujiyoshi, Teppei Koga |
A novel encoding method into sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 329-332, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
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16 | Qi Liu 0008 |
A Sequence-Pair and Mixed Integer Programming Based Methodology for the Facility Layout Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2004 |
RDF |
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16 | Kazuya Wakata, Hiroaki Saito, Kunihiro Fujiyoshi, Keishi Sakanushi, Takayuki Obata, Chikaaki Kodama |
An Improved Method of Convex Rectilinear Block Packing Based on Sequence-Pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12), pp. 3148-3157, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
16 | Satoshi Tayu |
A simulated annealing approach with sequence-pair encoding using a penalty function for the placement problem with boundary constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 2003, pp. 319-324, 2003, ACM, 0-7803-7660-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Chikaaki Kodama, Kunihiro Fujiyoshi |
An Efficient Decoding Method of Sequence-Pair with Reduced Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12), pp. 2785-2794, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
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16 | Chih-Hung Lee, Yi-Lin Hsieh, Hui-Chun Lee, Tsai-Ming Hsieh |
Sequence-pair based placement with boundary constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 341-344, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
16 | Koji Kiyota, Kunihiro Fujiyoshi |
Simulated annealing search through general structure floorplans using sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings, pp. 77-80, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Chieh Lin, Domine M. W. Leenaerts |
A new faster sequence pair algorithm [circuit layout]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings, pp. 407-410, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Shingo Nakaya, Tetsushi Koide, Shin'ichi Wakabayashi |
An adaptive genetic algorithm for VLSI floorplanning based on sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings, pp. 65-68, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Kunihiro Fujiyoshi, Hiroshi Murata |
Arbitrary convex and concave rectilinear block packing using sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 1999 International Symposium on Physical Design, ISPD 1999, Monterey, CA, USA, April 12-14, 1999, pp. 103-110, 1999, ACM, 1-58113-089-9. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Florin Balasa, Koen Lampaert |
Module Placement for Analog Layout Using the Sequence-Pair Representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999., pp. 274-279, 1999, ACM Press. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Ichiro Maruyama, Yoshiharu Abe, Takahiro Wakao, Eiji Sawamura, Terumasa Ehara, Katsuhiko Shirai |
Word sequence pair spotting for synchronization of speech and text in production of closed-caption TV programs for the hearing impaired. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSLP ![In: The 5th International Conference on Spoken Language Processing, Incorporating The 7th Australian International Speech Science and Technology Conference, Sydney Convention Centre, Sydney, Australia, 30th November - 4th December 1998, 1998, ISCA. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
16 | Maggie Zhiwei Kang, Wayne Wei-Ming Dai |
Arbitrary rectilinear block packing based on sequence pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 1998, pp. 259-266, 1998, ACM / IEEE Computer Society, 1-58113-008-2. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
16 | Hiroshi Murata, Kunihiro Fujiyoshi, Tomomi Watanabe, Yoji Kajitani |
A mapping from sequence-pair to rectangular dissection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997, pp. 625-633, 1997, IEEE, 0-7803-3663-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
16 | Hiroshi Murata, Kunihiro Fujiyoshi, Mineo Kaneko |
VLSI/PCB placement with obstacles based on sequence-pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 1997 International Symposium on Physical Design, ISPD 1997, Napa Valley, California, USA, April 14-16, 1997, pp. 26-31, 1997, ACM, 0-89791-927-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
15 | Ankit Agrawal 0001, Arka P. Ghosh, Xiaoqiu Huang 0001 |
Estimating Pairwise Statistical Significance of Protein Local Alignments Using a Clustering-Classification Approach Based on Amino Acid Composition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISBRA ![In: Bioinformatics Research and Applications, Fourth International Symposium, ISBRA 2008, Atlanta, GA, USA, May 6-9, 2008. Proceedings, pp. 62-73, 2008, Springer, 978-3-540-79449-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Pairwise local alignment, Clustering, Classification, Statistical significance |
15 | Love Singhal, Elaheh Bozorgzadeh |
Multi-layer Floorplanning on a Sequence of Reconfigurable Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-8, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Hua Xiang 0001, Xiaoping Tang, Martin D. F. Wong |
Bus-driven floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(11), pp. 1522-1530, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Hua Xiang 0001, Xiaoping Tang, Martin D. F. Wong |
Bus-Driven Floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 66-73, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Song Chen 0001, Zheng Xu, Takeshi Yoshimura |
A generalized V-shaped multilevel method for large scale floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 734-739, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Minsik Cho, Hongjoong Shin, David Z. Pan |
Fast substrate noise-aware floorplanning with preference directed graph for mixed-signal SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 765-770, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Yoji Kajitani |
Theory of placement by numDAG related with single-sequence, SP, BSG, and O-tree. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Jung-Been Im, Sunghoon Chun, Geunbae Kim, Jin-Ho Ahn, Sungho Kang |
RAIN (RAndom Insertion) Scheduling Algorithm for SoC Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 242-247, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Jae-Gon Kim, Yeong-Dae Kim |
A linear programming-based algorithm for floorplanning in VLSI design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(5), pp. 584-592, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Malgorzata Chrzanowska-Jeske, Benyi Wang, Garrison W. Greenwood |
Floorplanning with performance-based clustering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 724-727, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Wei Zou, Sudhakar M. Reddy, Irith Pomeranz, Yu Huang 0005 |
SOC Test Scheduling Using Simulated Annealing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA, pp. 325-330, 2003, IEEE Computer Society, 0-7695-1924-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Pei-Ning Guo, Toshihiko Takahashi, Chung-Kuan Cheng, Takeshi Yoshimura |
Floorplanning using a tree representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(2), pp. 281-289, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Shigetoshi Nakatake, Yukiko Kubo, Yoji Kajitani |
Consistent floorplanning with super hierarchical constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2001 International Symposium on Physical Design, ISPD 2001, Sonoma County, CA, USA, April 1-4, 2001, pp. 144-149, 2001, ACM, 1-58113-347-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Sudip Nag, Kamal Chaudhary |
Post-Placement Residual-Overlap Removal with Minimal Movement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 581-586, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Maggie Zhiwei Kang, Wayne Wei-Ming Dai |
Topology constrained rectilinear block packing for layout reuse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 1998 International Symposium on Physical Design, ISPD 1998, Monterey, CA, USA, April 6-8, 1998, pp. 179-186, 1998, ACM, 1-58113-021-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Jai-Ming Lin, Yao-Wen Chang |
TCG-S: orthogonal coupling of P*-admissible representations for general floorplans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(6), pp. 968-980, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|