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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 811 occurrences of 404 keywords
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Results
Found 1035 publication records. Showing 1035 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
123 | Yiannakis Sazeides |
Modeling Value Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February 2-6, 2002, pp. 211-222, 2002, IEEE Computer Society, 0-7695-1525-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
microarchitecture modeling, speculation, value prediction, value speculation |
113 | Craig B. Zilles, Naveen Neelakantam |
Reactive Techniques for Controlling Software Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 20-23 March 2005, San Jose, CA, USA, pp. 305-316, 2005, IEEE Computer Society, 0-7695-2298-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
112 | Steven Swanson, Luke K. McDowell, Michael M. Swift, Susan J. Eggers, Henry M. Levy |
An evaluation of speculative instruction execution on simultaneous multithreaded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 21(3), pp. 314-340, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
multiprocessors, multithreading, Instruction-level parallelism, speculation, thread-level parallelism, simultaneous multithreading |
112 | Jin Lin, Tong Chen 0010, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan |
A compiler framework for speculative analysis and optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation 2003, San Diego, California, USA, June 9-11, 2003, pp. 289-299, 2003, ACM, 1-58113-662-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
speculative SSA form, speculative weak update, partial redundancy elimination, data speculation, register promotion |
93 | Roy Dz-Ching Ju, Kevin Nomura, Uma Mahadevan, Le-Chun Wu |
A Unified Compiler Framework for Control and Data Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania, USA, October 15-19, 2000, pp. 157-168, 2000, IEEE Computer Society, 0-7695-0622-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
92 | Jin Lin, Tong Chen 0010, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan |
A compiler framework for speculative optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 1(3), pp. 247-271, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
speculative SSA form, speculative weak update, partial redundancy elimination, Data speculation, register promotion |
84 | Youfeng Wu, Li-Ling Chen, Roy Ju, Jesse Fang |
Performance potentials of compiler-directed data speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2003 IEEE International Symposium on Performance Analysis of Systems and Software, March 6-8, 2003, Austin, Texas, USA, Proceedings, pp. 22-31, 2003, IEEE Computer Society, 0-7803-7756-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
79 | Chao-ying Fu, Jill T. Bodine, Thomas M. Conte |
Modeling Value Speculation: An Optimal Edge Selection Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(3), pp. 277-292, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
optimal edge selection, critical path reduction, Value prediction, data dependence graph, value speculation |
79 | Mikio Takeuchi, Hideaki Komatsu, Toshio Nakatani |
A new speculation technique to optimize floating-point performance while preserving bit-by-bit reproducibility. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 17th Annual International Conference on Supercomputing, ICS 2003, San Francisco, CA, USA, June 23-26, 2003, pp. 305-315, 2003, ACM, 1-58113-733-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
bit-by-bit reproducibility, floating-point speculation, fused multiply-add, reassociation, striding, Java, prefetching, accuracy, instruction-level parallelism, software pipelining, just-in-time compiler, loop unrolling, privatization, IA-64, IEEE 754 |
75 | Roger A. Bringmann, Scott A. Mahlke, Wen-mei W. Hwu |
A study of the effects of compiler-controlled speculation on instruction and data caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 211-220, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
compiler-controlled speculation, nonnumeric programs, speculatively scheduled code, aggressive speculation models, scheduling, performance evaluation, parallel programming, time, instruction level parallelism, program compilers, data caches, cache storage, instruction cache, cache misses, performance results |
74 | Seongbae Park, SangMin Shim, Soo-Mook Moon |
Evaluation of Scheduling Techniques on a SPARC-based VLIW Testbed. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 104-113, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
SPARC-based VLIW testbed, VLIW microprocessors, Very Long Instruction Word microprocessors, all-path speculation, gcc-generated optimized SPARC code, high-performance VLIW code, nongreedy enhanced pipeline scheduling, nonspeculative operations, profile-based all-path speculation, restricted speculative loads, scheduling compiler, speculative operations, trace-based speculation, performance, compiler, computer architecture, parallel machines, software pipelining, loop unrolling, renaming, memory disambiguation, copies, scheduling techniques |
74 | Yunlian Jiang, Xipeng Shen |
Adaptive speculation in behavior-oriented parallelization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-5, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
74 | Yunlian Jiang, Xipeng Shen |
Adaptive Software Speculation for Enhancing the Cost-Efficiency of Behavior-Oriented Parallelization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2008 International Conference on Parallel Processing, ICPP 2008, September 8-12, 2008, Portland, Oregon, USA, pp. 270-278, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
74 | Dirk Grunwald, Artur Klauser, Srilatha Manne, Andrew R. Pleszkun |
Confidence Estimation for Speculation Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 25th Annual International Symposium on Computer Architecture, ISCA 1998, Barcelona, Spain, June 27 - July 1, 1998, pp. 122-131, 1998, IEEE Computer Society, 0-8186-8491-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
74 | Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi |
Dynamic Speculation and Synchronization of Data Dependences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 24th International Symposium on Computer Architecture, Denver, Colorado, USA, June 2-4, 1997, pp. 181-193, 1997, ACM, 0-89791-901-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
73 | Prakash Prabhu, Ganesan Ramalingam, Kapil Vaswani |
Safe programmable speculative parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 2010 ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2010, Toronto, Ontario, Canada, June 5-10, 2010, pp. 50-61, 2010, ACM, 978-1-4503-0019-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
purity, rollback freedom, safety, speculative parallelism, value speculation |
70 | Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky |
Speculation in elastic systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 292-295, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
elastic designs, protocols, synthesis, speculation |
70 | Patrick Akl, Andreas Moshovos |
BranchTap: improving performance with very few checkpoints through adaptive speculation control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006, pp. 36-45, 2006, ACM, 1-59593-282-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
speculation control, state checkpointing, state recovery, branch misprediction |
68 | Weidong Shi, Hsien-Hsin S. Lee |
Accelerating memory decryption and authentication with frequent value prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007, pp. 35-46, 2007, ACM, 978-1-59593-683-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
message authentication, value prediction, secure processors |
68 | Arun Kejariwal, Xinmin Tian, Wei Li 0015, Milind Girkar, Sergey Kozhukhov, Hideki Saito 0001, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006, pp. 24, 2006, ACM, 1-59593-282-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
DOALL loops, value dependence, performance evaluation, data dependence, speculative execution, control dependence |
68 | Kevin B. Theobald, Guang R. Gao, Laurie J. Hendren |
Speculative Execution and Branch Prediction on Parallel Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 7th international conference on Supercomputing, ICS 1993, Tokyo, Japan, July 20-22, 1993, pp. 77-86, 1993, ACM, 0-89791-600-X. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
64 | Arun Kejariwal, Xinmin Tian, Milind Girkar, Wei Li 0015, Sergey Kozhukhov, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
Tight analysis of the performance potential of thread speculation using spec CPU 2006. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 12th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2007, San Jose, California, USA, March 14-17, 2007, pp. 215-225, 2007, ACM, 978-1-59593-602-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
conflict probability, misspeculation penalty, threading overhead, performance evaluation, speculative execution |
64 | Rajiv Gupta 0001, David A. Berson, Jesse Zhixi Fang |
Path Profile Guided Partial Redundancy Elimination Using Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCL ![In: Proceedings of the 1998 International Conference on Computer Languages, ICCL 1998, Chicago, IL, USA, May 14-16, 1998, pp. 230-239, 1998, IEEE Computer Society, 0-8186-8454-2. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
64 | Lance Hammond, Mark Willey, Kunle Olukotun |
Data Speculation Support for a Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998., pp. 58-69, 1998, ACM Press, 1-58113-107-0. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
64 | Quinn Jacobson, Steve Bennett, Nikhil Sharma, James E. Smith 0001 |
Control Flow Speculation in Multiscalar Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), San Antonio, Texas, USA, February 1-5, 1997, pp. 218-229, 1997, IEEE Computer Society, 0-8186-7764-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
64 | Brian L. Deitrich, Wen-mei W. Hwu |
Speculative Hedge: Regulating Compile-time Speculation Against Profile Variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996, pp. 70-79, 1996, ACM/IEEE Computer Society, 0-8186-7641-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
63 | Vijay Nagarajan, Rajiv Gupta 0001 |
ECMon: exposing cache events for monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 349-360, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
cache events, recording for replay, speculation past barriers |
60 | Thirumalaisamy Ragunathan, P. Krishna Reddy |
Performance evaluation of speculation-based protocol for read-only transactions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Bangalore Compute Conf. ![In: Proceedings of the 3rd Bangalore Annual Compute Conference, Compute 2010, Bangalore, India, January 22-23, 2010, pp. 13:1-13:4, 2010, ACM, 978-1-4503-0001-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
performance evaluation, concurrency control, speculation, transaction management |
60 | Soner Önder |
Cost Effective Memory Dependence Prediction using Speculation Levels and Color Sets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 22-25 September 2002, Charlottesville, VA, USA, pp. 232-241, 2002, IEEE Computer Society, 0-7695-1620-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
load speculation, memory dependence prediction, store sets, wide issue superscalar, speculative execution |
60 | Toshinori Sato |
Data Dependence Speculation Using Data Address Prediction and its Enhancement with Instruction Reissue. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 24th EUROMICRO '98 Conference, Engineering Systems and Software for the Next Decade, 25-27 August 1998, Vesteras, Sweden, pp. 10285-10292, 1998, IEEE Computer Society, 0-8186-8646-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
dynamic speculation of data dependence, instruction reissue, instruction level parallelism, out-of-order execution, address prediction |
58 | John Whaley, Christos Kozyrakis |
Heuristics for Profile-Driven Method-Level Speculative Parallelization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 34th International Conference on Parallel Processing (ICPP 2005), 14-17 June 2005, Oslo, Norway, pp. 147-156, 2005, IEEE Computer Society, 0-7695-2380-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
55 | Daniel Luchaup, Randy Smith, Cristian Estan, Somesh Jha |
Multi-byte Regular Expression Matching with Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RAID ![In: Recent Advances in Intrusion Detection, 12th International Symposium, RAID 2009, Saint-Malo, France, September 23-25, 2009. Proceedings, pp. 284-303, 2009, Springer, 978-3-642-04341-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel pattern matching, speculative pattern matching, multi-byte, multi-byte matching, regular expressions, low latency |
55 | Daniel R. Kelly, Braden J. Phillips |
Arithmetic Data Value Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 353-366, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
55 | Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, David A. Wood 0001 |
Using Speculation to Simplify Multiprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
55 | Li Li, Stephen F. Smith |
Speculation Agents for Dynamic Multi-Period Continuous Double Auctions in B2B Exchanges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 37th Hawaii International Conference on System Sciences (HICSS-37 2004), CD-ROM / Abstracts Proceedings, 5-8 January 2004, Big Island, HI, USA, 2004, IEEE Computer Society, 0-7695-2056-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
55 | Uma Mahadevan, Kevin Nomura, Roy Dz-Ching Ju, Rick Hank |
Applying Data Speculation in Modulo Scheduled Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania, USA, October 15-19, 2000, pp. 169-178, 2000, IEEE Computer Society, 0-7695-0622-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
54 | Nana B. Sam, Martin Burtscher |
On the energy-efficiency of speculative hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 361-370, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
energy-performance metric, energy-efficiency, speculation |
54 | Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler |
Scalable selective re-execution for EDGE architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2004, Boston, MA, USA, October 7-13, 2004, pp. 120-132, 2004, ACM, 1-58113-804-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
EDGE architectures, load-store dependence prediction, mis-speculation recovery, selective re-execution, selective replay, speculative dataflow machines |
50 | Fredrik Warg, Per Stenström |
Dual-thread Speculation: A Simple Approach to Uncover Thread-level Parallelism on a Simultaneous Multithreaded Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 36(2), pp. 166-183, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Computer architecture, Chip multiprocessors, Thread-level speculation, Thread-level parallelism, Simultaneous multithreading |
50 | Lei Gao, Zhenghu Gong, Yaping Liu, Ming-che Lai, Wei Peng 0005 |
A TLP approach for BGP based on local speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 51(11), pp. 1772-1784, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
local speculation, parallelism, multi-core, BGP |
50 | Braxton Thomason, Craig Chase |
Partially ordered epochs for thread-level speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 299-306, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
partially-ordered threads, automatic parallelization, thread-level speculation |
50 | Ken Horie, Takashi Matsuhisa |
No Speculation under Expectations in Awareness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science ![In: Computational Science - ICCS 2004, 4th International Conference, Kraków, Poland, June 6-9, 2004, Proceedings, Part IV, pp. 915-922, 2004, Springer, 3-540-22129-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Pure exchange economy, No speculation, Expectations equilibrium, Ex-ante Pareto optimum, Awareness, Belief |
50 | J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry |
Improving Value Communication for Thread-Level Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February 2-6, 2002, pp. 65-75, 2002, IEEE Computer Society, 0-7695-1525-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
parallelization, multithreaded, Speculation, value prediction |
48 | Colin Blundell, Milo M. K. Martin, Thomas F. Wenisch |
InvisiFence: performance-transparent memory ordering in conventional multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 233-244, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel programming, memory consistency |
48 | Butler W. Lampson |
Lazy and speculative execution in computer systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFP ![In: Proceeding of the 13th ACM SIGPLAN international conference on Functional programming, ICFP 2008, Victoria, BC, Canada, September 20-28, 2008, pp. 1-2, 2008, ACM, 978-1-59593-919-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
lazy evaluation |
45 | Pedro Marcuello, Antonio González 0001 |
Clustered speculative multithreaded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 13th international conference on Supercomputing, ICS 1999, Rhodes, Greece, June 20-25, 1999, pp. 365-372, 1999, ACM, 1-58113-164-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
control-flow speculation, data value speculation, simultaneous multithreaded processors, dynamically scheduled processors, data dependance speculation, clustered processors |
45 | Pedro Marcuello, Antonio González 0001, Jordi Tubella |
Speculative Multithreaded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 12th international conference on Supercomputing, ICS 1998, Melbourne, Australia, July 13-17, 1998, pp. 77-84, 1998, ACM, 0-89791-998-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
multithreaded processors, data speculation, dynamically scheduled processors, data dependence speculation, control speculation |
45 | Satish Pillai, Margarida F. Jacome |
Predicated switching - optimizing speculation on EPIC machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(3), pp. 318-335, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Takashi Yokota, Moriyuki Saito, Fumihito Furukawa, Kanemitsu Ootsu, Takanobu Baba |
Two-Path Limited Speculation Method for Static/Dynamic Optimization in Multithreaded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDCAT ![In: Sixth International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2005), 5-8 December 2005, Dalian, China, pp. 46-50, 2005, IEEE Computer Society, 0-7695-2405-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Enric Morancho, José María Llabería, Àngel Olivé |
A Mechanism for Verifying Data Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2004 Parallel Processing, 10th International Euro-Par Conference, Pisa, Italy, August 31-September 3, 2004, Proceedings, pp. 525-534, 2004, Springer, 3-540-22924-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
45 | Hideyuki Miura, Luong Dinh Hung, Chitaka Iwama, Daisuke Tashiro, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka |
Compiler-Assisted Thread Level Control Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2003. Parallel Processing, 9th International Euro-Par Conference, Klagenfurt, Austria, August 26-29, 2003. Proceedings, pp. 603-608, 2003, Springer, 3-540-40788-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
45 | Andreas Moshovos, Gurindar S. Sohi |
Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, Toulouse, France, January 8-12, 2000, pp. 301-312, 2000, IEEE Computer Society, 0-7695-0550-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Scheduling, Cache, Memory, Instruction Level Parallelism |
45 | Rafael A. Moreno, Luis Piñuel, Silvia Del Pino, Francisco Tirado |
Power-Efficient Value Speculation for High-Performance Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 26th EUROMICRO 2000 Conference, Informatics: Inventing the Future, 5-7 September 2000, Maastricht, The Netherlands, pp. 1292-1299, 2000, IEEE Computer Society, 0-7695-0780-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Haibo Chen 0001, Liwei Yuan, Xi Wu 0001, Binyu Zang, Bo Huang 0002, Pen-Chung Yew |
Control flow obfuscation with information flow tracking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 391-400, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
control flow obfuscation, opaque predicate, information flow tracking, control speculation |
44 | Lukasz Ziarek, Suresh Jagannathan, Matthew Fluet, Umut A. Acar |
Speculative N-Way barriers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAMP ![In: Proceedings of the POPL 2009 Workshop on Declarative Aspects of Multicore Programming, DAMP 2009, Savannah, GA, USA, January 20, 2009, pp. 1-12, 2009, ACM, 978-1-60558-417-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
fork/join execution, n-way barriers, speculation, multi-threaded programs |
44 | Krishna M. Kavi, Wentong Li, Ali R. Hurson |
A Non-blocking Multithreaded Architecture with Support for Speculative Threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA3PP ![In: Algorithms and Architectures for Parallel Processing, 8th International Conference, ICA3PP 2008, Cyprus, June 9-11, 2008, Proceedings, pp. 173-184, 2008, Springer, 978-3-540-69500-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Cache Coherency, Thread Level Speculation, Multithreaded Architectures, Decoupled Architecture |
44 | Jin Lin, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai |
Recovery code generation for general speculative optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 3(1), pp. 67-89, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Recovery code, multi-level data speculation, speculative SSA form |
44 | Fredrik Warg, Per Stenström |
Reducing misspeculation overhead for module-level speculative execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 289-298, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
misspeculation prediction, module-level parallelism, performance evaluation, chip multiprocessors, thread-level speculation |
44 | Fredrik Warg, Per Stenström |
Improving Speculative Thread-Level Parallelism Through Module Run-Length Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 12, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
module-level parallelism, module run-length prediction, performance evaluation, Multiprocessors, thread-level speculation |
41 | John Sartori, Rakesh Kumar 0002 |
Overscaling-friendly timing speculation architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 209-214, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
stochastic processors, timing speculation, adaptability |
41 | Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito 0001, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos |
On the efficacy of call graph-level thread-level speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WOSP/SIPEW ![In: Proceedings of the first joint WOSP/SIPEW International Conference on Performance Engineering, San Jose, California, USA, January 28-30, 2010, pp. 247-248, 2010, ACM, 978-1-60558-563-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
performance, thread-level speculation |
41 | Polychronis Xekalakis, Nikolas Ioannou, Marcelo Cintra |
Combining thread level speculation helper threads and runahead execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 410-420, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
multi-cores, thread-level speculation, helper threads, runahead execution |
41 | Cosmin E. Oancea, Alan Mycroft, Tim Harris 0001 |
A lightweight in-place implementation for software thread-level speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2009: Proceedings of the 21st Annual ACM Symposium on Parallelism in Algorithms and Architectures, Calgary, Alberta, Canada, August 11-13, 2009, pp. 223-232, 2009, ACM, 978-1-60558-606-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
roll-back, thread-level speculation (tls) |
41 | Thirumalaisamy Ragunathan, P. Krishna Reddy |
Improving the Performance of Read-Only Transactions Through Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DNIS ![In: Databases in Networked Information Systems, 5th International Workshop, DNIS 2007, Aizu-Wakamatsu, Japan, October 17-19, 2007, Proceedings, pp. 203-221, 2007, Springer, 978-3-540-75511-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Transaction processing, Serializability, Speculation, Read-Only Transactions |
41 | Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, Uma Srinivasan 0003, Craig B. Zilles |
Hardware atomicity for reliable software speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 174-185, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Java, optimization, checkpoint, atomicity, speculation, isolation |
41 | Jose Renau, Karin Strauss, Luis Ceze, Wei Liu 0014, Smruti R. Sarangi, James Tuck 0001, Josep Torrellas |
Energy-Efficient Thread-Level Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(1), pp. 80-91, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
out-of-order task spawning, chip multiprocessors, Thread-level speculation |
41 | J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry |
The STAMPede approach to thread-level speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 23(3), pp. 253-300, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cache coherence, automatic parallelization, Thread-level speculation, chip-multiprocessing |
41 | Michael Kistler, Lorenzo Alvisi |
Improving the Performance of Software Distributed Shared Memory with Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 16(9), pp. 885-896, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
protocol design and analysis, Distributed shared memory, speculation |
41 | María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas |
Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 2(3), pp. 247-279, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Caching and buffering support, memory hierarchies, shared-memory multiprocessors, thread-level speculation, coherence protocol |
41 | Manohar K. Prabhu, Kunle Olukotun |
Using thread-level speculation to simplify manual parallelization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2003, June 11-13, 2003, San Diego, CA, USA, pp. 1-12, 2003, ACM, 1-58113-588-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
feedback-driven optimization, manual parallel programming, chip multiprocessor, multithreading, data speculation |
41 | P. Krishna Reddy, Masaru Kitsuregawa |
Speculation Based Nested Locking Protocol to Increase the Concurrency of Nested Transactions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IDEAS ![In: 2000 International Database Engineering and Applications Symposium, IDEAS 2000, September 18-20, 2000, Yokohoma, Japan, Proccedings, pp. 296-305, 2000, IEEE Computer Society, 0-7695-0789-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
speculation based nested locking protocol, inter-transaction concurrency, nested locking protocol, SNL protocol, sub-transaction, after-image, multiple executions, main memory resources, concurrency control, speculative executions, nested transactions, data object, concurrency control protocol |
41 | Chao-ying Fu, Matthew D. Jennings, Sergei Y. Larin, Thomas M. Conte |
Value Speculation Scheduling for High Performance Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998., pp. 262-271, 1998, ACM Press, 1-58113-107-0. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
VLIW instruction schedulings, instruction level parallelism, value prediction, value speculation |
41 | Yiannakis Sazeides, Stamatis Vassiliadis, James E. Smith 0001 |
The Performance Potential of Data Dependence Speculation & Collapsing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996, pp. 238-247, 1996, ACM/IEEE Computer Society, 0-8186-7641-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
address generation-load dependences, address prediction rate, base instruction level parallel machine, dependence collapsing, performance potential, true data dependences, parallel programming, trace-driven simulation, data dependence speculation, address prediction |
40 | Gary S. Tyson, Todd M. Austin |
Improving the Accuracy and Performance of Memory Communication Through Renaming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 218-227, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
data fetching, data value speculation, heap segment, instruction loading, memory access latency, memory communication, memory references, memory renaming, memory segments, processor pipeline, register access techniques, stores, performance, delays, accuracy, instruction-level parallelism, execution time, storage allocation, data dependence speculation, address calculation |
39 | Cristian Tapus, Jason Hickey |
Distributed speculative execution for reliability and fault tolerance: an operational semantics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Distributed Comput. ![In: Distributed Comput. 21(6), pp. 433-455, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Fault tolerance, Distributed systems, Transactions, Operational semantics, Speculations |
39 | Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu |
Improving Energy Efficiency Via Speculative Multithreading on MultiCore Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 553-562, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Lim, Tin-Fook Ngai |
Speculative Parallel Threading Architecture and Compilation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 34th International Conference on Parallel Processing Workshops (ICPP 2005 Workshops), 14-17 June 2005, Oslo, Norway, pp. 285-294, 2005, IEEE Computer Society, 0-7695-2381-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
39 | David N. Armstrong, Hyesoon Kim, Onur Mutlu, Yale N. Patt |
Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 4-8 December 2004, Portland, OR, USA, pp. 119-128, 2004, IEEE Computer Society, 0-7695-2126-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
39 | Seng Chuan Tay, Yong Meng Teo |
Performance Optimization of Throttled Time-Warp Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 34th Annual Simulation Symposium (SS 2001), Seattle, WA, USA, 22-26 April 2001, pp. 211-218, 2001, IEEE Computer Society, 0-7695-1092-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
performance modeling and optimization, probabilistic model, opportunity cost |
39 | Jonathan Vos Post, Kirk L. Kroeker |
Writing the Future: Computers in Science Fiction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 33(1), pp. 29-37, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Rajiv Gupta 0001, David A. Berson, Jesse Zhixi Fang |
Resource-Sensitive Profile-Directed Data Flow Analysis for Code Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 358-368, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
aggressive code motion, data flow algorithms, functional unit resources, instruction reordering, partial dead code elimination, resource-sensitive profile-directed data flow analysis, optimization, data flow analysis, instruction schedulers, code optimization, partial redundancy elimination, resource availability |
35 | Chang Joo Lee, Hyesoon Kim, Onur Mutlu, Yale N. Patt |
Performance-aware speculation control using wrong path usefulness prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 16-20 February 2008, Salt Lake City, UT, USA, pp. 39-49, 2008, IEEE Computer Society, 978-1-4244-2070-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Kirk Kelsey, Chengliang Zhang, Chen Ding 0001 |
Fast Track: Supporting Unsafe Optimizations with Software Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 414, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Justin D. Smith, Cristian Tapus, Jason Hickey |
The Mojave Compiler: Providing Language Primitives for Whole-Process Migration and Speculation for Distributed Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Miao Wang, Rongcai Zhao, Guoming Cai |
Un-speculation in Modulo Scheduled Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IMSCCS ![In: Proceeding of the Second International Multi-Symposium of Computer and Computational Sciences (IMSCCS 2007), August 13-15, 2007, The University of Iowa, Iowa City, Iowa, USA, pp. 486-489, 2007, IEEE Computer Society, 0-7695-3039-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Ming-Ying Chung, Gianfranco Ciardo |
A dynamic firing speculation to speedup distributed symbolic state-space generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Fredrik Warg, Per Stenström |
Dual-Thread Speculation: Two Threads in the Machine are Worth Eight in the Bush. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 18th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2006), 17-20 October 2006, Ouro Preto, Minas Gerais, Brazil, pp. 91-98, 2006, IEEE Computer Society, 0-7695-2704-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Xianfeng Li, Tulika Mitra, Abhik Roychoudhury |
Modeling Control Speculation for Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 29(1), pp. 27-58, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
micro-architectural modeling, worst case execution time, branch prediction, schedulability analysis, instruction cache |
35 | Rahul Nagpal, Anasua Bhowmik |
Criticality Driven Energy Aware Speculation for Speculative Multithreaded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2005, 12th International Conference, Goa, India, December 18-21, 2005, Proceedings, pp. 19-28, 2005, Springer, 3-540-30936-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Rahul Nagpal, Anasua Bhowmik |
Criticality Based Speculation Control for Speculative Multithreaded Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPT ![In: Advanced Parallel Processing Technologies, 6th International Workshop, APPT 2005, Hong Kong, China, October 27-28, 2005, Proceedings, pp. 31-40, 2005, Springer, 3-540-29639-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Shengyue Wang, Xiaoru Dai, Kiran Yellajyosula, Antonia Zhai, Pen-Chung Yew |
Loop Selection for Thread-Level Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers, pp. 289-303, 2005, Springer, 978-3-540-69329-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Tali Moreshet, R. Iris Bahar |
Effects of speculation on performance and issue queue design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(10), pp. 1123-1126, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Keqiang Wu, David J. Lilja |
Self-tuning Speculation for Maintaining the Consistency of Client-Cached Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 10th International Conference on Parallel and Distributed Systems, ICPADS 2004, Newport Beach, CA, USA, July 7-9, 2004, pp. 91-100, 2004, IEEE Computer Society, 0-7695-2152-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Satish Pillai, Margarida F. Jacome |
Compiler-Directed ILP Extraction for Clustered VLIW/EPIC Machines: Predication, Speculation and Modulo Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10422-10427, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Ying Chen, Resit Sendag, David J. Lilja |
Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 76, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
superthreaded architecture, wrong-thread executioin, wrong-path execution, wrong execution cache (WEC), data prefetch, multithreaded processor |
35 | Stevan A. Vlaovic, Edward S. Davidson |
Boosting trace cache performance with nonhead miss speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 16th international conference on Supercomputing, ICS 2002, New York City, NY, USA, June 22-26, 2002, pp. 179-188, 2002, ACM, 1-58113-483-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
optimization, branch prediction, trace cache, x86 |
35 | Erik M. Nystrom, Ronald D. Barnes, Matthew C. Merten, Wen-mei W. Hwu |
Code Reordering and Speculation Support for Dynamic Optimization System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 8-12 September 2001, Barcelona, Spain, pp. 163-174, 2001, IEEE Computer Society, 0-7695-1363-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
35 | Toshinori Sato |
Decoupling Recovery Mechanism for Data Speculation from Dynamic Instruction Scheduling Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31 - September 3, 1999, Proceedings, pp. 1281-1290, 1999, Springer, 3-540-66443-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
35 | José González 0002, Antonio González 0001 |
Memory Address Prediction for Data Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par '97 Parallel Processing, Third International Euro-Par Conference, Passau, Germany, August 26-29, 1997, Proceedings, pp. 1084-1091, 1997, Springer, 3-540-63440-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
34 | Arun Raman, Hanjun Kim 0001, Thomas R. Mason, Thomas B. Jablin, David I. August |
Speculative parallelization using software multi-threaded transactions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2010, Pittsburgh, Pennsylvania, USA, March 13-17, 2010, pp. 65-76, 2010, ACM, 978-1-60558-839-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multi-threaded transactions, automatic parallelization, software transactional memory, thread-level speculation, loop-level parallelism, pipelined parallelism |
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