Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
85 | Nobuo Funabiki, Seishi Nishikawa |
A neural network model for multilayer topological via minimization in a switchbox. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(8), pp. 1012-1020, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
75 | Jens Lienig |
Channel and Switchbox Routing with Minimized Crosstalk - A Parallel Genetic Algorithm Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 27-31, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
minimized crosstalk, interconnection routing, interconnection crosstalk, VLSI channel routing, VLSI switchbox routing, distributed workstation network, VLSI, VLSI design, parallel genetic algorithm |
66 | Stephan Hartmann 0003, Markus W. Schäffter, Andreas S. Schulz |
Switchbox Routing in VLSI Design: Closing the Complexity Gap. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WG ![In: Graph-Theoretic Concepts in Computer Science, 22nd International Workshop, WG '96, Cadenabbia (Como), Italy, June 12-14, 1996, Proceedings, pp. 196-210, 1996, Springer, 3-540-62559-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
66 | Tae Won Cho, Sam S. Pyo, J. Robert Heath |
PARALLEX: a parallel approach to switchbox routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(6), pp. 684-693, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
66 | Tong Gao, C. L. Liu 0001 |
Minimum crosstalk switchbox routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 1994, pp. 610-615, 1994, IEEE Computer Society / ACM, 0-89791-690-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
66 | Pierre-François Dubois, Alain Puissochet, Anne-Marie Tagant |
A general and flexible switchbox router: CARIOCA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(12), pp. 1307-1317, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
66 | Michael Kaufmann 0001 |
Allowing overlaps makes switchbox layouts nice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPDP ![In: Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, SPDP 1990, Dallas, Texas, USA, December 9-13, 1990., pp. 267-274, 1990, IEEE Computer Society, 0-8186-2087-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
66 | James P. Cohoon, Patrick L. Heck |
BEAVER: a computational-geometry-based tool for switchbox routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(6), pp. 684-697, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
66 | Michael Kaufmann 0001, Kurt Mehlhorn |
Routing Through a Generalized Switchbox. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 12th Colloquium, Nafplion, Greece, July 15-19, 1985, Proceedings, pp. 328-337, 1985, Springer, 3-540-15650-X. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
57 | Matthias F. M. Stallmann, Thomas A. Hughes, Wentai Liu |
Unconstrained via minimization for topological multilayer routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(9), pp. 970-980, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
57 | Steven T. Healey, William J. Kubitz |
Abstract Routing of Logic Networks for Custom Module Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28 - July 1, 1987., pp. 230-236, 1987, IEEE Computer Society Press / ACM. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
47 | Sandip Das 0001, Susmita Sur-Kolay, Bhargab B. Bhattacharya |
Routing of L-Shaped Channels, Switchboxes and Staircases in Manhattan-Diagonal Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 65-, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
nonslicible floorplan, switchbox, Manhattan-diagonal model, channel, VLSI routing |
47 | Masahiro Nagamatu, Shakeel Ismail, Torao Yanaru |
Lagrangian method for wire routing of layout design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ANNES ![In: 2nd New Zealand Two-Stream International Conference on Artificial Neural Networks and Expert Systems (ANNES '95), November 20-23, 1995, Dunedin, New Zealand, pp. 350-354, 1995, IEEE Computer Society, 0-8186-7174-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
wire routing, layout design, LSI layout design, continuous valued constrained optimization problem, continuous valued wires, dynamic equations, small switchbox routing problems, rip-up reroute maze router, neural nets, network routing, circuit layout CAD, circuit optimisation, integrated circuit layout, large scale integration, neurocomputing, Lagrangian method |
47 | Akinori Kanasugi, Takashi Shimayama, Naoshi Nakaya, Takeshi Iizuka |
A Genetic Algorithm for Switchbox Routing Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Rough Sets and Current Trends in Computing ![In: Rough Sets and Current Trends in Computing, First International Conference, RSCTC'98, Warsaw, Poland, June 22-26, 1998, Proceedings, pp. 247-254, 1998, Springer, 3-540-64655-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
47 | Sabih H. Gerez, Otto E. Herrmann |
Switchbox routing by stepwise reshaping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(12), pp. 1350-1361, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
28 | Hasan Arslan, Shantanu Dutt |
An effective hop-based detailed router for FPGAs for optimizing track usage and circuit performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 208-213, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
bump and refit paradigm, bumping cost, hop-based routing, switchbox, FPGAs, detailed routing, MST |
28 | Shantanu Dutt, Vinay Verma, Hasan Arslan |
A search-based bump-and-refit approach to incremental routing for ECO applications in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 7(4), pp. 664-693, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Bump-and-refit (B&R) paradigm, ECO (engineering change order), bumping cost, incremental routing, switchbox, field programmable gate arrays, dynamic programming, global routing, detailed routing |
28 | Tim Lackorzynski, Philipp Rietzsch, Stefan Köpsell |
Switchbox - Low-latency Fail-safe Assurance of Availability in Industrial Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIT ![In: 2020 IEEE International Conference on Industrial Technology, ICIT 2020, Buenos Aires, Argentina, February 26-28, 2020, pp. 328-333, 2020, IEEE, 978-1-7281-5754-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
28 | Marzieh Morshedzadeh, Ali Jahanian 0001, Payam Pourashraf |
Three-dimensional switchbox multiplexing in emerging 3D-FPGAs to reduce chip footprint and improve TSV usage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 50, pp. 81-90, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
28 | M. S. Sangeetha, N. M. Nandhitha |
Impact of distance on the hotspot temperature in thermal image for condition monitoring of UPS switchbox. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Adv. Intell. Paradigms ![In: Int. J. Adv. Intell. Paradigms 7(1), pp. 74-81, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
28 | Bahman Afsari, Elana J. Fertig, Donald Geman, Luigi Marchionni |
switchBox: an R package for k-Top Scoring Pairs classifier development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Bioinform. ![In: Bioinform. 31(2), pp. 273-274, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
28 | Matthew Mayhew, Radu Muresan |
Integrated capacitor switchbox for security protection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012, pp. 1452-1455, 2012, IEEE, 978-1-4673-0218-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
28 | Dávid Szeszlér |
Additive Approximation for Layer Minimization of Manhattan Switchbox Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Electron. Notes Discret. Math. ![In: Electron. Notes Discret. Math. 36, pp. 1097-1104, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
28 | Maolin Tang |
A Cooperative Approach to Switchbox Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Comput. Their Appl. ![In: Int. J. Comput. Their Appl. 11(4), pp. 215-223, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
28 | Frank Schmiedle, Daniel Unruh, Bernd Becker 0001 |
Exact switchbox routing with search space reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2000 International Symposium on Physical Design, ISPD 2000, San Diego, CA, USA, April 9-12, 2000, pp. 26-32, 2000, ACM, 1-58113-191-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
28 | Stephan Hartmann 0003, Markus W. Schäffter, Andreas S. Schulz |
Switchbox Routing in VLSI Design: Closing the Complexity Gap. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 203(1), pp. 31-49, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
28 | Jens Lienig, Krishnaiyan Thulasiraman |
Gasbor: a Genetic Algorithm Approach for Solving the switchbox Routing Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 6(4), pp. 359-374, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
28 | Endre Boros, András Recski, Ferenc Wettl |
Unconstrained multilayer switchbox routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Oper. Res. ![In: Ann. Oper. Res. 58(7), pp. 481-491, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
28 | Tong Gao, C. L. Liu 0001 |
Minimum crosstalk switchbox routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 19(3), pp. 161-180, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
28 | Xiaoyu Song |
An efficient DM switchbox router. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microprogramming ![In: Microprocess. Microprogramming 40(6), pp. 439-446, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
28 | Jens Lienig, Krishnaiyan Thulasiraman |
GASBOR: A Genetic Algorithm for Switchbox Routing in Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evo Workshops ![In: Process in Evolutionary Computation, AI'93 and AI'94 Workshops on Evolutionary Computation, Melbourne, Victoria, Australia, November 16, 1993, Armidale, NSW, Australia, November 21-22, 1994, Selected Papers, pp. 187-200, 1994, Springer, 3-540-60154-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
28 | Jon Hamkins, Donna J. Brown |
Switchbox routing with movable terminals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: Third Great Lakes Symposium on Design Automation of High Performance VLSI Systems, Kalamazoo, MI, USA, March 5-6, 1993, pp. 57-61, 1993, IEEE, 0-8186-3430-8. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
28 | Tae Won Cho, Sam S. Pyo, J. Robert Heath |
A new conflict resolving switchbox router. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: Proceedings of the Second Great Lakes Symposium on VLSI, Kalamazoo, MI, USA, February 28-29, 1992, pp. 95-102, 1992, IEEE, 0-8186-2610-0. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
28 | Yang Cai 0003, Martin D. F. Wong |
Channel/switchbox definition for VLSI building-block layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(12), pp. 1485-1493, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
28 | M. Starkey, Tony M. Carter |
Switchbox Routing by Pattern Matching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI ![In: VLSI 91, Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22 August, 1991, pp. 337-346, 1991, North-Holland, 0-444-89019-X. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP BibTeX RDF |
|
28 | S. Miriyala, Jahangir A. Hashmi, Naveed A. Sherwani |
Switchbox Steiner Tree Problem in Presence of Obstacles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 1991 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1993, Santa Clara, CA, USA, November 11-14, 1991. Digest of Technical Papers, pp. 536-539, 1991, IEEE Computer Society, 0-8186-2157-5. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
28 | Majid Sarrafzadeh |
Area Minimization in a Three-Sided Switchbox by Sliding the Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(11), pp. 1395-1403, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
28 | Yang Cai 0003, D. F. Wong 0001 |
A Channel/Switchbox Definition Algorithm for Building-Block Layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 638-641, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
28 | Kok-Phuang Tan, Tiow Seng Tan |
Switchbox routing using score function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 8(1), pp. 17-39, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
28 | Michael Kaufmann 0001, Kurt Mehlhorn |
Routing Through a Generalized Switchbox. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Algorithms ![In: J. Algorithms 7(4), pp. 510-531, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
|
28 | Gordon T. Hamachi, John K. Ousterhout |
A switchbox router with obstacle avoidance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 21st Design Automation Conference, DAC '84, Albuquerque, New Mexico, June 25-27, 1984, pp. 173-179, 1984, ACM/IEEE, 0-8186-0542-1. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP BibTeX RDF |
|
19 | Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin |
Physical Design of FPGA Interconnect to Prevent Information Leakage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings, pp. 87-98, 2008, Springer, 978-3-540-78609-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Sandip Das 0001, Susmita Sur-Kolay, Bhargab B. Bhattacharya |
Manhattan-diagonal routing in channels and switchboxes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 9(1), pp. 75-104, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Manhattan routing, channel density, diagonal wires |
19 | Le-Chin Eugene Liu, Hsiao-Ping Tseng, Carl Sechen |
Chip-level area routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 1998 International Symposium on Physical Design, ISPD 1998, Monterey, CA, USA, April 6-8, 1998, pp. 197-204, 1998, ACM, 1-58113-021-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
19 | Jin-Tai Yan, Pei-Yung Hsiao |
Minimizing the number of switchboxes for region definition and ordering assignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(3), pp. 336-347, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
19 | Tai-Tsung Ho, S. Sitharama Iyengar, Si-Qing Zheng |
A general greedy channel routing algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(2), pp. 204-211, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
19 | Godfried M. Swinkels, Louis J. Hafer |
Schematic generation with an expert system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(12), pp. 1289-1306, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
19 | Bryan Preas |
Channel routing with non-terminal doglegs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: European Design Automation Conference, EURO-DAC 1990, Glasgow, Scotland, UK, March 12-15, 1990, pp. 451-458, 1990, IEEE Computer Society, 0-8186-2024-2. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
19 | Fillia Makedon, Malgorzata Marek-Sadowska |
Analysis of Heuristic Reasoning for the Visualization of CAD Quadratic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAL ![In: Computer Assisted Learning, 2nd International Conference, ICCAL '89, Dallas, Texas, USA, May 9-11, 1989, Proceedings, pp. 359-378, 1989, Springer, 3-540-51142-3. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
19 | Mehdi R. Zargham |
Parallel Channel Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 25th ACM/IEEE Conference on Design Automation, DAC '88, Anaheim, CA, USA, June 12-15, 1988., pp. 128-133, 1988, ACM. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP BibTeX RDF |
|