Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
152 | Nripendra N. Biswas, C. Srikanth, James Jacob |
Cubical CAMP for minimization of Boolean functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 264-269, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
cubical CAMP algorithm, single Boolean function, QCAMP, UNATE TEST, cyclic function, prime cubes, Achilles heel function, Boolean functions, minimization, minimisation of switching nets, BISECT, unate function |
79 | Patrick C. McGeer, Robert K. Brayton |
Timing Analysis in Precharge/Unate Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 124-129, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
70 | Debasis Samanta, Nishant Sinha 0001, Ajit Pal |
Synthesis of High Performance Low Power Dynamic CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 99-104, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
62 | Uwe Sparmann, Holger Müller, Sudhakar M. Reddy |
Minimal Delay Test Sets for Unate Gate Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 5th Asian Test Symposium (ATS '96), November 20-22, 1996, Hsinchu, Taiwan, pp. 155-, 1996, IEEE Computer Society, 0-8186-7478-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
58 | Hafizur Rahaman 0001, Debesh K. Das, Bhargab B. Bhattacharya |
Implementing Symmetric Functions with Hierarchical Modules for Stuck-At and Path-Delay Fault Testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 22(2), pp. 125-142, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
universal tests, stuck-at fault, path-delay fault, synthesis-for-testability, unate function, symmetric boolean function |
51 | Seiko Ichikawa, Katsumi Suekuni, Masatoshi Ishimaru, Hiroyuki Nakatani, Takao Unate, Akira Nakasuga |
Investigation of Cell-Gap Defects Using Gap Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 89-C(10), pp. 1390-1394, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
50 | Jianlin Qiu, Xiang Gu 0001, Fen Li, Dan Ji, Peng He |
Minimization Algorithm of Unate Logic Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: 10th IEEE International Conference on Computer and Information Technology, CIT 2010, Bradford, West Yorkshire, UK, June 29-July 1, 2010, pp. 2940-2945, 2010, IEEE Computer Society, 978-0-7695-4108-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Unate Logic Functions, Complement Sets, Essential Prime Implicants, Algorithm, Minimization |
50 | Xiao Yu Li, Matthias F. M. Stallmann, Franc Brglez |
Effective bounding techniques for solving unate and binate covering problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 385-390, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
binate, unate, satisfiability, branch and bound, covering |
50 | Tsutomu Sasao, Kozo Kinoshita |
On the Number of Fanout-Free Functions and Unate Cascade Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 28(1), pp. 66-72, 1979. The full citation details ...](Pics/full.jpeg) |
1979 |
DBLP DOI BibTeX RDF |
disjunctive networks, enumeration of equivalence classes, enumeration of switching functions, fanout-free function, Cascade, threshold function, unate function |
44 | Roberto Cordone, Fabrizio Ferrandi, Donatella Sciuto, Roberto Wolfler Calvo |
An efficient heuristic approach to solve the unate covering problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(12), pp. 1377-1388, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
44 | Evguenii I. Goldberg, Luca P. Carloni, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
Negative thinking in branch-and-bound: the case of unate covering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(3), pp. 281-294, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Roberto Cordone, Fabrizio Ferrandi, Donatella Sciuto, Roberto Wolfler Calvo |
An Efficient Heuristic Approach to Solve the Unate Covering Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 364-371, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Priyank Kalla, Zhihong Zeng, Maciej J. Ciesielski, ChiLai Huang |
A BDD-Based Satisfiability Infrastructure Using the Unate Recursive Paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 232-236, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Evguenii I. Goldberg, Luca P. Carloni, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
Negative thinking by incremental problem solving: application to unate covering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 91-98, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
negative thinking, discrete optimization, covering problem |
41 | Byunghyun Lee, Ki-Seok Chung, Bontae Koo, Nak-Woong Eum, Taewhan Kim |
Thermal sensor allocation and placement for reconfigurable systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(4), pp. 50:1-50:23, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
optimal placement, unate-covering problem, reconfigurable system, Thermal sensor |
35 | Xiao-dong Sun, Hong-Bin Zhang |
A Fast Hole-filling Strategy of 3D Scanned Human Body. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGIV ![In: Sixth International Conference on Computer Graphics, Imaging and Visualization: New Advances and Trends, CGIV 2009, 11-14 August 2009, Tianjin, China, pp. 270-275, 2009, IEEE Computer Society, 978-0-7695-3789-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
35 | Hafizur Rahaman 0001, Debesh K. Das |
A Simple Delay Testable Synthesis of Symmetric Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AACC ![In: Applied Computing, Second Asian Applied Computing Conference, AACC 2004, Kathmandu, Nepal, October 29-31, 2004. Proceedings, pp. 263-270, 2004, Springer, 3-540-23659-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Hafizur Rahaman 0001, Debesh K. Das, Bhargab B. Bhattacharya |
Mapping Symmetric Functions to Hierarchical Modules for Path-Delay Fault Testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, pp. 284-289, 2003, IEEE Computer Society, 0-7695-1951-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Hafizur Rahaman 0001, Debesh K. Das, Bhargab B. Bhattacharya |
A New Synthesis of Symmetric Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 160-165, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Susanta Chakrabarti, Sandip Das 0001, Debesh Kumar Das, Bhargab B. Bhattacharya |
Synthesis of symmetric functions for path-delay fault testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(9), pp. 1076-1081, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
35 | Vasco M. Manquinho, João Marques-Silva 0001 |
On Using Satisfiability-Based Pruning Techniques in Covering Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 356-363, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
35 | Susanta Chakraborty, Sandip Das 0001, Debesh K. Das, Bhargab B. Bhattacharya |
Synthesis of Symmetric Functions for Path-Delay Fault Testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India, pp. 512-517, 1999, IEEE Computer Society, 0-7695-0013-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
35 | Maurizio Damiani, Jerry Chih-Yuan Yang, Giovanni De Micheli |
Optimization of combinational logic circuits based on compatible gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(11), pp. 1316-1327, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | Abdirahman Alasow, Marek A. Perkowski |
Quantum Algorithms for Unate and Binate Covering Problems with Application to Finite State Machine Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FLAP ![In: FLAP 10(6), pp. 993-1023, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP BibTeX RDF |
|
27 | Aniruddha Biswas, Palash Sarkar 0001 |
Counting unate and balanced monotone Boolean functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2304.14069, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Maurizio Damiani |
Partially unate Boolean functions: Properties of their sum-of-products representations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Appl. Math. ![In: Discret. Appl. Math. 338, pp. 278-292, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
27 | József Balogh, Dingding Dong, Bernard Lidický, Nitya Mani, Yufei Zhao |
Nearly All k-SAT Functions Are Unate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
STOC ![In: Proceedings of the 55th Annual ACM Symposium on Theory of Computing, STOC 2023, Orlando, FL, USA, June 20-23, 2023, pp. 958-962, 2023, ACM, 978-1-4503-9913-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
27 | József Balogh, Dingding Dong, Bernard Lidický, Nitya Mani, Yufei Zhao |
Nearly all k-SAT functions are unate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2209.04894, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
27 | Utkarsh Gupta, Priyank Kalla, Vikas Rao |
Boolean Gröbner Basis Reductions on Finite Field Datapath Circuits Using the Unate Cube Set Algebra. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(3), pp. 576-588, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Víctor Lavín Puente |
Learning with Queries inside the Class of Unate k-quasi-Horn Formulas. ![Search on Bibsonomy](Pics/bibsonomy.png) |
New Gener. Comput. ![In: New Gener. Comput. 33(2), pp. 137-147, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
27 | Bernd Steinbach, Christian Posthoff |
Evaluation and Optimization of GPU Based Unate Covering Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST 2015 - 15th International Conference, Las Palmas de Gran Canaria, Spain, February 8-13, 2015, Revised Selected Papers, pp. 617-624, 2015, Springer, 978-3-319-27339-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
27 | Hiroki Morizumi |
Sensitivity, Block Sensitivity, and Certificate Complexity of Unate Functions and Read-Once Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFIP TCS ![In: Theoretical Computer Science - 8th IFIP TC 1/WG 2.2 International Conference, TCS 2014, Rome, Italy, September 1-3, 2014. Proceedings, pp. 104-110, 2014, Springer, 978-3-662-44601-0. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
27 | Arighna Deb, Debesh K. Das, Hafizur Rahaman 0001, Bhargab B. Bhattacharya |
Reversible synthesis of symmetric boolean functions based on unate decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Great Lakes Symposium on VLSI 2013 (part of ECRC), GLSVLSI'13, Paris, France, May 2-4, 2013, pp. 351-352, 2013, ACM, 978-1-4503-2032-0. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
27 | Bernd Steinbach, Christian Posthoff |
Fast Calculation of Exact Minimal Unate Coverings on Both the CPU and the GPU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST (2) ![In: Computer Aided Systems Theory - EUROCAST 2013 - 14th International Conference, Las Palmas de Gran Canaria, Spain, February 10-15, 2013, Revised Selected Papers, Part II, pp. 234-241, 2013, Springer, 978-3-642-53861-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
27 | Kei Uchizawa, Eiji Takimoto, Takao Nishizeki |
Size-energy tradeoffs for unate circuits computing symmetric Boolean functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 412(8-10), pp. 773-782, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
27 | Riccardo Porreca, Eugenio Cinquemani, John Lygeros, Giancarlo Ferrari-Trecate |
Identification of genetic network dynamics with unate structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Bioinform. ![In: Bioinform. 26(9), pp. 1239-1245, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
27 | Riccardo Porreca, Eugenio Cinquemani, John Lygeros, Giancarlo Ferrari-Trecate |
Structural identification of unate-like genetic network models from time-lapse protein concentration measurements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDC ![In: Proceedings of the 49th IEEE Conference on Decision and Control, CDC 2010, December 15-17, 2010, Atlanta, Georgia, USA, pp. 2529-2534, 2010, IEEE, 978-1-4244-7745-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
27 | Hiroaki Kikuchi |
Identification of Incompletely Specified Fuzzy Unate Logic Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 31st IEEE International Symposium on Multiple-Valued Logic, ISMVL 2001, Warsaw, Poland, May 22-24, 2001, Proceedings, pp. 116-124, 2001, IEEE Computer Society, 0-7695-1083-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
27 | Luca P. Carloni, Evguenii I. Goldberg, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
Aura II: Combining Negative Thinking and Branch-and-Bound in Unate Covering Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI ![In: VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI '99), December 1-4, 1999, Lisbon, Portugal, pp. 346-361, 1999, Kluwer, 0-7923-7731-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP BibTeX RDF |
|
27 | Aaron Feigelson, Lisa Hellerstein |
Conjunctions of Unate DNF Formulas: Learning and Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Comput. ![In: Inf. Comput. 140(2), pp. 203-228, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
27 | Aaron Feigelson, Lisa Hellerstein |
The Forbidden Projections of Unate Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Appl. Math. ![In: Discret. Appl. Math. 77(3), pp. 221-236, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
27 | Aaron Feigelson, Lisa Hellerstein |
Learning Conjunctions of Two Unate DNF Formulas (Extended Abstract): Computational and Informational Results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COLT ![In: Proceedings of the Ninth Annual Conference on Computational Learning Theory, COLT 1996, Desenzano del Garda, Italy, June 28-July 1, 1996., pp. 255-265, 1996, ACM, 0-89791-811-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
27 | Sandip Kundu |
An efficient technique for obtaining unate implementation of functions through input encoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 17(3), pp. 265-270, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
27 | Shin-ichi Minato |
Calculation of Unate Cube Set Algebra Using Zero-Suppressed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 31st Conference on Design Automation, San Diego, California, USA, June 6-10, 1994., pp. 420-424, 1994, ACM Press, 0-7803-1836-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
27 | Uri Zwick |
A 4n Lower Bound on the Combinational Complexity of Certain Symmetric Boolean Functions over the Basis of Unate Dyadic Boolean Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIAM J. Comput. ![In: SIAM J. Comput. 20(3), pp. 499-505, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
27 | Yutaka Hata, Masaharu Yuhara, Fujio Miyawaki, Kazuharu Yamato |
On the Complexity of Enumerations for Multiple-Valued Kleenean Functions and Unate Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: Proceedings of the 21st International Symposium on Multiple-Valued Logic, ISMVL 1991, Victoria, BC, Canada, May 26-29, 1991, pp. 55-62, 1991, IEEE Computer Society, 0-8186-2145-1. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
27 | Vijay Pitchumani, Satish S. Soman |
Functional Test Generation Based on Unate Function Theory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(6), pp. 756-760, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
27 | D. Michael Miller, Jon C. Muzio |
Spectral Fault Signatures for Internally Unate Combinational Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(11), pp. 1058-1062, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
|
27 | André Thayse, Jean-Pierre Deschamps |
Logic Properties of Unate Discrete and Switching Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 26(12), pp. 1202-1212, 1977. The full citation details ...](Pics/full.jpeg) |
1977 |
DBLP DOI BibTeX RDF |
|
27 | Subir Bandyopadhyay, A. Pal, Arun K. Choudhury |
Characterization of Unate Cascade Realizability Using Parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 24(2), pp. 218-219, 1975. The full citation details ...](Pics/full.jpeg) |
1975 |
DBLP DOI BibTeX RDF |
|
27 | S. C. De Sarkar, Subir Bandyopadhyay, Arun K. Choudhury |
Unate Cascade Realization of Synchronous Sequential Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 23(10), pp. 1008-1019, 1974. The full citation details ...](Pics/full.jpeg) |
1974 |
DBLP DOI BibTeX RDF |
|
27 | Charles R. Baugh |
Generation of Representative Functions of the NPN Equivalence Classes of Unate Boolean Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 21(12), pp. 1373-1379, 1972. The full citation details ...](Pics/full.jpeg) |
1972 |
DBLP DOI BibTeX RDF |
|
27 | Rodolfo Betancourt |
Derivation of Minimum Test Sets for Unate Logical Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 20(11), pp. 1264-1269, 1971. The full citation details ...](Pics/full.jpeg) |
1971 |
DBLP DOI BibTeX RDF |
|
27 | William S. Matheson |
Recognition of Monotonic and Unate Cascade Realizable Functions Using an Informational Model of Switching Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 20(10), pp. 1214-1219, 1971. The full citation details ...](Pics/full.jpeg) |
1971 |
DBLP DOI BibTeX RDF |
|
27 | Jack Sklansky |
R70-16 Unate Cellular Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 19(6), pp. 566, 1970. The full citation details ...](Pics/full.jpeg) |
1970 |
DBLP DOI BibTeX RDF |
|
27 | Amar Mukhopadhyay |
Unate Cellular Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 18(2), pp. 114-121, 1969. The full citation details ...](Pics/full.jpeg) |
1969 |
DBLP DOI BibTeX RDF |
|
27 | Donald Liss |
A Test for Unate Truth Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Electron. Comput. ![In: IEEE Trans. Electron. Comput. 12(4), pp. 405, 1963. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
27 | Robert McNaughton |
Unate Truth Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRE Trans. Electron. Comput. ![In: IRE Trans. Electron. Comput. 10(1), pp. 1-6, 1961. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
23 | Debasis Samanta, Ajit Pal |
Synthesis of Dual-VT Dynamic CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 303-308, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
nora logic, unate decomposition, low power, Logic synthesis, high performance, leakage power, domino logic, dynamic circuits, dual-VT |
23 | Paulo F. Flores, Horácio C. Neto, João P. Marques Silva |
On Applying Set Covering Models to Test Set Compaction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 8-11, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Test Set Compaction, Unate Covering Problem, Test Pattern Generation, Set Covering |
23 | Yuke Wang, Carl McCrosky |
Negation Trees: A Unified Approach to Boolean Function Complementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 45(5), pp. 626-630, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
complementation algorithms, negation trees, Boolean functions, unate functions |
23 | Yue-Sun Kuo |
Generating Essential Primes for a Boolean Function with Multiple-Valued Inputs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 36(3), pp. 356-359, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
Boolean function with multiple-valued inputs, essential prime implicant, tautology checking, consensus, logic minimization, unate function |
23 | Bhargab B. Bhattacharya, Bidyut Gupta |
On the Impossible Class of Faulty Functions in Logic Networks Under Short Circuit Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 35(1), pp. 85-90, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
fan-out-free functions, N-equivalence classes, P-equivalence classes, short circuit faults, fault detection, stuck-at faults, Bridging faults, combinational logic, unate functions |
23 | Jacob Savir |
Syndrome-Testing of "Syndrome-Untestable" Combinational Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 30(8), pp. 606-608, 1981. The full citation details ...](Pics/full.jpeg) |
1981 |
DBLP DOI BibTeX RDF |
Inversion parity, reconvergent fan-out, unate function |
23 | Alexander Iosupovicz |
Optimal Detection of Bridge Faults and Stuck-At Faults in Two-Level Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 27(5), pp. 452-455, 1978. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
fault detection experiments, minimal test set, two-level logic, stuck-at faults, Bridge faults, unate functions |
23 | Dhiraj K. Pradhan |
Asynchronous State Assignments with Unateness Properties and Fault-Secure Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 27(5), pp. 396-404, 1978. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
upper bound on the number of state variables, fault-secure networks, self-checking networks, single-transition-time assignments, unate next-state functions, unidirectional faults, universal assignments, fault detection, Asynchronous networks, Berger codes, self-checking checker |
17 | Kei Uchizawa, Takao Nishizeki, Eiji Takimoto |
Size and Energy of Threshold Circuits Computing Mod Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: Mathematical Foundations of Computer Science 2009, 34th International Symposium, MFCS 2009, Novy Smokovec, High Tatras, Slovakia, August 24-28, 2009. Proceedings, pp. 724-735, 2009, Springer, 978-3-642-03815-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Byunghyun Lee, Taewhan Kim |
Optimal allocation and placement of thermal sensors for reconfigurable systems and its practical extension. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 703-707, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Franc Brglez, Jason A. Osborne |
Performance testing of combinatorial solvers with isomorph class instances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Experimental Computer Science ![In: Proceedings of the Workshop on Experimental Computer Science, Part of ACM FCRC, San Diego, CA, USA, 13-14 June 2007, pp. 13, 2007, ACM, 978-1-59593-751-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
scientific method |
17 | Leonardo Franco, José Luis Subirats, José M. Jerez |
MaxSet: An Algorithm for Finding a Good Approximation for the Largest Linearly Separable Set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICANN (1) ![In: Artificial Neural Networks - ICANN 2007, 17th International Conference, Porto, Portugal, September 9-13, 2007, Proceedings, Part I, pp. 648-656, 2007, Springer, 978-3-540-74689-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Jon T. Butler, Tsutomu Sasao, Munehiro Matsuura |
Average Path Length of Binary Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(9), pp. 1041-1053, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
average path length, worst-case path length, APL, Binary decision diagrams, BDD |
17 | Sridhar Dasika, Sarma B. K. Vrudhula, Kaviraj Chopra, R. Srinivasan |
A Framework for Battery-Aware Sensor Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 962-967, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Christian Plessl, Marco Platzner |
Instance-Specific Accelerators for Minimum Covering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 26(2), pp. 109-129, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
instance-specific acceleration, minimum covering, reconfigurable computing |
17 | Marta Arias, Roni Khardon, Rocco A. Servedio |
Polynomial Certificates for Propositional Classes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COLT ![In: Computational Learning Theory and Kernel Machines, 16th Annual Conference on Computational Learning Theory and 7th Kernel Workshop, COLT/Kernel 2003, Washington, DC, USA, August 24-27, 2003, Proceedings, pp. 537-551, 2003, Springer, 3-540-40720-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Vasco M. Manquinho, João P. Marques Silva |
Search pruning techniques in SAT-based branch-and-bound algorithmsfor the binate covering problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(5), pp. 505-516, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Shin-ichi Minato |
Zero-suppressed BDDs and their applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 3(2), pp. 156-170, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Boolean function, BDD, Combinatorial problem, VLSI CAD, ZBDD |
17 | Farzan Fallah, Stan Y. Liao, Srinivas Devadas |
Solving covering problems using LPR-based lower bounds. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(1), pp. 9-17, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Uwe Sparmann, Holger Müller, Sudhakar M. Reddy |
Universal delay test sets for logic networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 7(2), pp. 156-166, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Takashi Horiyama, Toshihide Ibaraki |
Ordered Binary Decision Diagrams as Knowledge-Bases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISAAC ![In: Algorithms and Computation, 10th International Symposium, ISAAC '99, Chennai, India, December 16-18, 1999, Proceedings, pp. 83-92, 1999, Springer, 3-540-66916-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Stan Y. Liao, Srinivas Devadas |
Solving Covering Problems Using LPR-Based Lower Bounds. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997., pp. 117-120, 1997, ACM Press, 0-89791-920-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
integer linear programming, Covering problems |
17 | Beyin Chen, Chung-Len Lee 0001 |
Universal test set generation for CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 6(3), pp. 313-323, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
functional testing, automatic test generation, CMOS circuits, stuck-open faults, universal test set |
17 | Srinivas Devadas, A. Richard Newton |
Exact algorithms for output encoding, state assignment, and four-level Boolean minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(1), pp. 13-27, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
17 | Sreejit Chakravarty |
On the complexity of computing tests for CMOS gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(9), pp. 973-980, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
17 | John P. Hayes |
Enumeration of Fanout-Free Boolean Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 23(4), pp. 700-709, 1976. The full citation details ...](Pics/full.jpeg) |
1976 |
DBLP DOI BibTeX RDF |
|