Search results for "universal-logic-modules"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
42	Shashidhar Thakur, D. F. Wong 0001	On Designing ULM-based FPGA Logic Modules.	FPGA	1995	DBLP DOI BibTeX RDF
32	Rolf Drechsler, Wolfgang Günther 0001	Generation of Optimal Universal Logic Modules.	EUROMICRO	1999	DBLP DOI BibTeX RDF
32	Stephen S. Yau, Calvin K. Tang	Universal logic circuits and their modular realizations.	AFIPS Spring Joint Computing Conference	1968	DBLP DOI BibTeX RDF
28	Shashidhar Thakur, D. F. Wong 0001	Series-parallel functions and FPGA logic module design.	ACM Trans. Design Autom. Electr. Syst.	1996	DBLP DOI BibTeX RDF	series-parallel technology mapping, tree-based technology mapping algorithm, universal logic modules, field programmable gate arrays
28	X. Chen, Stanley L. Hurst	A Comparison of Universal-Logic-Module Realizations and Their Application in the Synthesis of Combinatorial and Sequential Logic Networks.	IEEE Trans. Computers	1982	DBLP DOI BibTeX RDF	universal-logic-modules, Custom LSI design, function realization statistics, input-programmable gates, uncommitted-logic-arrays
28	Alexander Iosupovicz	Adaptive Universal Fault-Tolerant Logic Networks.	IEEE Trans. Computers	1975	DBLP DOI BibTeX RDF	dynamic error correction, fault-tolerant logic, tree arrays, universal logic modules, programmable logic, cellular logic, Adaptive logic
26	C. K. Vijayakumari, Rekha K. James, P. Mythili	A GA Based Simple and Efficient Technique to Design Combinational Logic Circuits Using Universal Logic Modules.	J. Circuits Syst. Comput.	2016	DBLP DOI BibTeX RDF
26	Shahana Thottathikkulam Kassim, Rekha K. James, K. Poulose Jacob, Sreela Sasi	Genetic Algorithm-Based Combinational Logic Synthesis Using Universal Logic Modules.	ESA	2007	DBLP BibTeX RDF
26	Wenbin Jiang	A method for minimization design of two-level logic networks using multiplexer universal logic modules.	J. Comput. Sci. Technol.	1994	DBLP DOI BibTeX RDF
22	Andrew Zukoski, Xuebei Yang, Kartik Mohanram	Universal logic modules based on double-gate carbon nanotube transistors.	DAC	2011	DBLP DOI BibTeX RDF
22	Markus Hütter	Designing universal logic modules.	ICECS	2002	DBLP DOI BibTeX RDF
22	Shashidhar Thakur, D. F. Wong 0001	Universal Logic Modules for Series-Parallel Functions.	FPGA	1996	DBLP DOI BibTeX RDF
22	A. E. A. Almaini	Sequential Machine Implementations Using Universal Logic Modules.	IEEE Trans. Computers	1978	DBLP DOI BibTeX RDF
22	Sureshchander	Comments on "Delayed Universal Logic Modules and Sequential Machine Synthesis".	IEEE Trans. Computers	1978	DBLP DOI BibTeX RDF
22	Tiu Le Van, Noël van Houtte	Delayed Universal Logic Modules and Sequential Machine Synthesis.	IEEE Trans. Computers	1975	DBLP DOI BibTeX RDF	Accepted sequence, component machine, delayed universal logic module, distributed logic, inverse binary tree, nondeterministic automaton, reversed machine, simple synthesis, transition map, 2n-in-1 multiplexer, universal logic module, decomposition, sequential machine
22	Sureshchander, P. C. P. Bhatt	A Note on Q-Universal Logic Modules.	IEEE Trans. Computers	1974	DBLP DOI BibTeX RDF
22	F. Gail Gray, Richard A. Thompson	Reconfiguration for Repair in a Class of Universal Logic Modules.	IEEE Trans. Computers	1974	DBLP DOI BibTeX RDF
22	Yale N. Patt	Optimal and Near-Optimal Universal Logic Modules with Interconnected External Terminals.	IEEE Trans. Computers	1973	DBLP DOI BibTeX RDF
22	Franco P. Preparata	Universal Logic Modules of a New Type.	IEEE Trans. Computers	1972	DBLP DOI BibTeX RDF
22	Igor Aleksander	Comments on "Universal Logic Modules and Their Applications".	IEEE Trans. Computers	1971	DBLP DOI BibTeX RDF
22	Kenneth J. Thurber, Robert Orval Berg	Universal logic modules implemented using LSI memory techniques.	AFIPS Fall Joint Computing Conference	1971	DBLP DOI BibTeX RDF
22	Stephen S. Yau, Calvin K. Tang	Universal Logic Modules and Their Applications.	IEEE Trans. Computers	1970	DBLP DOI BibTeX RDF
10	Chip-Hong Chang, Bogdan J. Falkowski	Reed-Muller weight and literal vectors for NPN classification.	ISCAS (1)	1999	DBLP DOI BibTeX RDF